2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
11 compatible = "ti,dm816";
12 interrupt-parent = <&intc>;
31 compatible = "arm,cortex-a8";
38 compatible = "arm,cortex-a8-pmu";
43 * The soc node represents the soc top level view. It is used for IPs
44 * that are not memory mapped in the MPU view or for the MPU itself.
47 compatible = "ti,omap-infra";
49 compatible = "ti,omap3-mpu";
55 * XXX: Use a flat representation of the dm816x interconnect.
56 * The real dm816x interconnect network is quite complex. Since
57 * it will not bring real advantage to represent that in DT
58 * for the moment, just use a fake OCP bus entry to represent
59 * the whole bus hierarchy.
62 compatible = "simple-bus";
63 reg = <0x44000000 0x10000>;
70 compatible = "ti,dm816-prcm", "simple-bus";
71 reg = <0x48180000 0x4000>;
74 ranges = <0 0x48180000 0x4000>;
81 prcm_clockdomains: clockdomains {
86 compatible = "ti,dm816-scrm", "simple-bus";
87 reg = <0x48140000 0x21000>;
91 ranges = <0 0x48140000 0x21000>;
93 dm816x_pinmux: pinmux@800 {
94 compatible = "pinctrl-single";
99 pinctrl-single,register-width = <16>;
100 pinctrl-single,function-mask = <0xf>;
103 /* Device Configuration Registers */
104 scm_conf: syscon@600 {
105 compatible = "syscon", "simple-bus";
107 #address-cells = <1>;
109 ranges = <0 0x600 0x110>;
111 usb_phy0: usb-phy@20 {
112 compatible = "ti,dm8168-usb-phy";
115 clocks = <&main_fapll 6>;
116 clock-names = "refclk";
118 syscon = <&scm_conf>;
121 usb_phy1: usb-phy@28 {
122 compatible = "ti,dm8168-usb-phy";
125 clocks = <&main_fapll 6>;
126 clock-names = "refclk";
128 syscon = <&scm_conf>;
132 scrm_clocks: clocks {
133 #address-cells = <1>;
137 scrm_clockdomains: clockdomains {
141 edma: edma@49000000 {
142 compatible = "ti,edma3";
143 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
144 reg = <0x49000000 0x10000>,
146 interrupts = <12 13 14>;
151 compatible = "ti,am3352-elm";
153 reg = <0x48080000 0x2000>;
157 gpio1: gpio@48032000 {
158 compatible = "ti,omap4-gpio";
161 reg = <0x48032000 0x1000>;
165 interrupt-controller;
166 #interrupt-cells = <2>;
169 gpio2: gpio@4804c000 {
170 compatible = "ti,omap4-gpio";
173 reg = <0x4804c000 0x1000>;
177 interrupt-controller;
178 #interrupt-cells = <2>;
181 gpmc: gpmc@50000000 {
182 compatible = "ti,am3352-gpmc";
184 reg = <0x50000000 0x2000>;
185 #address-cells = <2>;
191 gpmc,num-waitpins = <2>;
192 interrupt-controller;
193 #interrupt-cells = <2>;
199 compatible = "ti,omap4-i2c";
201 reg = <0x48028000 0x1000>;
202 #address-cells = <1>;
205 dmas = <&edma 58 &edma 59>;
206 dma-names = "tx", "rx";
210 compatible = "ti,omap4-i2c";
212 reg = <0x4802a000 0x1000>;
213 #address-cells = <1>;
216 dmas = <&edma 60 &edma 61>;
217 dma-names = "tx", "rx";
220 intc: interrupt-controller@48200000 {
221 compatible = "ti,dm816-intc";
222 interrupt-controller;
223 #interrupt-cells = <1>;
224 reg = <0x48200000 0x1000>;
228 compatible = "ti,am3352-rtc", "ti,da830-rtc";
229 reg = <0x480c0000 0x1000>;
230 interrupts = <75 76>;
234 mailbox: mailbox@480c8000 {
235 compatible = "ti,omap4-mailbox";
236 reg = <0x480c8000 0x2000>;
238 ti,hwmods = "mailbox";
240 ti,mbox-num-users = <4>;
241 ti,mbox-num-fifos = <12>;
243 ti,mbox-tx = <3 0 0>;
244 ti,mbox-rx = <0 0 0>;
248 spinbox: spinbox@480ca000 {
249 compatible = "ti,omap4-hwspinlock";
250 reg = <0x480ca000 0x2000>;
251 ti,hwmods = "spinbox";
255 mdio: mdio@4a100800 {
256 compatible = "ti,davinci_mdio";
257 #address-cells = <1>;
259 reg = <0x4a100800 0x100>;
260 ti,hwmods = "davinci_mdio";
261 bus_freq = <1000000>;
262 phy0: ethernet-phy@0 {
265 phy1: ethernet-phy@1 {
270 eth0: ethernet@4a100000 {
271 compatible = "ti,dm816-emac";
273 reg = <0x4a100000 0x800
275 clocks = <&sysclk24_ck>;
276 syscon = <&scm_conf>;
277 ti,davinci-ctrl-reg-offset = <0>;
278 ti,davinci-ctrl-mod-reg-offset = <0x900>;
279 ti,davinci-ctrl-ram-offset = <0x2000>;
280 ti,davinci-ctrl-ram-size = <0x2000>;
281 interrupts = <40 41 42 43>;
282 phy-handle = <&phy0>;
285 eth1: ethernet@4a120000 {
286 compatible = "ti,dm816-emac";
288 reg = <0x4a120000 0x4000>;
289 clocks = <&sysclk24_ck>;
290 syscon = <&scm_conf>;
291 ti,davinci-ctrl-reg-offset = <0>;
292 ti,davinci-ctrl-mod-reg-offset = <0x900>;
293 ti,davinci-ctrl-ram-offset = <0x2000>;
294 ti,davinci-ctrl-ram-size = <0x2000>;
295 interrupts = <44 45 46 47>;
296 phy-handle = <&phy1>;
299 sata: sata@4a140000 {
300 compatible = "ti,dm816-ahci";
301 reg = <0x4a140000 0x10000>;
306 mcspi1: spi@48030000 {
307 compatible = "ti,omap4-mcspi";
308 reg = <0x48030000 0x1000>;
309 #address-cells = <1>;
313 ti,hwmods = "mcspi1";
314 dmas = <&edma 16 &edma 17
318 dma-names = "tx0", "rx0", "tx1", "rx1",
319 "tx2", "rx2", "tx3", "rx3";
323 compatible = "ti,omap4-hsmmc";
324 reg = <0x48060000 0x11000>;
327 dmas = <&edma 24 &edma 25>;
328 dma-names = "tx", "rx";
331 timer1: timer@4802e000 {
332 compatible = "ti,dm816-timer";
333 reg = <0x4802e000 0x2000>;
335 ti,hwmods = "timer1";
337 clocks = <&timer1_fck>;
341 timer2: timer@48040000 {
342 compatible = "ti,dm816-timer";
343 reg = <0x48040000 0x2000>;
345 ti,hwmods = "timer2";
346 clocks = <&timer2_fck>;
350 timer3: timer@48042000 {
351 compatible = "ti,dm816-timer";
352 reg = <0x48042000 0x2000>;
354 ti,hwmods = "timer3";
357 timer4: timer@48044000 {
358 compatible = "ti,dm816-timer";
359 reg = <0x48044000 0x2000>;
361 ti,hwmods = "timer4";
365 timer5: timer@48046000 {
366 compatible = "ti,dm816-timer";
367 reg = <0x48046000 0x2000>;
369 ti,hwmods = "timer5";
373 timer6: timer@48048000 {
374 compatible = "ti,dm816-timer";
375 reg = <0x48048000 0x2000>;
377 ti,hwmods = "timer6";
381 timer7: timer@4804a000 {
382 compatible = "ti,dm816-timer";
383 reg = <0x4804a000 0x2000>;
385 ti,hwmods = "timer7";
389 uart1: uart@48020000 {
390 compatible = "ti,am3352-uart", "ti,omap3-uart";
392 reg = <0x48020000 0x2000>;
393 clock-frequency = <48000000>;
395 dmas = <&edma 26 &edma 27>;
396 dma-names = "tx", "rx";
399 uart2: uart@48022000 {
400 compatible = "ti,am3352-uart", "ti,omap3-uart";
402 reg = <0x48022000 0x2000>;
403 clock-frequency = <48000000>;
405 dmas = <&edma 28 &edma 29>;
406 dma-names = "tx", "rx";
409 uart3: uart@48024000 {
410 compatible = "ti,am3352-uart", "ti,omap3-uart";
412 reg = <0x48024000 0x2000>;
413 clock-frequency = <48000000>;
415 dmas = <&edma 30 &edma 31>;
416 dma-names = "tx", "rx";
419 /* NOTE: USB needs a transceiver driver for phys to work */
420 usb: usb_otg_hs@47401000 {
421 compatible = "ti,am33xx-usb";
422 reg = <0x47401000 0x400000>;
424 #address-cells = <1>;
426 ti,hwmods = "usb_otg_hs";
429 compatible = "ti,musb-dm816";
430 reg = <0x47401400 0x400
432 reg-names = "mc", "control";
434 interrupt-names = "mc";
436 interface-type = <0>;
438 phy-names = "usb2-phy";
439 mentor,multipoint = <1>;
440 mentor,num-eps = <16>;
441 mentor,ram-bits = <12>;
442 mentor,power = <500>;
444 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
445 &cppi41dma 2 0 &cppi41dma 3 0
446 &cppi41dma 4 0 &cppi41dma 5 0
447 &cppi41dma 6 0 &cppi41dma 7 0
448 &cppi41dma 8 0 &cppi41dma 9 0
449 &cppi41dma 10 0 &cppi41dma 11 0
450 &cppi41dma 12 0 &cppi41dma 13 0
451 &cppi41dma 14 0 &cppi41dma 0 1
452 &cppi41dma 1 1 &cppi41dma 2 1
453 &cppi41dma 3 1 &cppi41dma 4 1
454 &cppi41dma 5 1 &cppi41dma 6 1
455 &cppi41dma 7 1 &cppi41dma 8 1
456 &cppi41dma 9 1 &cppi41dma 10 1
457 &cppi41dma 11 1 &cppi41dma 12 1
458 &cppi41dma 13 1 &cppi41dma 14 1>;
460 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
461 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
463 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
464 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
469 compatible = "ti,musb-dm816";
470 reg = <0x47401c00 0x400
472 reg-names = "mc", "control";
474 interrupt-names = "mc";
476 interface-type = <0>;
478 phy-names = "usb2-phy";
479 mentor,multipoint = <1>;
480 mentor,num-eps = <16>;
481 mentor,ram-bits = <12>;
482 mentor,power = <500>;
484 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
485 &cppi41dma 17 0 &cppi41dma 18 0
486 &cppi41dma 19 0 &cppi41dma 20 0
487 &cppi41dma 21 0 &cppi41dma 22 0
488 &cppi41dma 23 0 &cppi41dma 24 0
489 &cppi41dma 25 0 &cppi41dma 26 0
490 &cppi41dma 27 0 &cppi41dma 28 0
491 &cppi41dma 29 0 &cppi41dma 15 1
492 &cppi41dma 16 1 &cppi41dma 17 1
493 &cppi41dma 18 1 &cppi41dma 19 1
494 &cppi41dma 20 1 &cppi41dma 21 1
495 &cppi41dma 22 1 &cppi41dma 23 1
496 &cppi41dma 24 1 &cppi41dma 25 1
497 &cppi41dma 26 1 &cppi41dma 27 1
498 &cppi41dma 28 1 &cppi41dma 29 1>;
500 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
501 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
503 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
504 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
508 cppi41dma: dma-controller@47402000 {
509 compatible = "ti,am3359-cppi41";
510 reg = <0x47400000 0x1000
514 reg-names = "glue", "controller", "scheduler", "queuemgr";
516 interrupt-names = "glue";
518 #dma-channels = <30>;
519 #dma-requests = <256>;
523 wd_timer2: wd_timer@480c2000 {
524 compatible = "ti,omap3-wdt";
525 ti,hwmods = "wd_timer";
526 reg = <0x480c2000 0x1000>;
532 #include "dm816x-clocks.dtsi"