2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm814.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/dm814x.h>
13 compatible = "ti,dm814";
14 interrupt-parent = <&intc>;
25 ethernet0 = &cpsw_emac0;
26 ethernet1 = &cpsw_emac1;
37 compatible = "arm,cortex-a8";
44 compatible = "arm,cortex-a8-pmu";
49 * The soc node represents the soc top level view. It is used for IPs
50 * that are not memory mapped in the MPU view or for the MPU itself.
53 compatible = "ti,omap-infra";
55 compatible = "ti,omap3-mpu";
61 compatible = "simple-bus";
65 ti,hwmods = "l3_main";
68 compatible = "ti,am33xx-usb";
69 reg = <0x47400000 0x1000>;
73 ti,hwmods = "usb_otg_hs";
75 usb0_phy: usb-phy@47401300 {
76 compatible = "ti,am335x-usb-phy";
77 reg = <0x47401300 0x100>;
79 ti,ctrl_mod = <&usb_ctrl_mod>;
84 compatible = "ti,musb-am33xx";
85 reg = <0x47401400 0x400
87 reg-names = "mc", "control";
90 interrupt-names = "mc";
92 mentor,multipoint = <1>;
93 mentor,num-eps = <16>;
94 mentor,ram-bits = <12>;
98 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
99 &cppi41dma 2 0 &cppi41dma 3 0
100 &cppi41dma 4 0 &cppi41dma 5 0
101 &cppi41dma 6 0 &cppi41dma 7 0
102 &cppi41dma 8 0 &cppi41dma 9 0
103 &cppi41dma 10 0 &cppi41dma 11 0
104 &cppi41dma 12 0 &cppi41dma 13 0
105 &cppi41dma 14 0 &cppi41dma 0 1
106 &cppi41dma 1 1 &cppi41dma 2 1
107 &cppi41dma 3 1 &cppi41dma 4 1
108 &cppi41dma 5 1 &cppi41dma 6 1
109 &cppi41dma 7 1 &cppi41dma 8 1
110 &cppi41dma 9 1 &cppi41dma 10 1
111 &cppi41dma 11 1 &cppi41dma 12 1
112 &cppi41dma 13 1 &cppi41dma 14 1>;
114 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
115 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
117 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
118 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
123 compatible = "ti,musb-am33xx";
124 reg = <0x47401c00 0x400
126 reg-names = "mc", "control";
128 interrupt-names = "mc";
130 mentor,multipoint = <1>;
131 mentor,num-eps = <16>;
132 mentor,ram-bits = <12>;
133 mentor,power = <500>;
136 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
137 &cppi41dma 17 0 &cppi41dma 18 0
138 &cppi41dma 19 0 &cppi41dma 20 0
139 &cppi41dma 21 0 &cppi41dma 22 0
140 &cppi41dma 23 0 &cppi41dma 24 0
141 &cppi41dma 25 0 &cppi41dma 26 0
142 &cppi41dma 27 0 &cppi41dma 28 0
143 &cppi41dma 29 0 &cppi41dma 15 1
144 &cppi41dma 16 1 &cppi41dma 17 1
145 &cppi41dma 18 1 &cppi41dma 19 1
146 &cppi41dma 20 1 &cppi41dma 21 1
147 &cppi41dma 22 1 &cppi41dma 23 1
148 &cppi41dma 24 1 &cppi41dma 25 1
149 &cppi41dma 26 1 &cppi41dma 27 1
150 &cppi41dma 28 1 &cppi41dma 29 1>;
152 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
153 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
155 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
156 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
160 cppi41dma: dma-controller@47402000 {
161 compatible = "ti,am3359-cppi41";
162 reg = <0x47400000 0x1000
166 reg-names = "glue", "controller", "scheduler", "queuemgr";
168 interrupt-names = "glue";
170 #dma-channels = <30>;
171 #dma-requests = <256>;
176 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
177 * It shows the module target agent registers though, so the
178 * actual device is typically 0x1000 before the target agent
179 * except in cases where the module is larger than 0x1000.
181 l4ls: l4ls@48000000 {
182 compatible = "ti,dm814-l4ls", "simple-bus";
183 #address-cells = <1>;
185 ranges = <0 0x48000000 0x2000000>;
188 compatible = "ti,omap4-i2c";
189 #address-cells = <1>;
192 reg = <0x28000 0x1000>;
197 compatible = "ti,814-elm";
199 reg = <0x80000 0x2000>;
204 compatible = "ti,omap4-gpio";
207 reg = <0x32000 0x2000>;
211 interrupt-controller;
212 #interrupt-cells = <2>;
216 compatible = "ti,omap4-gpio";
219 reg = <0x4c000 0x2000>;
223 interrupt-controller;
224 #interrupt-cells = <2>;
228 compatible = "ti,omap4-gpio";
231 reg = <0x1ac000 0x2000>;
235 interrupt-controller;
236 #interrupt-cells = <2>;
240 compatible = "ti,omap4-gpio";
243 reg = <0x1ae000 0x2000>;
247 interrupt-controller;
248 #interrupt-cells = <2>;
252 compatible = "ti,omap4-i2c";
253 #address-cells = <1>;
256 reg = <0x2a000 0x1000>;
261 compatible = "ti,omap4-mcspi";
262 reg = <0x30000 0x1000>;
263 #address-cells = <1>;
267 ti,hwmods = "mcspi1";
268 dmas = <&edma 16 0 &edma 17 0
269 &edma 18 0 &edma 19 0
270 &edma 20 0 &edma 21 0
271 &edma 22 0 &edma 23 0>;
273 dma-names = "tx0", "rx0", "tx1", "rx1",
274 "tx2", "rx2", "tx3", "rx3";
278 compatible = "ti,omap4-mcspi";
279 reg = <0x1a0000 0x1000>;
280 #address-cells = <1>;
284 ti,hwmods = "mcspi2";
285 dmas = <&edma 42 0 &edma 43 0
286 &edma 44 0 &edma 45 0>;
287 dma-names = "tx0", "rx0", "tx1", "rx1";
290 /* Board must configure dmas with edma_xbar for EDMA */
292 compatible = "ti,omap4-mcspi";
293 reg = <0x1a2000 0x1000>;
294 #address-cells = <1>;
298 ti,hwmods = "mcspi3";
302 compatible = "ti,omap4-mcspi";
303 reg = <0x1a4000 0x1000>;
304 #address-cells = <1>;
308 ti,hwmods = "mcspi4";
311 timer1: timer@2e000 {
312 compatible = "ti,dm814-timer";
313 reg = <0x2e000 0x2000>;
315 ti,hwmods = "timer1";
317 clocks = <&timer1_fck>;
322 compatible = "ti,am3352-uart", "ti,omap3-uart";
324 reg = <0x20000 0x2000>;
325 clock-frequency = <48000000>;
327 dmas = <&edma 26 0 &edma 27 0>;
328 dma-names = "tx", "rx";
332 compatible = "ti,am3352-uart", "ti,omap3-uart";
334 reg = <0x22000 0x2000>;
335 clock-frequency = <48000000>;
337 dmas = <&edma 28 0 &edma 29 0>;
338 dma-names = "tx", "rx";
342 compatible = "ti,am3352-uart", "ti,omap3-uart";
344 reg = <0x24000 0x2000>;
345 clock-frequency = <48000000>;
347 dmas = <&edma 30 0 &edma 31 0>;
348 dma-names = "tx", "rx";
351 timer2: timer@40000 {
352 compatible = "ti,dm814-timer";
353 reg = <0x40000 0x2000>;
355 ti,hwmods = "timer2";
356 clocks = <&timer2_fck>;
360 timer3: timer@42000 {
361 compatible = "ti,dm814-timer";
362 reg = <0x42000 0x2000>;
364 ti,hwmods = "timer3";
368 compatible = "ti,omap4-hsmmc";
372 dma-names = "tx", "rx";
374 interrupt-parent = <&intc>;
375 reg = <0x60000 0x1000>;
379 compatible = "ti,am3352-rtc", "ti,da830-rtc";
380 reg = <0xc0000 0x1000>;
381 interrupts = <75 76>;
386 compatible = "ti,omap4-hsmmc";
390 dma-names = "tx", "rx";
392 interrupt-parent = <&intc>;
393 reg = <0x1d8000 0x1000>;
396 control: control@140000 {
397 compatible = "ti,dm814-scm", "simple-bus";
398 reg = <0x140000 0x20000>;
399 #address-cells = <1>;
401 ranges = <0 0x140000 0x20000>;
403 scm_conf: scm_conf@0 {
404 compatible = "syscon", "simple-bus";
406 #address-cells = <1>;
408 ranges = <0 0 0x800>;
410 phy_gmii_sel: phy-gmii-sel {
411 compatible = "ti,dm814-phy-gmii-sel";
417 #address-cells = <1>;
421 scm_clockdomains: clockdomains {
425 usb_ctrl_mod: control@620 {
426 compatible = "ti,am335x-usb-ctrl-module";
429 reg-names = "phy_ctrl", "wakeup";
432 edma_xbar: dma-router@f90 {
433 compatible = "ti,am335x-edma-crossbar";
437 dma-masters = <&edma>;
441 * Note that silicon revision 2.1 and older
442 * require input enabled (bit 18 set) for all
443 * 3.3V I/Os to avoid cumulative hardware damage.
444 * For more info, see errata advisory 2.1.87.
445 * We leave bit 18 out of function-mask and rely
446 * on the bootloader for it.
448 pincntl: pinmux@800 {
449 compatible = "pinctrl-single";
451 #address-cells = <1>;
453 #pinctrl-cells = <1>;
454 pinctrl-single,register-width = <32>;
455 pinctrl-single,function-mask = <0x307ff>;
458 usb1_phy: usb-phy@1b00 {
459 compatible = "ti,am335x-usb-phy";
460 reg = <0x1b00 0x100>;
462 ti,ctrl_mod = <&usb_ctrl_mod>;
468 compatible = "ti,dm814-prcm", "simple-bus";
469 reg = <0x180000 0x2000>;
470 #address-cells = <1>;
472 ranges = <0 0x180000 0x2000>;
474 prcm_clocks: clocks {
475 #address-cells = <1>;
479 prcm_clockdomains: clockdomains {
483 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
484 pllss: pllss@1c5000 {
485 compatible = "ti,dm814-pllss", "simple-bus";
486 reg = <0x1c5000 0x1000>;
487 #address-cells = <1>;
489 ranges = <0 0x1c5000 0x1000>;
491 pllss_clocks: clocks {
492 #address-cells = <1>;
496 pllss_clockdomains: clockdomains {
501 compatible = "ti,omap3-wdt";
502 ti,hwmods = "wd_timer";
503 reg = <0x1c7000 0x1000>;
508 intc: interrupt-controller@48200000 {
509 compatible = "ti,dm814-intc";
510 interrupt-controller;
511 #interrupt-cells = <1>;
512 reg = <0x48200000 0x1000>;
515 /* Board must configure evtmux with edma_xbar for EDMA */
517 compatible = "ti,omap4-hsmmc";
520 interrupt-parent = <&intc>;
521 reg = <0x47810000 0x1000>;
524 target-module@49000000 {
525 compatible = "ti,sysc-omap4", "ti,sysc";
526 reg = <0x49000000 0x4>;
528 clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
530 #address-cells = <1>;
532 ranges = <0x0 0x49000000 0x10000>;
535 compatible = "ti,edma3-tpcc";
537 reg-names = "edma3_cc";
538 interrupts = <12 13 14>;
539 interrupt-names = "edma3_ccint", "edma3_mperr",
544 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
545 <&edma_tptc2 3>, <&edma_tptc3 0>;
547 ti,edma-memcpy-channels = <20 21>;
551 target-module@49800000 {
552 compatible = "ti,sysc-omap4", "ti,sysc";
553 reg = <0x49800000 0x4>,
555 reg-names = "rev", "sysc";
556 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
557 ti,sysc-midle = <SYSC_IDLE_FORCE>;
558 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
560 clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>;
562 #address-cells = <1>;
564 ranges = <0x0 0x49800000 0x100000>;
567 compatible = "ti,edma3-tptc";
570 interrupt-names = "edma3_tcerrint";
574 target-module@49900000 {
575 compatible = "ti,sysc-omap4", "ti,sysc";
576 reg = <0x49900000 0x4>,
578 reg-names = "rev", "sysc";
579 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
580 ti,sysc-midle = <SYSC_IDLE_FORCE>;
581 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
583 clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>;
585 #address-cells = <1>;
587 ranges = <0x0 0x49900000 0x100000>;
590 compatible = "ti,edma3-tptc";
593 interrupt-names = "edma3_tcerrint";
597 target-module@49a00000 {
598 compatible = "ti,sysc-omap4", "ti,sysc";
599 reg = <0x49a00000 0x4>,
601 reg-names = "rev", "sysc";
602 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
603 ti,sysc-midle = <SYSC_IDLE_FORCE>;
604 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
606 clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>;
608 #address-cells = <1>;
610 ranges = <0x0 0x49a00000 0x100000>;
613 compatible = "ti,edma3-tptc";
616 interrupt-names = "edma3_tcerrint";
620 target-module@49b00000 {
621 compatible = "ti,sysc-omap4", "ti,sysc";
622 reg = <0x49b00000 0x4>,
624 reg-names = "rev", "sysc";
625 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
626 ti,sysc-midle = <SYSC_IDLE_FORCE>;
627 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
629 clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>;
631 #address-cells = <1>;
633 ranges = <0x0 0x49b00000 0x100000>;
636 compatible = "ti,edma3-tptc";
639 interrupt-names = "edma3_tcerrint";
643 /* See TRM "Table 1-318. L4HS Instance Summary" */
644 l4hs: l4hs@4a000000 {
645 compatible = "ti,dm814-l4hs", "simple-bus";
646 #address-cells = <1>;
648 ranges = <0 0x4a000000 0x1b4040>;
650 target-module@100000 {
651 compatible = "ti,sysc-omap4-simple", "ti,sysc";
652 reg = <0x100900 0x4>,
655 reg-names = "rev", "sysc", "syss";
657 ti,sysc-midle = <SYSC_IDLE_FORCE>,
659 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
662 clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
664 #address-cells = <1>;
666 ranges = <0 0x100000 0x8000>;
669 compatible = "ti,cpsw";
670 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
671 clock-names = "fck", "cpts";
672 cpdma_channels = <8>;
673 ale_entries = <1024>;
674 bd_ram_size = <0x2000>;
675 mac_control = <0x20>;
678 cpts_clock_mult = <0x80000000>;
679 cpts_clock_shift = <29>;
682 #address-cells = <1>;
690 interrupts = <40 41 42 43>;
691 ranges = <0 0 0x8000>;
692 syscon = <&scm_conf>;
694 davinci_mdio: mdio@800 {
695 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
696 clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
698 #address-cells = <1>;
700 bus_freq = <1000000>;
704 cpsw_emac0: slave@200 {
705 /* Filled in by U-Boot */
706 mac-address = [ 00 00 00 00 00 00 ];
707 phys = <&phy_gmii_sel 1>;
710 cpsw_emac1: slave@300 {
711 /* Filled in by U-Boot */
712 mac-address = [ 00 00 00 00 00 00 ];
713 phys = <&phy_gmii_sel 2>;
719 gpmc: gpmc@50000000 {
720 compatible = "ti,am3352-gpmc";
723 reg = <0x50000000 0x2000>;
726 gpmc,num-waitpins = <2>;
727 #address-cells = <2>;
729 interrupt-controller;
730 #interrupt-cells = <2>;
737 #include "dm814x-clocks.dtsi"