1 // SPDX-License-Identifier: GPL-2.0-only
5 * See TRM "2.6.10 Connected outputso DPLLS" and
6 * "2.6.11 Connected Outputs of DPLLJ". Only clkout is
7 * connected except for hdmi and usb.
9 adpll_mpu_ck: adpll@40 {
11 compatible = "ti,dm814-adpll-s-clock";
13 clocks = <&devosc_ck &devosc_ck &devosc_ck>;
14 clock-names = "clkinp", "clkinpulow", "clkinphif";
15 clock-output-names = "481c5040.adpll.dcoclkldo",
16 "481c5040.adpll.clkout",
17 "481c5040.adpll.clkoutx2",
18 "481c5040.adpll.clkouthif";
21 adpll_dsp_ck: adpll@80 {
23 compatible = "ti,dm814-adpll-lj-clock";
25 clocks = <&devosc_ck &devosc_ck>;
26 clock-names = "clkinp", "clkinpulow";
27 clock-output-names = "481c5080.adpll.dcoclkldo",
28 "481c5080.adpll.clkout",
29 "481c5080.adpll.clkoutldo";
32 adpll_sgx_ck: adpll@b0 {
34 compatible = "ti,dm814-adpll-lj-clock";
36 clocks = <&devosc_ck &devosc_ck>;
37 clock-names = "clkinp", "clkinpulow";
38 clock-output-names = "481c50b0.adpll.dcoclkldo",
39 "481c50b0.adpll.clkout",
40 "481c50b0.adpll.clkoutldo";
43 adpll_hdvic_ck: adpll@e0 {
45 compatible = "ti,dm814-adpll-lj-clock";
47 clocks = <&devosc_ck &devosc_ck>;
48 clock-names = "clkinp", "clkinpulow";
49 clock-output-names = "481c50e0.adpll.dcoclkldo",
50 "481c50e0.adpll.clkout",
51 "481c50e0.adpll.clkoutldo";
54 adpll_l3_ck: adpll@110 {
56 compatible = "ti,dm814-adpll-lj-clock";
58 clocks = <&devosc_ck &devosc_ck>;
59 clock-names = "clkinp", "clkinpulow";
60 clock-output-names = "481c5110.adpll.dcoclkldo",
61 "481c5110.adpll.clkout",
62 "481c5110.adpll.clkoutldo";
65 adpll_isp_ck: adpll@140 {
67 compatible = "ti,dm814-adpll-lj-clock";
69 clocks = <&devosc_ck &devosc_ck>;
70 clock-names = "clkinp", "clkinpulow";
71 clock-output-names = "481c5140.adpll.dcoclkldo",
72 "481c5140.adpll.clkout",
73 "481c5140.adpll.clkoutldo";
76 adpll_dss_ck: adpll@170 {
78 compatible = "ti,dm814-adpll-lj-clock";
80 clocks = <&devosc_ck &devosc_ck>;
81 clock-names = "clkinp", "clkinpulow";
82 clock-output-names = "481c5170.adpll.dcoclkldo",
83 "481c5170.adpll.clkout",
84 "481c5170.adpll.clkoutldo";
87 adpll_video0_ck: adpll@1a0 {
89 compatible = "ti,dm814-adpll-lj-clock";
91 clocks = <&devosc_ck &devosc_ck>;
92 clock-names = "clkinp", "clkinpulow";
93 clock-output-names = "481c51a0.adpll.dcoclkldo",
94 "481c51a0.adpll.clkout",
95 "481c51a0.adpll.clkoutldo";
98 adpll_video1_ck: adpll@1d0 {
100 compatible = "ti,dm814-adpll-lj-clock";
102 clocks = <&devosc_ck &devosc_ck>;
103 clock-names = "clkinp", "clkinpulow";
104 clock-output-names = "481c51d0.adpll.dcoclkldo",
105 "481c51d0.adpll.clkout",
106 "481c51d0.adpll.clkoutldo";
109 adpll_hdmi_ck: adpll@200 {
111 compatible = "ti,dm814-adpll-lj-clock";
113 clocks = <&devosc_ck &devosc_ck>;
114 clock-names = "clkinp", "clkinpulow";
115 clock-output-names = "481c5200.adpll.dcoclkldo",
116 "481c5200.adpll.clkout",
117 "481c5200.adpll.clkoutldo";
120 adpll_audio_ck: adpll@230 {
122 compatible = "ti,dm814-adpll-lj-clock";
124 clocks = <&devosc_ck &devosc_ck>;
125 clock-names = "clkinp", "clkinpulow";
126 clock-output-names = "481c5230.adpll.dcoclkldo",
127 "481c5230.adpll.clkout",
128 "481c5230.adpll.clkoutldo";
131 adpll_usb_ck: adpll@260 {
133 compatible = "ti,dm814-adpll-lj-clock";
135 clocks = <&devosc_ck &devosc_ck>;
136 clock-names = "clkinp", "clkinpulow";
137 clock-output-names = "481c5260.adpll.dcoclkldo",
138 "481c5260.adpll.clkout",
139 "481c5260.adpll.clkoutldo";
142 adpll_ddr_ck: adpll@290 {
144 compatible = "ti,dm814-adpll-lj-clock";
146 clocks = <&devosc_ck &devosc_ck>;
147 clock-names = "clkinp", "clkinpulow";
148 clock-output-names = "481c5290.adpll.dcoclkldo",
149 "481c5290.adpll.clkout",
150 "481c5290.adpll.clkoutldo";
155 timer1_fck: timer1_fck@2e0 {
157 compatible = "ti,mux-clock";
158 clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
159 &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
164 timer2_fck: timer2_fck@2e0 {
166 compatible = "ti,mux-clock";
167 clocks = <&sysclk18_ck &aud_clkin0_ck &aud_clkin1_ck
168 &aud_clkin2_ck &devosc_ck &auxosc_ck &tclkin_ck>;
173 /* CPTS_RFT_CLK in RMII_REFCLK_SRC, usually sourced from auiod */
174 cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
176 compatible = "ti,mux-clock";
177 clocks = <&adpll_video0_ck 1
184 /* REVISIT: Set up with a proper mux using RMII_REFCLK_SRC */
185 cpsw_125mhz_gclk: cpsw_125mhz_gclk {
187 compatible = "fixed-clock";
188 clock-frequency = <125000000>;
191 sysclk18_ck: sysclk18_ck@2f0 {
193 compatible = "ti,mux-clock";
194 clocks = <&rtcosc_ck>, <&rtcdivider_ck>;
201 devosc_ck: devosc_ck@40 {
203 compatible = "ti,mux-clock";
204 clocks = <&virt_20000000_ck>, <&virt_19200000_ck>;
209 /* Optional auxosc, 20 - 30 MHz range, assume 22.5729 MHz by default */
210 auxosc_ck: auxosc_ck {
212 compatible = "fixed-clock";
213 clock-frequency = <22572900>;
216 /* Optional 32768Hz crystal or clock on RTCOSC pins */
217 rtcosc_ck: rtcosc_ck {
219 compatible = "fixed-clock";
220 clock-frequency = <32768>;
223 /* Optional external clock on TCLKIN pin, set rate in baord dts file */
224 tclkin_ck: tclkin_ck {
226 compatible = "fixed-clock";
227 clock-frequency = <0>;
230 virt_20000000_ck: virt_20000000_ck {
232 compatible = "fixed-clock";
233 clock-frequency = <20000000>;
236 virt_19200000_ck: virt_19200000_ck {
238 compatible = "fixed-clock";
239 clock-frequency = <19200000>;
244 compatible = "fixed-clock";
245 clock-frequency = <1000000000>;
250 osc_src_ck: osc_src_ck {
252 compatible = "fixed-factor-clock";
253 clocks = <&devosc_ck>;
258 mpu_clksrc_ck: mpu_clksrc_ck@40 {
260 compatible = "ti,mux-clock";
261 clocks = <&devosc_ck>, <&rtcdivider_ck>;
266 /* Fixed divider clock 0.0016384 * devosc */
267 rtcdivider_ck: rtcdivider_ck {
269 compatible = "fixed-factor-clock";
270 clocks = <&devosc_ck>;
276 sysclk4_ck: sysclk4_ck {
278 compatible = "ti,fixed-factor-clock";
279 clocks = <&adpll_l3_ck 1>;
285 sysclk5_ck: sysclk5_ck {
287 compatible = "ti,fixed-factor-clock";
288 clocks = <&adpll_l3_ck 1>;
294 sysclk6_ck: sysclk6_ck {
296 compatible = "ti,fixed-factor-clock";
297 clocks = <&adpll_l3_ck 1>;
302 sysclk8_ck: sysclk8_ck {
304 compatible = "ti,fixed-factor-clock";
305 clocks = <&adpll_usb_ck 1>;
310 sysclk10_ck: sysclk10_ck {
311 compatible = "ti,divider-clock";
315 clocks = <&adpll_usb_ck 1>;
318 aud_clkin0_ck: aud_clkin0_ck {
320 compatible = "fixed-clock";
321 clock-frequency = <20000000>;
324 aud_clkin1_ck: aud_clkin1_ck {
326 compatible = "fixed-clock";
327 clock-frequency = <20000000>;
330 aud_clkin2_ck: aud_clkin2_ck {
332 compatible = "fixed-clock";
333 clock-frequency = <20000000>;
338 default_cm: default_cm@500 {
339 compatible = "ti,omap4-cm";
341 #address-cells = <1>;
343 ranges = <0 0x500 0x100>;
345 default_clkctrl: clk@0 {
346 compatible = "ti,clkctrl";
352 alwon_cm: alwon_cm@1400 {
353 compatible = "ti,omap4-cm";
354 reg = <0x1400 0x300>;
355 #address-cells = <1>;
357 ranges = <0 0x1400 0x300>;
359 alwon_clkctrl: clk@0 {
360 compatible = "ti,clkctrl";