2 * Copyright 2012 DENX Software Engineering GmbH
3 * Heiko Schocher <hs@denx.de>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 #include "skeleton.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
18 intc: interrupt-controller@fffee000 {
19 compatible = "ti,cp-intc";
21 #interrupt-cells = <1>;
23 reg = <0xfffee000 0x2000>;
27 compatible = "simple-bus";
31 ranges = <0x0 0x01c00000 0x400000>;
32 interrupt-parent = <&intc>;
34 pmx_core: pinmux@14120 {
35 compatible = "pinctrl-single";
40 pinctrl-single,bit-per-mux;
41 pinctrl-single,register-width = <32>;
42 pinctrl-single,function-mask = <0xf>;
45 serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
46 pinctrl-single,bits = <
47 /* UART0_RTS UART0_CTS */
48 0x0c 0x22000000 0xff000000
51 serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
52 pinctrl-single,bits = <
53 /* UART0_TXD UART0_RXD */
54 0x0c 0x00220000 0x00ff0000
57 serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
58 pinctrl-single,bits = <
59 /* UART1_CTS UART1_RTS */
60 0x00 0x00440000 0x00ff0000
63 serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
64 pinctrl-single,bits = <
65 /* UART1_TXD UART1_RXD */
66 0x10 0x22000000 0xff000000
69 serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
70 pinctrl-single,bits = <
71 /* UART2_CTS UART2_RTS */
72 0x00 0x44000000 0xff000000
75 serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
76 pinctrl-single,bits = <
77 /* UART2_TXD UART2_RXD */
78 0x10 0x00220000 0x00ff0000
81 i2c0_pins: pinmux_i2c0_pins {
82 pinctrl-single,bits = <
83 /* I2C0_SDA,I2C0_SCL */
84 0x10 0x00002200 0x0000ff00
87 i2c1_pins: pinmux_i2c1_pins {
88 pinctrl-single,bits = <
89 /* I2C1_SDA, I2C1_SCL */
90 0x10 0x00440000 0x00ff0000
93 mmc0_pins: pinmux_mmc_pins {
94 pinctrl-single,bits = <
95 /* MMCSD0_DAT[3] MMCSD0_DAT[2]
96 * MMCSD0_DAT[1] MMCSD0_DAT[0]
97 * MMCSD0_CMD MMCSD0_CLK
99 0x28 0x00222222 0x00ffffff
102 ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
103 pinctrl-single,bits = <
105 0xc 0x00000002 0x0000000f
108 ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
109 pinctrl-single,bits = <
111 0xc 0x00000020 0x000000f0
114 ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
115 pinctrl-single,bits = <
117 0x14 0x00000002 0x0000000f
120 ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
121 pinctrl-single,bits = <
123 0x14 0x00000020 0x000000f0
126 ecap0_pins: pinmux_ecap0_pins {
127 pinctrl-single,bits = <
129 0x8 0x20000000 0xf0000000
132 ecap1_pins: pinmux_ecap1_pins {
133 pinctrl-single,bits = <
135 0x4 0x40000000 0xf0000000
138 ecap2_pins: pinmux_ecap2_pins {
139 pinctrl-single,bits = <
141 0x4 0x00000004 0x0000000f
144 spi0_pins: pinmux_spi0_pins {
145 pinctrl-single,bits = <
146 /* SIMO, SOMI, CLK */
147 0xc 0x00001101 0x0000ff0f
150 spi0_cs0_pin: pinmux_spi0_cs0 {
151 pinctrl-single,bits = <
153 0x10 0x00000010 0x000000f0
156 spi1_pins: pinmux_spi1_pins {
157 pinctrl-single,bits = <
158 /* SIMO, SOMI, CLK */
159 0x14 0x00110100 0x00ff0f00
162 spi1_cs0_pin: pinmux_spi1_cs0 {
163 pinctrl-single,bits = <
165 0x14 0x00000010 0x000000f0
168 mdio_pins: pinmux_mdio_pins {
169 pinctrl-single,bits = <
170 /* MDIO_CLK, MDIO_D */
171 0x10 0x00000088 0x000000ff
174 mii_pins: pinmux_mii_pins {
175 pinctrl-single,bits = <
177 * MII_TXEN, MII_TXCLK, MII_COL
178 * MII_TXD_3, MII_TXD_2, MII_TXD_1
181 0x8 0x88888880 0xfffffff0
183 * MII_RXER, MII_CRS, MII_RXCLK
184 * MII_RXDV, MII_RXD_3, MII_RXD_2
185 * MII_RXD_1, MII_RXD_0
187 0xc 0x88888888 0xffffffff
190 lcd_pins: pinmux_lcd_pins {
191 pinctrl-single,bits = <
193 * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
196 0x40 0x22222200 0xffffff00
198 * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
199 * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
201 0x44 0x22222222 0xffffffff
202 /* LCD_D[8], LCD_D[9] */
203 0x48 0x00000022 0x000000ff
206 0x48 0x02000000 0x0f000000
207 /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
208 0x4c 0x02000022 0x0f0000ff
213 prictrl: priority-controller@14110 {
214 compatible = "ti,da850-mstpri";
215 reg = <0x14110 0x0c>;
218 cfgchip: chip-controller@1417c {
219 compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
220 reg = <0x1417c 0x14>;
223 compatible = "ti,da830-usb-phy";
229 compatible = "ti,edma3-tpcc";
230 /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
232 reg-names = "edma3_cc";
233 interrupts = <11 12>;
234 interrupt-names = "edma3_ccint", "edma3_ccerrint";
237 ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
239 edma0_tptc0: tptc@8000 {
240 compatible = "ti,edma3-tptc";
241 reg = <0x8000 0x400>;
243 interrupt-names = "edm3_tcerrint";
245 edma0_tptc1: tptc@8400 {
246 compatible = "ti,edma3-tptc";
247 reg = <0x8400 0x400>;
249 interrupt-names = "edm3_tcerrint";
252 compatible = "ti,edma3-tpcc";
253 /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
254 reg = <0x230000 0x8000>;
255 reg-names = "edma3_cc";
256 interrupts = <93 94>;
257 interrupt-names = "edma3_ccint", "edma3_ccerrint";
260 ti,tptcs = <&edma1_tptc0 7>;
262 edma1_tptc0: tptc@238000 {
263 compatible = "ti,edma3-tptc";
264 reg = <0x238000 0x400>;
266 interrupt-names = "edm3_tcerrint";
268 serial0: serial@42000 {
269 compatible = "ns16550a";
270 reg = <0x42000 0x100>;
275 serial1: serial@10c000 {
276 compatible = "ns16550a";
277 reg = <0x10c000 0x100>;
282 serial2: serial@10d000 {
283 compatible = "ns16550a";
284 reg = <0x10d000 0x100>;
290 compatible = "ti,da830-rtc";
291 reg = <0x23000 0x1000>;
297 compatible = "ti,davinci-i2c";
298 reg = <0x22000 0x1000>;
300 #address-cells = <1>;
305 compatible = "ti,davinci-i2c";
306 reg = <0x228000 0x1000>;
308 #address-cells = <1>;
313 compatible = "ti,davinci-wdt";
314 reg = <0x21000 0x1000>;
318 compatible = "ti,da830-mmc";
319 reg = <0x40000 0x1000>;
323 dmas = <&edma0 16 0>, <&edma0 17 0>;
324 dma-names = "rx", "tx";
328 compatible = "ti,da830-mmc";
329 reg = <0x21b000 0x1000>;
333 dmas = <&edma1 28 0>, <&edma1 29 0>;
334 dma-names = "rx", "tx";
337 ehrpwm0: pwm@300000 {
338 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
341 reg = <0x300000 0x2000>;
344 ehrpwm1: pwm@302000 {
345 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
348 reg = <0x302000 0x2000>;
352 compatible = "ti,da850-ecap", "ti,am3352-ecap",
355 reg = <0x306000 0x80>;
359 compatible = "ti,da850-ecap", "ti,am3352-ecap",
362 reg = <0x307000 0x80>;
366 compatible = "ti,da850-ecap", "ti,am3352-ecap",
369 reg = <0x308000 0x80>;
373 #address-cells = <1>;
375 compatible = "ti,da830-spi";
376 reg = <0x41000 0x1000>;
378 ti,davinci-spi-intr-line = <1>;
380 dmas = <&edma0 14 0>, <&edma0 15 0>;
381 dma-names = "rx", "tx";
385 #address-cells = <1>;
387 compatible = "ti,da830-spi";
388 reg = <0x30e000 0x1000>;
390 ti,davinci-spi-intr-line = <1>;
392 dmas = <&edma0 18 0>, <&edma0 19 0>;
393 dma-names = "rx", "tx";
397 compatible = "ti,da830-musb";
398 reg = <0x200000 0x10000>;
400 interrupt-names = "mc";
403 phy-names = "usb-phy";
407 compatible = "ti,davinci_mdio";
408 #address-cells = <1>;
410 reg = <0x224000 0x1000>;
413 eth0: ethernet@220000 {
414 compatible = "ti,davinci-dm6467-emac";
415 reg = <0x220000 0x4000>;
416 ti,davinci-ctrl-reg-offset = <0x3000>;
417 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
418 ti,davinci-ctrl-ram-offset = <0>;
419 ti,davinci-ctrl-ram-size = <0x2000>;
420 local-mac-address = [ 00 00 00 00 00 00 ];
429 compatible = "ti,dm6441-gpio";
432 reg = <0x226000 0x1000>;
433 interrupts = <42 IRQ_TYPE_EDGE_BOTH
434 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
435 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
436 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
437 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
439 ti,davinci-gpio-unbanked = <0>;
442 pinconf: pin-controller@22c00c {
443 compatible = "ti,da850-pupd";
444 reg = <0x22c00c 0x8>;
448 mcasp0: mcasp@100000 {
449 compatible = "ti,da830-mcasp-audio";
450 reg = <0x100000 0x2000>,
452 reg-names = "mpu", "dat";
454 interrupt-names = "common";
458 dma-names = "tx", "rx";
461 display: display@213000 {
462 compatible = "ti,da850-tilcdc";
463 reg = <0x213000 0x1000>;
468 aemif: aemif@68000000 {
469 compatible = "ti,da850-aemif";
470 #address-cells = <2>;
473 reg = <0x68000000 0x00008000>;
474 ranges = <0 0 0x60000000 0x08000000
475 1 0 0x68000000 0x00008000>;
478 memctrl: memory-controller@b0000000 {
479 compatible = "ti,da850-ddr-controller";
480 reg = <0xb0000000 0xe8>;