2 * Copyright 2012 DENX Software Engineering GmbH
3 * Heiko Schocher <hs@denx.de>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 #include <dt-bindings/interrupt-controller/irq.h>
19 device_type = "memory";
20 reg = <0xc0000000 0x0>;
27 intc: interrupt-controller@fffee000 {
28 compatible = "ti,cp-intc";
30 #interrupt-cells = <1>;
32 reg = <0xfffee000 0x2000>;
36 compatible = "ti,da850-dsp";
37 reg = <0x11800000 0x40000>,
42 reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
43 interrupt-parent = <&intc>;
48 compatible = "simple-bus";
52 ranges = <0x0 0x01c00000 0x400000>;
53 interrupt-parent = <&intc>;
55 pmx_core: pinmux@14120 {
56 compatible = "pinctrl-single";
59 pinctrl-single,bit-per-mux;
60 pinctrl-single,register-width = <32>;
61 pinctrl-single,function-mask = <0xf>;
62 /* pin base, nr pins & gpio function */
63 pinctrl-single,gpio-range = <&range 0 17 0x8>,
71 #pinctrl-single,gpio-range-cells = <3>;
74 serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
75 pinctrl-single,bits = <
76 /* UART0_RTS UART0_CTS */
77 0x0c 0x22000000 0xff000000
80 serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
81 pinctrl-single,bits = <
82 /* UART0_TXD UART0_RXD */
83 0x0c 0x00220000 0x00ff0000
86 serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
87 pinctrl-single,bits = <
88 /* UART1_CTS UART1_RTS */
89 0x00 0x00440000 0x00ff0000
92 serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
93 pinctrl-single,bits = <
94 /* UART1_TXD UART1_RXD */
95 0x10 0x22000000 0xff000000
98 serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
99 pinctrl-single,bits = <
100 /* UART2_CTS UART2_RTS */
101 0x00 0x44000000 0xff000000
104 serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
105 pinctrl-single,bits = <
106 /* UART2_TXD UART2_RXD */
107 0x10 0x00220000 0x00ff0000
110 i2c0_pins: pinmux_i2c0_pins {
111 pinctrl-single,bits = <
112 /* I2C0_SDA,I2C0_SCL */
113 0x10 0x00002200 0x0000ff00
116 i2c1_pins: pinmux_i2c1_pins {
117 pinctrl-single,bits = <
118 /* I2C1_SDA, I2C1_SCL */
119 0x10 0x00440000 0x00ff0000
122 mmc0_pins: pinmux_mmc_pins {
123 pinctrl-single,bits = <
124 /* MMCSD0_DAT[3] MMCSD0_DAT[2]
125 * MMCSD0_DAT[1] MMCSD0_DAT[0]
126 * MMCSD0_CMD MMCSD0_CLK
128 0x28 0x00222222 0x00ffffff
131 ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
132 pinctrl-single,bits = <
134 0xc 0x00000002 0x0000000f
137 ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
138 pinctrl-single,bits = <
140 0xc 0x00000020 0x000000f0
143 ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
144 pinctrl-single,bits = <
146 0x14 0x00000002 0x0000000f
149 ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
150 pinctrl-single,bits = <
152 0x14 0x00000020 0x000000f0
155 ecap0_pins: pinmux_ecap0_pins {
156 pinctrl-single,bits = <
158 0x8 0x20000000 0xf0000000
161 ecap1_pins: pinmux_ecap1_pins {
162 pinctrl-single,bits = <
164 0x4 0x40000000 0xf0000000
167 ecap2_pins: pinmux_ecap2_pins {
168 pinctrl-single,bits = <
170 0x4 0x00000004 0x0000000f
173 spi0_pins: pinmux_spi0_pins {
174 pinctrl-single,bits = <
175 /* SIMO, SOMI, CLK */
176 0xc 0x00001101 0x0000ff0f
179 spi0_cs0_pin: pinmux_spi0_cs0 {
180 pinctrl-single,bits = <
182 0x10 0x00000010 0x000000f0
185 spi0_cs3_pin: pinmux_spi0_cs3_pin {
186 pinctrl-single,bits = <
188 0xc 0x01000000 0x0f000000
191 spi1_pins: pinmux_spi1_pins {
192 pinctrl-single,bits = <
193 /* SIMO, SOMI, CLK */
194 0x14 0x00110100 0x00ff0f00
197 spi1_cs0_pin: pinmux_spi1_cs0 {
198 pinctrl-single,bits = <
200 0x14 0x00000010 0x000000f0
203 mdio_pins: pinmux_mdio_pins {
204 pinctrl-single,bits = <
205 /* MDIO_CLK, MDIO_D */
206 0x10 0x00000088 0x000000ff
209 mii_pins: pinmux_mii_pins {
210 pinctrl-single,bits = <
212 * MII_TXEN, MII_TXCLK, MII_COL
213 * MII_TXD_3, MII_TXD_2, MII_TXD_1
216 0x8 0x88888880 0xfffffff0
218 * MII_RXER, MII_CRS, MII_RXCLK
219 * MII_RXDV, MII_RXD_3, MII_RXD_2
220 * MII_RXD_1, MII_RXD_0
222 0xc 0x88888888 0xffffffff
225 lcd_pins: pinmux_lcd_pins {
226 pinctrl-single,bits = <
228 * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
231 0x40 0x22222200 0xffffff00
233 * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
234 * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
236 0x44 0x22222222 0xffffffff
237 /* LCD_D[8], LCD_D[9] */
238 0x48 0x00000022 0x000000ff
241 0x48 0x02000000 0x0f000000
242 /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
243 0x4c 0x02000022 0x0f0000ff
246 vpif_capture_pins: vpif_capture_pins {
247 pinctrl-single,bits = <
248 /* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
249 0x38 0x11111111 0xffffffff
250 /* VP_DIN[10..15,0..1] */
251 0x3c 0x11111111 0xffffffff
253 0x40 0x00000011 0x000000ff
256 vpif_display_pins: vpif_display_pins {
257 pinctrl-single,bits = <
259 0x40 0x11111100 0xffffff00
260 /* VP_DOUT[10..15,0..1] */
261 0x44 0x11111111 0xffffffff
263 0x48 0x00000011 0x000000ff
265 * VP_CLKOUT3, VP_CLKIN3,
266 * VP_CLKOUT2, VP_CLKIN2
268 0x4c 0x00111100 0x00ffff00
272 prictrl: priority-controller@14110 {
273 compatible = "ti,da850-mstpri";
274 reg = <0x14110 0x0c>;
277 cfgchip: chip-controller@1417c {
278 compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
279 reg = <0x1417c 0x14>;
282 compatible = "ti,da830-usb-phy";
288 compatible = "ti,edma3-tpcc";
289 /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
291 reg-names = "edma3_cc";
292 interrupts = <11 12>;
293 interrupt-names = "edma3_ccint", "edma3_ccerrint";
296 ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
298 edma0_tptc0: tptc@8000 {
299 compatible = "ti,edma3-tptc";
300 reg = <0x8000 0x400>;
302 interrupt-names = "edm3_tcerrint";
304 edma0_tptc1: tptc@8400 {
305 compatible = "ti,edma3-tptc";
306 reg = <0x8400 0x400>;
308 interrupt-names = "edm3_tcerrint";
311 compatible = "ti,edma3-tpcc";
312 /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
313 reg = <0x230000 0x8000>;
314 reg-names = "edma3_cc";
315 interrupts = <93 94>;
316 interrupt-names = "edma3_ccint", "edma3_ccerrint";
319 ti,tptcs = <&edma1_tptc0 7>;
321 edma1_tptc0: tptc@238000 {
322 compatible = "ti,edma3-tptc";
323 reg = <0x238000 0x400>;
325 interrupt-names = "edm3_tcerrint";
327 serial0: serial@42000 {
328 compatible = "ti,da830-uart", "ns16550a";
329 reg = <0x42000 0x100>;
335 serial1: serial@10c000 {
336 compatible = "ti,da830-uart", "ns16550a";
337 reg = <0x10c000 0x100>;
343 serial2: serial@10d000 {
344 compatible = "ti,da830-uart", "ns16550a";
345 reg = <0x10d000 0x100>;
352 compatible = "ti,da830-rtc";
353 reg = <0x23000 0x1000>;
359 compatible = "ti,davinci-i2c";
360 reg = <0x22000 0x1000>;
362 #address-cells = <1>;
367 compatible = "ti,davinci-i2c";
368 reg = <0x228000 0x1000>;
370 #address-cells = <1>;
375 compatible = "ti,davinci-wdt";
376 reg = <0x21000 0x1000>;
380 compatible = "ti,da830-mmc";
381 reg = <0x40000 0x1000>;
385 dmas = <&edma0 16 0>, <&edma0 17 0>;
386 dma-names = "rx", "tx";
390 compatible = "ti,da850-vpif";
391 reg = <0x217000 0x1000>;
395 /* VPIF capture port */
397 #address-cells = <1>;
401 /* VPIF display port */
403 #address-cells = <1>;
408 compatible = "ti,da830-mmc";
409 reg = <0x21b000 0x1000>;
413 dmas = <&edma1 28 0>, <&edma1 29 0>;
414 dma-names = "rx", "tx";
417 ehrpwm0: pwm@300000 {
418 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
421 reg = <0x300000 0x2000>;
424 ehrpwm1: pwm@302000 {
425 compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
428 reg = <0x302000 0x2000>;
432 compatible = "ti,da850-ecap", "ti,am3352-ecap",
435 reg = <0x306000 0x80>;
439 compatible = "ti,da850-ecap", "ti,am3352-ecap",
442 reg = <0x307000 0x80>;
446 compatible = "ti,da850-ecap", "ti,am3352-ecap",
449 reg = <0x308000 0x80>;
453 #address-cells = <1>;
455 compatible = "ti,da830-spi";
456 reg = <0x41000 0x1000>;
458 ti,davinci-spi-intr-line = <1>;
460 dmas = <&edma0 14 0>, <&edma0 15 0>;
461 dma-names = "rx", "tx";
465 #address-cells = <1>;
467 compatible = "ti,da830-spi";
468 reg = <0x30e000 0x1000>;
470 ti,davinci-spi-intr-line = <1>;
472 dmas = <&edma0 18 0>, <&edma0 19 0>;
473 dma-names = "rx", "tx";
477 compatible = "ti,da830-musb";
478 reg = <0x200000 0x1000>;
481 interrupt-names = "mc";
484 phy-names = "usb-phy";
487 #address-cells = <1>;
490 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
491 &cppi41dma 2 0 &cppi41dma 3 0
492 &cppi41dma 0 1 &cppi41dma 1 1
493 &cppi41dma 2 1 &cppi41dma 3 1>;
495 "rx1", "rx2", "rx3", "rx4",
496 "tx1", "tx2", "tx3", "tx4";
498 cppi41dma: dma-controller@201000 {
499 compatible = "ti,da830-cppi41";
500 reg = <0x201000 0x1000
503 reg-names = "controller",
504 "scheduler", "queuemgr";
512 compatible = "ti,da850-ahci";
513 reg = <0x218000 0x2000>, <0x22c018 0x4>;
518 compatible = "ti,davinci_mdio";
519 #address-cells = <1>;
521 reg = <0x224000 0x1000>;
524 eth0: ethernet@220000 {
525 compatible = "ti,davinci-dm6467-emac";
526 reg = <0x220000 0x4000>;
527 ti,davinci-ctrl-reg-offset = <0x3000>;
528 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
529 ti,davinci-ctrl-ram-offset = <0>;
530 ti,davinci-ctrl-ram-size = <0x2000>;
531 local-mac-address = [ 00 00 00 00 00 00 ];
540 compatible = "ti,da830-ohci";
541 reg = <0x225000 0x1000>;
544 phy-names = "usb-phy";
548 compatible = "ti,dm6441-gpio";
551 reg = <0x226000 0x1000>;
552 interrupts = <42 43 44 45 46 47 48 49 50>;
554 ti,davinci-gpio-unbanked = <0>;
556 interrupt-controller;
557 #interrupt-cells = <2>;
558 gpio-ranges = <&pmx_core 0 15 1>,
638 <&pmx_core 80 103 1>,
639 <&pmx_core 81 102 1>,
640 <&pmx_core 82 101 1>,
641 <&pmx_core 83 100 1>,
654 <&pmx_core 96 158 1>,
655 <&pmx_core 97 157 1>,
656 <&pmx_core 98 156 1>,
657 <&pmx_core 99 155 1>,
658 <&pmx_core 100 154 1>,
659 <&pmx_core 101 129 1>,
660 <&pmx_core 102 113 1>,
661 <&pmx_core 103 112 1>,
662 <&pmx_core 104 111 1>,
663 <&pmx_core 105 110 1>,
664 <&pmx_core 106 109 1>,
665 <&pmx_core 107 108 1>,
666 <&pmx_core 108 107 1>,
667 <&pmx_core 109 106 1>,
668 <&pmx_core 110 105 1>,
669 <&pmx_core 111 104 1>,
670 <&pmx_core 112 145 1>,
671 <&pmx_core 113 144 1>,
672 <&pmx_core 114 143 1>,
673 <&pmx_core 115 142 1>,
674 <&pmx_core 116 141 1>,
675 <&pmx_core 117 140 1>,
676 <&pmx_core 118 139 1>,
677 <&pmx_core 119 138 1>,
678 <&pmx_core 120 137 1>,
679 <&pmx_core 121 136 1>,
680 <&pmx_core 122 135 1>,
681 <&pmx_core 123 134 1>,
682 <&pmx_core 124 133 1>,
683 <&pmx_core 125 132 1>,
684 <&pmx_core 126 131 1>,
685 <&pmx_core 127 130 1>,
686 <&pmx_core 128 159 1>,
687 <&pmx_core 129 31 1>,
688 <&pmx_core 130 30 1>,
689 <&pmx_core 131 20 1>,
690 <&pmx_core 132 28 1>,
691 <&pmx_core 133 27 1>,
692 <&pmx_core 134 26 1>,
693 <&pmx_core 135 23 1>,
694 <&pmx_core 136 153 1>,
695 <&pmx_core 137 152 1>,
696 <&pmx_core 138 151 1>,
697 <&pmx_core 139 150 1>,
698 <&pmx_core 140 149 1>,
699 <&pmx_core 141 148 1>,
700 <&pmx_core 142 147 1>,
701 <&pmx_core 143 146 1>;
703 pinconf: pin-controller@22c00c {
704 compatible = "ti,da850-pupd";
705 reg = <0x22c00c 0x8>;
709 mcasp0: mcasp@100000 {
710 compatible = "ti,da830-mcasp-audio";
711 reg = <0x100000 0x2000>,
713 reg-names = "mpu", "dat";
715 interrupt-names = "common";
719 dma-names = "tx", "rx";
722 lcdc: display@213000 {
723 compatible = "ti,da850-tilcdc";
724 reg = <0x213000 0x1000>;
726 max-pixelclock = <37500>;
730 aemif: aemif@68000000 {
731 compatible = "ti,da850-aemif";
732 #address-cells = <2>;
735 reg = <0x68000000 0x00008000>;
736 ranges = <0 0 0x60000000 0x08000000
737 1 0 0x68000000 0x00008000>;
740 memctrl: memory-controller@b0000000 {
741 compatible = "ti,da850-ddr-controller";
742 reg = <0xb0000000 0xe8>;