2 * Broadcom BCM470X / BCM5301X ARM platform code.
3 * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
4 * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
6 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include <dt-bindings/clock/bcm-nsp.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
22 chipcommonA@18000000 {
23 compatible = "simple-bus";
24 ranges = <0x00000000 0x18000000 0x00001000>;
29 compatible = "ns16550";
31 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
32 clocks = <&iprocslow>;
37 compatible = "ns16550";
39 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
40 clocks = <&iprocslow>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinmux_uart1>;
48 compatible = "simple-bus";
49 ranges = <0x00000000 0x19000000 0x00023000>;
55 compatible = "brcm,nsp-armpll";
57 reg = <0x00000 0x1000>;
61 compatible = "arm,cortex-a9-scu";
62 reg = <0x20000 0x100>;
66 compatible = "arm,cortex-a9-global-timer";
67 reg = <0x20200 0x100>;
68 interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
69 clocks = <&periph_clk>;
73 compatible = "arm,cortex-a9-twd-timer";
75 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
76 IRQ_TYPE_EDGE_RISING)>;
77 clocks = <&periph_clk>;
81 compatible = "arm,cortex-a9-twd-wdt";
83 interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
84 IRQ_TYPE_EDGE_RISING)>;
85 clocks = <&periph_clk>;
88 gic: interrupt-controller@21000 {
89 compatible = "arm,cortex-a9-gic";
90 #interrupt-cells = <3>;
93 reg = <0x21000 0x1000>,
97 L2: cache-controller@22000 {
98 compatible = "arm,pl310-cache";
99 reg = <0x22000 0x1000>;
103 prefetch-instr = <1>;
109 compatible = "arm,cortex-a9-pmu";
111 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
112 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
116 #address-cells = <1>;
122 compatible = "fixed-clock";
123 clock-frequency = <25000000>;
128 compatible = "fixed-factor-clock";
129 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
134 iprocslow: iprocslow {
136 compatible = "fixed-factor-clock";
137 clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
142 periph_clk: periph_clk {
144 compatible = "fixed-factor-clock";
151 usb2_phy: usb2-phy@1800c000 {
152 compatible = "brcm,ns-usb2-phy";
153 reg = <0x1800c000 0x1000>;
156 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
157 clock-names = "phy-ref-clk";
161 compatible = "brcm,bus-axi";
162 reg = <0x18000000 0x1000>;
163 ranges = <0x00000000 0x18000000 0x00100000>;
164 #address-cells = <1>;
167 #interrupt-cells = <1>;
168 interrupt-map-mask = <0x000fffff 0xffff>;
171 <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
173 /* Switch Register Access Block */
174 <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
175 <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
176 <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
177 <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
178 <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
179 <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
180 <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
181 <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
182 <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
183 <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
184 <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
185 <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
186 <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
188 /* PCIe Controller 0 */
189 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
190 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
191 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
192 <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
193 <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
194 <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
196 /* PCIe Controller 1 */
197 <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
198 <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
199 <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
200 <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
201 <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
202 <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
204 /* PCIe Controller 2 */
205 <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
206 <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
207 <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
208 <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
209 <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
210 <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
212 /* USB 2.0 Controller */
213 <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
215 /* USB 3.0 Controller */
216 <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
218 /* Ethernet Controller 0 */
219 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
221 /* Ethernet Controller 1 */
222 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
224 /* Ethernet Controller 2 */
225 <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
227 /* Ethernet Controller 3 */
228 <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
230 /* NAND Controller */
231 <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
232 <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
233 <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
234 <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
235 <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
236 <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
237 <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
238 <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
240 chipcommon: chipcommon@0 {
241 reg = <0x00000000 0x1000>;
248 reg = <0x00012000 0x1000>;
252 reg = <0x00013000 0x1000>;
256 reg = <0x00014000 0x1000>;
260 reg = <0x00021000 0x1000>;
262 #address-cells = <1>;
266 interrupt-parent = <&gic>;
271 compatible = "generic-ehci";
272 reg = <0x00021000 0x1000>;
273 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
276 #address-cells = <1>;
281 #trigger-source-cells = <0>;
286 #trigger-source-cells = <0>;
293 compatible = "generic-ohci";
294 reg = <0x00022000 0x1000>;
295 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
297 #address-cells = <1>;
302 #trigger-source-cells = <0>;
307 #trigger-source-cells = <0>;
313 reg = <0x00023000 0x1000>;
315 #address-cells = <1>;
319 interrupt-parent = <&gic>;
324 compatible = "generic-xhci";
325 reg = <0x00023000 0x1000>;
326 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
330 #address-cells = <1>;
335 #trigger-source-cells = <0>;
340 gmac0: ethernet@24000 {
341 reg = <0x24000 0x800>;
344 gmac1: ethernet@25000 {
345 reg = <0x25000 0x800>;
348 gmac2: ethernet@26000 {
349 reg = <0x26000 0x800>;
352 gmac3: ethernet@27000 {
353 reg = <0x27000 0x800>;
358 compatible = "brcm,iproc-pwm";
359 reg = <0x18002000 0x28>;
365 mdio: mdio@18003000 {
366 compatible = "brcm,iproc-mdio";
367 reg = <0x18003000 0x8>;
369 #address-cells = <1>;
372 mdio-bus-mux@18003000 {
373 compatible = "mdio-mux-mmioreg";
374 mdio-parent-bus = <&mdio>;
375 #address-cells = <1>;
377 reg = <0x18003000 0x4>;
382 #address-cells = <1>;
385 usb3_phy: usb3-phy@10 {
386 compatible = "brcm,ns-ax-usb3-phy";
388 usb3-dmp-syscon = <&usb3_dmp>;
395 usb3_dmp: syscon@18105000 {
396 reg = <0x18105000 0x1000>;
399 uart2: serial@18008000 {
400 compatible = "ns16550a";
401 reg = <0x18008000 0x20>;
402 clocks = <&iprocslow>;
403 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
409 compatible = "brcm,iproc-i2c";
410 reg = <0x18009000 0x50>;
411 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
412 #address-cells = <1>;
414 clock-frequency = <100000>;
419 compatible = "simple-bus";
420 ranges = <0 0x1800c000 0x1000>;
421 #address-cells = <1>;
425 compatible = "simple-bus";
428 #address-cells = <1>;
433 compatible = "brcm,nsp-lcpll0";
436 clock-output-names = "lcpll0", "pcie_phy",
442 compatible = "brcm,nsp-genpll";
445 clock-output-names = "genpll", "phy",
447 "usbclk", "iprocfast",
451 pinctrl: pin-controller@1c0 {
452 compatible = "brcm,bcm4708-pinmux";
454 reg-names = "cru_gpio_control";
467 groups = "pwm0_grp", "pwm1_grp",
468 "pwm2_grp", "pwm3_grp";
472 pinmux_uart1: uart1 {
473 groups = "uart1_grp";
478 thermal: thermal@2c0 {
479 compatible = "brcm,ns-thermal";
481 #thermal-sensor-cells = <0>;
486 srab: ethernet-switch@18007000 {
487 compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
488 reg = <0x18007000 0x1000>;
492 /* ports are defined in board DTS */
494 #address-cells = <1>;
500 compatible = "brcm,bcm5301x-rng";
501 reg = <0x18004000 0x14>;
504 nand: nand@18028000 {
505 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
506 reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
507 reg-names = "nand", "iproc-idm", "iproc-ext";
508 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
510 #address-cells = <1>;
517 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
518 reg = <0x18029200 0x184>,
522 reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
523 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
524 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
525 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
526 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
527 <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
528 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
529 <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
530 interrupt-names = "spi_lr_fullness_reached",
531 "spi_lr_session_aborted",
533 "spi_lr_session_done",
537 clocks = <&iprocmed>;
538 clock-names = "iprocmed";
540 #address-cells = <1>;
544 compatible = "jedec,spi-nor";
546 spi-max-frequency = <20000000>;
550 compatible = "brcm,bcm947xx-cfe-partitions";
556 cpu_thermal: cpu-thermal {
557 polling-delay-passive = <0>;
558 polling-delay = <1000>;
559 coefficients = <(-556) 418000>;
560 thermal-sensors = <&thermal>;
564 temperature = <125000>;