arch/arm/boot/dts/bcm283x.dtsi

   1 #include <dt-bindings/pinctrl/bcm2835.h>
   2 #include <dt-bindings/clock/bcm2835.h>
   3 #include <dt-bindings/clock/bcm2835-aux.h>
   4 #include "skeleton.dtsi"
   5
   6 /* This include file covers the common peripherals and configuration between
   7  * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
   8  * bcm2835.dtsi and bcm2836.dtsi.
   9  */
  10
  11 / {
  12         compatible = "brcm,bcm2835";
  13         model = "BCM2835";
  14         interrupt-parent = <&intc>;
  15
  16         chosen {
  17                 bootargs = "earlyprintk console=ttyAMA0";
  18         };
  19
  20         soc {
  21                 compatible = "simple-bus";
  22                 #address-cells = <1>;
  23                 #size-cells = <1>;
  24
  25                 timer@7e003000 {
  26                         compatible = "brcm,bcm2835-system-timer";
  27                         reg = <0x7e003000 0x1000>;
  28                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  29                         /* This could be a reference to BCM2835_CLOCK_TIMER,
  30                          * but we don't have the driver using the common clock
  31                          * support yet.
  32                          */
  33                         clock-frequency = <1000000>;
  34                 };
  35
  36                 dma: dma@7e007000 {
  37                         compatible = "brcm,bcm2835-dma";
  38                         reg = <0x7e007000 0xf00>;
  39                         interrupts = <1 16>,
  40                                      <1 17>,
  41                                      <1 18>,
  42                                      <1 19>,
  43                                      <1 20>,
  44                                      <1 21>,
  45                                      <1 22>,
  46                                      <1 23>,
  47                                      <1 24>,
  48                                      <1 25>,
  49                                      <1 26>,
  50                                      /* dma channel 11-14 share one irq */
  51                                      <1 27>,
  52                                      <1 27>,
  53                                      <1 27>,
  54                                      <1 27>,
  55                                      /* unused shared irq for all channels */
  56                                      <1 28>;
  57                         interrupt-names = "dma0",
  58                                           "dma1",
  59                                           "dma2",
  60                                           "dma3",
  61                                           "dma4",
  62                                           "dma5",
  63                                           "dma6",
  64                                           "dma7",
  65                                           "dma8",
  66                                           "dma9",
  67                                           "dma10",
  68                                           "dma11",
  69                                           "dma12",
  70                                           "dma13",
  71                                           "dma14",
  72                                           "dma-shared-all";
  73                         #dma-cells = <1>;
  74                         brcm,dma-channel-mask = <0x7f35>;
  75                 };
  76
  77                 intc: interrupt-controller@7e00b200 {
  78                         compatible = "brcm,bcm2835-armctrl-ic";
  79                         reg = <0x7e00b200 0x200>;
  80                         interrupt-controller;
  81                         #interrupt-cells = <2>;
  82                 };
  83
  84                 watchdog@7e100000 {
  85                         compatible = "brcm,bcm2835-pm-wdt";
  86                         reg = <0x7e100000 0x28>;
  87                 };
  88
  89                 clocks: cprman@7e101000 {
  90                         compatible = "brcm,bcm2835-cprman";
  91                         #clock-cells = <1>;
  92                         reg = <0x7e101000 0x2000>;
  93
  94                         /* CPRMAN derives everything from the platform's
  95                          * oscillator.
  96                          */
  97                         clocks = <&clk_osc>;
  98                 };
  99
 100                 rng@7e104000 {
 101                         compatible = "brcm,bcm2835-rng";
 102                         reg = <0x7e104000 0x10>;
 103                 };
 104
 105                 mailbox: mailbox@7e00b800 {
 106                         compatible = "brcm,bcm2835-mbox";
 107                         reg = <0x7e00b880 0x40>;
 108                         interrupts = <0 1>;
 109                         #mbox-cells = <0>;
 110                 };
 111
 112                 gpio: gpio@7e200000 {
 113                         compatible = "brcm,bcm2835-gpio";
 114                         reg = <0x7e200000 0xb4>;
 115                         /*
 116                          * The GPIO IP block is designed for 3 banks of GPIOs.
 117                          * Each bank has a GPIO interrupt for itself.
 118                          * There is an overall "any bank" interrupt.
 119                          * In order, these are GIC interrupts 17, 18, 19, 20.
 120                          * Since the BCM2835 only has 2 banks, the 2nd bank
 121                          * interrupt output appears to be mirrored onto the
 122                          * 3rd bank's interrupt signal.
 123                          * So, a bank0 interrupt shows up on 17, 20, and
 124                          * a bank1 interrupt shows up on 18, 19, 20!
 125                          */
 126                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
 127
 128                         gpio-controller;
 129                         #gpio-cells = <2>;
 130
 131                         interrupt-controller;
 132                         #interrupt-cells = <2>;
 133                 };
 134
 135                 uart0: serial@7e201000 {
 136                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 137                         reg = <0x7e201000 0x1000>;
 138                         interrupts = <2 25>;
 139                         clocks = <&clocks BCM2835_CLOCK_UART>,
 140                                  <&clocks BCM2835_CLOCK_VPU>;
 141                         clock-names = "uartclk", "apb_pclk";
 142                         arm,primecell-periphid = <0x00241011>;
 143                 };
 144
 145                 i2s: i2s@7e203000 {
 146                         compatible = "brcm,bcm2835-i2s";
 147                         reg = <0x7e203000 0x20>,
 148                               <0x7e101098 0x02>;
 149
 150                         dmas = <&dma 2>,
 151                                <&dma 3>;
 152                         dma-names = "tx", "rx";
 153                         status = "disabled";
 154                 };
 155
 156                 spi: spi@7e204000 {
 157                         compatible = "brcm,bcm2835-spi";
 158                         reg = <0x7e204000 0x1000>;
 159                         interrupts = <2 22>;
 160                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 161                         #address-cells = <1>;
 162                         #size-cells = <0>;
 163                         status = "disabled";
 164                 };
 165
 166                 i2c0: i2c@7e205000 {
 167                         compatible = "brcm,bcm2835-i2c";
 168                         reg = <0x7e205000 0x1000>;
 169                         interrupts = <2 21>;
 170                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 171                         #address-cells = <1>;
 172                         #size-cells = <0>;
 173                         status = "disabled";
 174                 };
 175
 176                 aux: aux@0x7e215000 {
 177                         compatible = "brcm,bcm2835-aux";
 178                         #clock-cells = <1>;
 179                         reg = <0x7e215000 0x8>;
 180                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 181                 };
 182
 183                 uart1: serial@7e215040 {
 184                         compatible = "brcm,bcm2835-aux-uart";
 185                         reg = <0x7e215040 0x40>;
 186                         interrupts = <1 29>;
 187                         clocks = <&aux BCM2835_AUX_CLOCK_UART>;
 188                         status = "disabled";
 189                 };
 190
 191                 spi1: spi@7e215080 {
 192                         compatible = "brcm,bcm2835-aux-spi";
 193                         reg = <0x7e215080 0x40>;
 194                         interrupts = <1 29>;
 195                         clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
 196                         #address-cells = <1>;
 197                         #size-cells = <0>;
 198                         status = "disabled";
 199                 };
 200
 201                 spi2: spi@7e2150c0 {
 202                         compatible = "brcm,bcm2835-aux-spi";
 203                         reg = <0x7e2150c0 0x40>;
 204                         interrupts = <1 29>;
 205                         clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
 206                         #address-cells = <1>;
 207                         #size-cells = <0>;
 208                         status = "disabled";
 209                 };
 210
 211                 pwm: pwm@7e20c000 {
 212                         compatible = "brcm,bcm2835-pwm";
 213                         reg = <0x7e20c000 0x28>;
 214                         clocks = <&clocks BCM2835_CLOCK_PWM>;
 215                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 216                         assigned-clock-rates = <10000000>;
 217                         #pwm-cells = <2>;
 218                         status = "disabled";
 219                 };
 220
 221                 sdhci: sdhci@7e300000 {
 222                         compatible = "brcm,bcm2835-sdhci";
 223                         reg = <0x7e300000 0x100>;
 224                         interrupts = <2 30>;
 225                         clocks = <&clocks BCM2835_CLOCK_EMMC>;
 226                         status = "disabled";
 227                 };
 228
 229                 i2c1: i2c@7e804000 {
 230                         compatible = "brcm,bcm2835-i2c";
 231                         reg = <0x7e804000 0x1000>;
 232                         interrupts = <2 21>;
 233                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 234                         #address-cells = <1>;
 235                         #size-cells = <0>;
 236                         status = "disabled";
 237                 };
 238
 239                 i2c2: i2c@7e805000 {
 240                         compatible = "brcm,bcm2835-i2c";
 241                         reg = <0x7e805000 0x1000>;
 242                         interrupts = <2 21>;
 243                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 244                         #address-cells = <1>;
 245                         #size-cells = <0>;
 246                         status = "disabled";
 247                 };
 248
 249                 usb: usb@7e980000 {
 250                         compatible = "brcm,bcm2835-usb";
 251                         reg = <0x7e980000 0x10000>;
 252                         interrupts = <1 9>;
 253                 };
 254         };
 255
 256         clocks {
 257                 compatible = "simple-bus";
 258                 #address-cells = <1>;
 259                 #size-cells = <0>;
 260
 261                 /* The oscillator is the root of the clock tree. */
 262                 clk_osc: clock@3 {
 263                         compatible = "fixed-clock";
 264                         reg = <3>;
 265                         #clock-cells = <0>;
 266                         clock-output-names = "osc";
 267                         clock-frequency = <19200000>;
 268                 };
 269
 270         };
 271 };