arch/arm/boot/dts/bcm2837.dtsi

   1 #include "bcm283x.dtsi"
   2 #include "bcm2835-common.dtsi"
   3
   4 / {
   5         compatible = "brcm,bcm2837";
   6
   7         soc {
   8                 ranges = <0x7e000000 0x3f000000 0x1000000>,
   9                          <0x40000000 0x40000000 0x00001000>;
  10                 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
  11
  12                 local_intc: local_intc@40000000 {
  13                         compatible = "brcm,bcm2836-l1-intc";
  14                         reg = <0x40000000 0x100>;
  15                         interrupt-controller;
  16                         #interrupt-cells = <2>;
  17                         interrupt-parent = <&local_intc>;
  18                 };
  19         };
  20
  21         arm-pmu {
  22                 compatible = "arm,cortex-a53-pmu";
  23                 interrupt-parent = <&local_intc>;
  24                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
  25         };
  26
  27         timer {
  28                 compatible = "arm,armv7-timer";
  29                 interrupt-parent = <&local_intc>;
  30                 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
  31                              <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
  32                              <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
  33                              <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
  34                 always-on;
  35         };
  36
  37         cpus: cpus {
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40                 enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
  41
  42                 cpu0: cpu@0 {
  43                         device_type = "cpu";
  44                         compatible = "arm,cortex-a53";
  45                         reg = <0>;
  46                         enable-method = "spin-table";
  47                         cpu-release-addr = <0x0 0x000000d8>;
  48                 };
  49
  50                 cpu1: cpu@1 {
  51                         device_type = "cpu";
  52                         compatible = "arm,cortex-a53";
  53                         reg = <1>;
  54                         enable-method = "spin-table";
  55                         cpu-release-addr = <0x0 0x000000e0>;
  56                 };
  57
  58                 cpu2: cpu@2 {
  59                         device_type = "cpu";
  60                         compatible = "arm,cortex-a53";
  61                         reg = <2>;
  62                         enable-method = "spin-table";
  63                         cpu-release-addr = <0x0 0x000000e8>;
  64                 };
  65
  66                 cpu3: cpu@3 {
  67                         device_type = "cpu";
  68                         compatible = "arm,cortex-a53";
  69                         reg = <3>;
  70                         enable-method = "spin-table";
  71                         cpu-release-addr = <0x0 0x000000f0>;
  72                 };
  73         };
  74 };
  75
  76 /* Make the BCM2835-style global interrupt controller be a child of the
  77  * CPU-local interrupt controller.
  78  */
  79 &intc {
  80         compatible = "brcm,bcm2836-armctrl-ic";
  81         reg = <0x7e00b200 0x200>;
  82         interrupt-parent = <&local_intc>;
  83         interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
  84 };
  85
  86 &cpu_thermal {
  87         coefficients = <(-538)  412000>;
  88 };
  89
  90 /* enable thermal sensor with the correct compatible property set */
  91 &thermal {
  92         compatible = "brcm,bcm2837-thermal";
  93         status = "okay";
  94 };