Merge branch 'topic/nhlt' into for-next
[linux-2.6-microblaze.git] / arch / arm / boot / dts / bcm2836.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 #include "bcm283x.dtsi"
3 #include "bcm2835-common.dtsi"
4
5 / {
6         compatible = "brcm,bcm2836";
7
8         soc {
9                 ranges = <0x7e000000 0x3f000000 0x1000000>,
10                          <0x40000000 0x40000000 0x00001000>;
11                 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12
13                 local_intc: local_intc@40000000 {
14                         compatible = "brcm,bcm2836-l1-intc";
15                         reg = <0x40000000 0x100>;
16                         interrupt-controller;
17                         #interrupt-cells = <2>;
18                         interrupt-parent = <&local_intc>;
19                 };
20         };
21
22         arm-pmu {
23                 compatible = "arm,cortex-a7-pmu";
24                 interrupt-parent = <&local_intc>;
25                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
26         };
27
28         timer {
29                 compatible = "arm,armv7-timer";
30                 interrupt-parent = <&local_intc>;
31                 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
32                              <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
33                              <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
34                              <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
35                 always-on;
36         };
37
38         cpus: cpus {
39                 #address-cells = <1>;
40                 #size-cells = <0>;
41                 enable-method = "brcm,bcm2836-smp";
42
43                 v7_cpu0: cpu@0 {
44                         device_type = "cpu";
45                         compatible = "arm,cortex-a7";
46                         reg = <0xf00>;
47                         clock-frequency = <800000000>;
48                 };
49
50                 v7_cpu1: cpu@1 {
51                         device_type = "cpu";
52                         compatible = "arm,cortex-a7";
53                         reg = <0xf01>;
54                         clock-frequency = <800000000>;
55                 };
56
57                 v7_cpu2: cpu@2 {
58                         device_type = "cpu";
59                         compatible = "arm,cortex-a7";
60                         reg = <0xf02>;
61                         clock-frequency = <800000000>;
62                 };
63
64                 v7_cpu3: cpu@3 {
65                         device_type = "cpu";
66                         compatible = "arm,cortex-a7";
67                         reg = <0xf03>;
68                         clock-frequency = <800000000>;
69                 };
70         };
71 };
72
73 /* Make the BCM2835-style global interrupt controller be a child of the
74  * CPU-local interrupt controller.
75  */
76 &intc {
77         compatible = "brcm,bcm2836-armctrl-ic";
78         reg = <0x7e00b200 0x200>;
79         interrupt-parent = <&local_intc>;
80         interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
81 };
82
83 &cpu_thermal {
84         coefficients = <(-538)  407000>;
85 };
86
87 /* enable thermal sensor with the correct compatible property set */
88 &thermal {
89         compatible = "brcm,bcm2836-thermal";
90         status = "okay";
91 };