arch/arm/boot/dts/bcm2835-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /* This include file covers the common peripherals and configuration between
   4  * bcm2835, bcm2836 and bcm2837 implementations.
   5  */
   6
   7 / {
   8         interrupt-parent = <&intc>;
   9
  10         soc {
  11                 dma: dma@7e007000 {
  12                         compatible = "brcm,bcm2835-dma";
  13                         reg = <0x7e007000 0xf00>;
  14                         interrupts = <1 16>,
  15                                      <1 17>,
  16                                      <1 18>,
  17                                      <1 19>,
  18                                      <1 20>,
  19                                      <1 21>,
  20                                      <1 22>,
  21                                      <1 23>,
  22                                      <1 24>,
  23                                      <1 25>,
  24                                      <1 26>,
  25                                      /* dma channel 11-14 share one irq */
  26                                      <1 27>,
  27                                      <1 27>,
  28                                      <1 27>,
  29                                      <1 27>,
  30                                      /* unused shared irq for all channels */
  31                                      <1 28>;
  32                         interrupt-names = "dma0",
  33                                           "dma1",
  34                                           "dma2",
  35                                           "dma3",
  36                                           "dma4",
  37                                           "dma5",
  38                                           "dma6",
  39                                           "dma7",
  40                                           "dma8",
  41                                           "dma9",
  42                                           "dma10",
  43                                           "dma11",
  44                                           "dma12",
  45                                           "dma13",
  46                                           "dma14",
  47                                           "dma-shared-all";
  48                         #dma-cells = <1>;
  49                         brcm,dma-channel-mask = <0x7f35>;
  50                 };
  51
  52                 intc: interrupt-controller@7e00b200 {
  53                         compatible = "brcm,bcm2835-armctrl-ic";
  54                         reg = <0x7e00b200 0x200>;
  55                         interrupt-controller;
  56                         #interrupt-cells = <2>;
  57                 };
  58
  59                 pm: watchdog@7e100000 {
  60                         compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
  61                         #power-domain-cells = <1>;
  62                         #reset-cells = <1>;
  63                         reg = <0x7e100000 0x114>,
  64                               <0x7e00a000 0x24>;
  65                         clocks = <&clocks BCM2835_CLOCK_V3D>,
  66                                  <&clocks BCM2835_CLOCK_PERI_IMAGE>,
  67                                  <&clocks BCM2835_CLOCK_H264>,
  68                                  <&clocks BCM2835_CLOCK_ISP>;
  69                         clock-names = "v3d", "peri_image", "h264", "isp";
  70                         system-power-controller;
  71                 };
  72
  73                 rng@7e104000 {
  74                         compatible = "brcm,bcm2835-rng";
  75                         reg = <0x7e104000 0x10>;
  76                         interrupts = <2 29>;
  77                 };
  78
  79                 pixelvalve@7e206000 {
  80                         compatible = "brcm,bcm2835-pixelvalve0";
  81                         reg = <0x7e206000 0x100>;
  82                         interrupts = <2 13>; /* pwa0 */
  83                 };
  84
  85                 pixelvalve@7e207000 {
  86                         compatible = "brcm,bcm2835-pixelvalve1";
  87                         reg = <0x7e207000 0x100>;
  88                         interrupts = <2 14>; /* pwa1 */
  89                 };
  90
  91                 thermal: thermal@7e212000 {
  92                         compatible = "brcm,bcm2835-thermal";
  93                         reg = <0x7e212000 0x8>;
  94                         clocks = <&clocks BCM2835_CLOCK_TSENS>;
  95                         #thermal-sensor-cells = <0>;
  96                         status = "disabled";
  97                 };
  98
  99                 i2c2: i2c@7e805000 {
 100                         compatible = "brcm,bcm2835-i2c";
 101                         reg = <0x7e805000 0x1000>;
 102                         interrupts = <2 21>;
 103                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 104                         #address-cells = <1>;
 105                         #size-cells = <0>;
 106                         status = "okay";
 107                 };
 108
 109                 pixelvalve@7e807000 {
 110                         compatible = "brcm,bcm2835-pixelvalve2";
 111                         reg = <0x7e807000 0x100>;
 112                         interrupts = <2 10>; /* pixelvalve */
 113                 };
 114
 115                 hdmi: hdmi@7e902000 {
 116                         compatible = "brcm,bcm2835-hdmi";
 117                         reg = <0x7e902000 0x600>,
 118                               <0x7e808000 0x100>;
 119                         interrupts = <2 8>, <2 9>;
 120                         ddc = <&i2c2>;
 121                         clocks = <&clocks BCM2835_PLLH_PIX>,
 122                                  <&clocks BCM2835_CLOCK_HSM>;
 123                         clock-names = "pixel", "hdmi";
 124                         dmas = <&dma 17>;
 125                         dma-names = "audio-rx";
 126                         status = "disabled";
 127                 };
 128
 129                 v3d: v3d@7ec00000 {
 130                         compatible = "brcm,bcm2835-v3d";
 131                         reg = <0x7ec00000 0x1000>;
 132                         interrupts = <1 10>;
 133                         power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
 134                 };
 135
 136                 vc4: gpu {
 137                         compatible = "brcm,bcm2835-vc4";
 138                 };
 139         };
 140 };
 141
 142 &cpu_thermal {
 143         thermal-sensors = <&thermal>;
 144 };
 145
 146 &gpio {
 147         i2c_slave_gpio18: i2c_slave_gpio18 {
 148                 brcm,pins = <18 19 20 21>;
 149                 brcm,function = <BCM2835_FSEL_ALT3>;
 150         };
 151
 152         jtag_gpio4: jtag_gpio4 {
 153                 brcm,pins = <4 5 6 12 13>;
 154                 brcm,function = <BCM2835_FSEL_ALT5>;
 155         };
 156
 157         pwm0_gpio12: pwm0_gpio12 {
 158                 brcm,pins = <12>;
 159                 brcm,function = <BCM2835_FSEL_ALT0>;
 160         };
 161         pwm0_gpio18: pwm0_gpio18 {
 162                 brcm,pins = <18>;
 163                 brcm,function = <BCM2835_FSEL_ALT5>;
 164         };
 165         pwm0_gpio40: pwm0_gpio40 {
 166                 brcm,pins = <40>;
 167                 brcm,function = <BCM2835_FSEL_ALT0>;
 168         };
 169         pwm1_gpio13: pwm1_gpio13 {
 170                 brcm,pins = <13>;
 171                 brcm,function = <BCM2835_FSEL_ALT0>;
 172         };
 173         pwm1_gpio19: pwm1_gpio19 {
 174                 brcm,pins = <19>;
 175                 brcm,function = <BCM2835_FSEL_ALT5>;
 176         };
 177         pwm1_gpio41: pwm1_gpio41 {
 178                 brcm,pins = <41>;
 179                 brcm,function = <BCM2835_FSEL_ALT0>;
 180         };
 181         pwm1_gpio45: pwm1_gpio45 {
 182                 brcm,pins = <45>;
 183                 brcm,function = <BCM2835_FSEL_ALT0>;
 184         };
 185 };
 186
 187 &i2s {
 188         dmas = <&dma 2>, <&dma 3>;
 189         dma-names = "tx", "rx";
 190 };
 191
 192 &sdhost {
 193         dmas = <&dma 13>;
 194         dma-names = "rx-tx";
 195 };
 196
 197 &spi {
 198         dmas = <&dma 6>, <&dma 7>;
 199         dma-names = "tx", "rx";
 200 };