arch/arm/boot/dts/bcm11351.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 // Copyright (C) 2012-2013 Broadcom Corporation
   3
   4 #include <dt-bindings/interrupt-controller/arm-gic.h>
   5 #include <dt-bindings/interrupt-controller/irq.h>
   6
   7 #include "dt-bindings/clock/bcm281xx.h"
   8
   9 / {
  10         #address-cells = <1>;
  11         #size-cells = <1>;
  12         model = "BCM11351 SoC";
  13         compatible = "brcm,bcm11351";
  14         interrupt-parent = <&gic>;
  15
  16         chosen {
  17                 bootargs = "console=ttyS0,115200n8";
  18         };
  19
  20         cpus {
  21                 #address-cells = <1>;
  22                 #size-cells = <0>;
  23
  24                 cpu0: cpu@0 {
  25                         device_type = "cpu";
  26                         compatible = "arm,cortex-a9";
  27                         reg = <0>;
  28                 };
  29
  30                 cpu1: cpu@1 {
  31                         device_type = "cpu";
  32                         compatible = "arm,cortex-a9";
  33                         enable-method = "brcm,bcm11351-cpu-method";
  34                         secondary-boot-reg = <0x3500417c>;
  35                         reg = <1>;
  36                 };
  37         };
  38
  39         gic: interrupt-controller@3ff00100 {
  40                 compatible = "arm,cortex-a9-gic";
  41                 #interrupt-cells = <3>;
  42                 #address-cells = <0>;
  43                 interrupt-controller;
  44                 reg = <0x3ff01000 0x1000>,
  45                       <0x3ff00100 0x100>;
  46         };
  47
  48         smc@3404c000 {
  49                 compatible = "brcm,bcm11351-smc", "brcm,kona-smc";
  50                 reg = <0x3404c000 0x400>; /* 1 KiB in SRAM */
  51         };
  52
  53         serial@3e000000 {
  54                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  55                 status = "disabled";
  56                 reg = <0x3e000000 0x1000>;
  57                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
  58                 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
  59                 reg-shift = <2>;
  60                 reg-io-width = <4>;
  61         };
  62
  63         serial@3e001000 {
  64                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  65                 status = "disabled";
  66                 reg = <0x3e001000 0x1000>;
  67                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
  68                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
  69                 reg-shift = <2>;
  70                 reg-io-width = <4>;
  71         };
  72
  73         serial@3e002000 {
  74                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  75                 status = "disabled";
  76                 reg = <0x3e002000 0x1000>;
  77                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
  78                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
  79                 reg-shift = <2>;
  80                 reg-io-width = <4>;
  81         };
  82
  83         serial@3e003000 {
  84                 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
  85                 status = "disabled";
  86                 reg = <0x3e003000 0x1000>;
  87                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
  88                 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
  89                 reg-shift = <2>;
  90                 reg-io-width = <4>;
  91         };
  92
  93         L2: l2-cache@3ff20000 {
  94                 compatible = "brcm,bcm11351-a2-pl310-cache";
  95                 reg = <0x3ff20000 0x1000>;
  96                 cache-unified;
  97                 cache-level = <2>;
  98         };
  99
 100         watchdog@35002f40 {
 101                 compatible = "brcm,bcm11351-wdt", "brcm,kona-wdt";
 102                 reg = <0x35002f40 0x6c>;
 103         };
 104
 105         timer@35006000 {
 106                 compatible = "brcm,kona-timer";
 107                 reg = <0x35006000 0x1000>;
 108                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 109                 clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
 110         };
 111
 112         gpio: gpio@35003000 {
 113                 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
 114                 reg = <0x35003000 0x800>;
 115                 interrupts =
 116                        <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
 117                         GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
 118                         GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
 119                         GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 120                         GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
 121                         GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 122                 #gpio-cells = <2>;
 123                 #interrupt-cells = <2>;
 124                 gpio-controller;
 125                 interrupt-controller;
 126         };
 127
 128         sdio1: sdio@3f180000 {
 129                 compatible = "brcm,kona-sdhci";
 130                 reg = <0x3f180000 0x10000>;
 131                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 132                 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
 133                 status = "disabled";
 134         };
 135
 136         sdio2: sdio@3f190000 {
 137                 compatible = "brcm,kona-sdhci";
 138                 reg = <0x3f190000 0x10000>;
 139                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 140                 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
 141                 status = "disabled";
 142         };
 143
 144         sdio3: sdio@3f1a0000 {
 145                 compatible = "brcm,kona-sdhci";
 146                 reg = <0x3f1a0000 0x10000>;
 147                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 148                 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
 149                 status = "disabled";
 150         };
 151
 152         sdio4: sdio@3f1b0000 {
 153                 compatible = "brcm,kona-sdhci";
 154                 reg = <0x3f1b0000 0x10000>;
 155                 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 156                 clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
 157                 status = "disabled";
 158         };
 159
 160         pinctrl@35004800 {
 161                 compatible = "brcm,bcm11351-pinctrl";
 162                 reg = <0x35004800 0x430>;
 163         };
 164
 165         i2c@3e016000 {
 166                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 167                 reg = <0x3e016000 0x80>;
 168                 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 169                 #address-cells = <1>;
 170                 #size-cells = <0>;
 171                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
 172                 status = "disabled";
 173         };
 174
 175         i2c@3e017000 {
 176                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 177                 reg = <0x3e017000 0x80>;
 178                 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 179                 #address-cells = <1>;
 180                 #size-cells = <0>;
 181                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
 182                 status = "disabled";
 183         };
 184
 185         i2c@3e018000 {
 186                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 187                 reg = <0x3e018000 0x80>;
 188                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 189                 #address-cells = <1>;
 190                 #size-cells = <0>;
 191                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
 192                 status = "disabled";
 193         };
 194
 195         i2c@3500d000 {
 196                 compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";
 197                 reg = <0x3500d000 0x80>;
 198                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 199                 #address-cells = <1>;
 200                 #size-cells = <0>;
 201                 clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
 202                 status = "disabled";
 203         };
 204
 205         pwm: pwm@3e01a000 {
 206                 compatible = "brcm,bcm11351-pwm", "brcm,kona-pwm";
 207                 reg = <0x3e01a000 0xcc>;
 208                 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_PWM>;
 209                 #pwm-cells = <3>;
 210                 status = "disabled";
 211         };
 212
 213         clocks {
 214                 #address-cells = <1>;
 215                 #size-cells = <1>;
 216                 ranges;
 217
 218                 root_ccu: root_ccu@35001000 {
 219                         compatible = "brcm,bcm11351-root-ccu";
 220                         reg = <0x35001000 0x0f00>;
 221                         #clock-cells = <1>;
 222                         clock-output-names = "frac_1m";
 223                 };
 224
 225                 hub_ccu: hub_ccu@34000000 {
 226                         compatible = "brcm,bcm11351-hub-ccu";
 227                         reg = <0x34000000 0x0f00>;
 228                         #clock-cells = <1>;
 229                         clock-output-names = "tmon_1m";
 230                 };
 231
 232                 aon_ccu: aon_ccu@35002000 {
 233                         compatible = "brcm,bcm11351-aon-ccu";
 234                         reg = <0x35002000 0x0f00>;
 235                         #clock-cells = <1>;
 236                         clock-output-names = "hub_timer",
 237                                              "pmu_bsc",
 238                                              "pmu_bsc_var";
 239                 };
 240
 241                 master_ccu: master_ccu@3f001000 {
 242                         compatible = "brcm,bcm11351-master-ccu";
 243                         reg = <0x3f001000 0x0f00>;
 244                         #clock-cells = <1>;
 245                         clock-output-names = "sdio1",
 246                                              "sdio2",
 247                                              "sdio3",
 248                                              "sdio4",
 249                                              "usb_ic",
 250                                              "hsic2_48m",
 251                                              "hsic2_12m";
 252                 };
 253
 254                 slave_ccu: slave_ccu@3e011000 {
 255                         compatible = "brcm,bcm11351-slave-ccu";
 256                         reg = <0x3e011000 0x0f00>;
 257                         #clock-cells = <1>;
 258                         clock-output-names = "uartb",
 259                                              "uartb2",
 260                                              "uartb3",
 261                                              "uartb4",
 262                                              "ssp0",
 263                                              "ssp2",
 264                                              "bsc1",
 265                                              "bsc2",
 266                                              "bsc3",
 267                                              "pwm";
 268                 };
 269
 270                 ref_1m_clk: ref_1m {
 271                         #clock-cells = <0>;
 272                         compatible = "fixed-clock";
 273                         clock-frequency = <1000000>;
 274                 };
 275
 276                 ref_32k_clk: ref_32k {
 277                         #clock-cells = <0>;
 278                         compatible = "fixed-clock";
 279                         clock-frequency = <32768>;
 280                 };
 281
 282                 bbl_32k_clk: bbl_32k {
 283                         #clock-cells = <0>;
 284                         compatible = "fixed-clock";
 285                         clock-frequency = <32768>;
 286                 };
 287
 288                 ref_13m_clk: ref_13m {
 289                         #clock-cells = <0>;
 290                         compatible = "fixed-clock";
 291                         clock-frequency = <13000000>;
 292                 };
 293
 294                 var_13m_clk: var_13m {
 295                         #clock-cells = <0>;
 296                         compatible = "fixed-clock";
 297                         clock-frequency = <13000000>;
 298                 };
 299
 300                 dft_19_5m_clk: dft_19_5m {
 301                         #clock-cells = <0>;
 302                         compatible = "fixed-clock";
 303                         clock-frequency = <19500000>;
 304                 };
 305
 306                 ref_crystal_clk: ref_crystal {
 307                         #clock-cells = <0>;
 308                         compatible = "fixed-clock";
 309                         clock-frequency = <26000000>;
 310                 };
 311
 312                 ref_cx40_clk: ref_cx40 {
 313                         #clock-cells = <0>;
 314                         compatible = "fixed-clock";
 315                         clock-frequency = <40000000>;
 316                 };
 317
 318                 ref_52m_clk: ref_52m {
 319                         #clock-cells = <0>;
 320                         compatible = "fixed-clock";
 321                         clock-frequency = <52000000>;
 322                 };
 323
 324                 var_52m_clk: var_52m {
 325                         #clock-cells = <0>;
 326                         compatible = "fixed-clock";
 327                         clock-frequency = <52000000>;
 328                 };
 329
 330                 usb_otg_ahb_clk: usb_otg_ahb {
 331                         compatible = "fixed-clock";
 332                         clock-frequency = <52000000>;
 333                         #clock-cells = <0>;
 334                 };
 335
 336                 ref_96m_clk: ref_96m {
 337                         #clock-cells = <0>;
 338                         compatible = "fixed-clock";
 339                         clock-frequency = <96000000>;
 340                 };
 341
 342                 var_96m_clk: var_96m {
 343                         #clock-cells = <0>;
 344                         compatible = "fixed-clock";
 345                         clock-frequency = <96000000>;
 346                 };
 347
 348                 ref_104m_clk: ref_104m {
 349                         #clock-cells = <0>;
 350                         compatible = "fixed-clock";
 351                         clock-frequency = <104000000>;
 352                 };
 353
 354                 var_104m_clk: var_104m {
 355                         #clock-cells = <0>;
 356                         compatible = "fixed-clock";
 357                         clock-frequency = <104000000>;
 358                 };
 359
 360                 ref_156m_clk: ref_156m {
 361                         #clock-cells = <0>;
 362                         compatible = "fixed-clock";
 363                         clock-frequency = <156000000>;
 364                 };
 365
 366                 var_156m_clk: var_156m {
 367                         #clock-cells = <0>;
 368                         compatible = "fixed-clock";
 369                         clock-frequency = <156000000>;
 370                 };
 371
 372                 ref_208m_clk: ref_208m {
 373                         #clock-cells = <0>;
 374                         compatible = "fixed-clock";
 375                         clock-frequency = <208000000>;
 376                 };
 377
 378                 var_208m_clk: var_208m {
 379                         #clock-cells = <0>;
 380                         compatible = "fixed-clock";
 381                         clock-frequency = <208000000>;
 382                 };
 383
 384                 ref_312m_clk: ref_312m {
 385                         #clock-cells = <0>;
 386                         compatible = "fixed-clock";
 387                         clock-frequency = <312000000>;
 388                 };
 389
 390                 var_312m_clk: var_312m {
 391                         #clock-cells = <0>;
 392                         compatible = "fixed-clock";
 393                         clock-frequency = <312000000>;
 394                 };
 395         };
 396
 397         usbotg: usb@3f120000 {
 398                 compatible = "snps,dwc2";
 399                 reg = <0x3f120000 0x10000>;
 400                 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 401                 clocks = <&usb_otg_ahb_clk>;
 402                 clock-names = "otg";
 403                 phys = <&usbphy>;
 404                 phy-names = "usb2-phy";
 405                 status = "disabled";
 406         };
 407
 408         usbphy: usb-phy@3f130000 {
 409                 compatible = "brcm,kona-usb2-phy";
 410                 reg = <0x3f130000 0x28>;
 411                 #phy-cells = <0>;
 412                 status = "disabled";
 413         };
 414 };