2 * DTS file for CSR SiRFatlas6 SoC
4 * Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 /include/ "skeleton.dtsi"
11 compatible = "sirf,atlas6";
14 interrupt-parent = <&intc>;
22 d-cache-line-size = <32>;
23 i-cache-line-size = <32>;
24 d-cache-size = <32768>;
25 i-cache-size = <32768>;
27 timebase-frequency = <0>;
29 clock-frequency = <0>;
38 clock-latency = <150000>;
43 compatible = "simple-bus";
46 ranges = <0x40000000 0x40000000 0x80000000>;
48 intc: interrupt-controller@80020000 {
49 #interrupt-cells = <1>;
51 compatible = "sirf,prima2-intc";
52 reg = <0x80020000 0x1000>;
56 compatible = "simple-bus";
59 ranges = <0x88000000 0x88000000 0x40000>;
61 clks: clock-controller@88000000 {
62 compatible = "sirf,atlas6-clkc";
63 reg = <0x88000000 0x1000>;
68 rstc: reset-controller@88010000 {
69 compatible = "sirf,prima2-rstc";
70 reg = <0x88010000 0x1000>;
74 rsc-controller@88020000 {
75 compatible = "sirf,prima2-rsc";
76 reg = <0x88020000 0x1000>;
80 compatible = "sirf,prima2-cphifbg";
81 reg = <0x88030000 0x1000>;
87 compatible = "simple-bus";
90 ranges = <0x90000000 0x90000000 0x10000>;
92 memory-controller@90000000 {
93 compatible = "sirf,prima2-memc";
94 reg = <0x90000000 0x2000>;
100 compatible = "sirf,prima2-memcmon";
101 reg = <0x90002000 0x200>;
108 compatible = "simple-bus";
109 #address-cells = <1>;
111 ranges = <0x90010000 0x90010000 0x30000>;
114 compatible = "sirf,prima2-lcd";
115 reg = <0x90010000 0x20000>;
119 /* later transfer to pwm */
120 bl-gpio = <&gpio 7 0>;
121 default-panel = <&panel0>;
125 compatible = "sirf,prima2-vpp";
126 reg = <0x90020000 0x10000>;
133 compatible = "simple-bus";
134 #address-cells = <1>;
136 ranges = <0x98000000 0x98000000 0x8000000>;
139 compatible = "powervr,sgx510";
140 reg = <0x98000000 0x8000000>;
147 compatible = "simple-bus";
148 #address-cells = <1>;
150 ranges = <0xa0000000 0xa0000000 0x8000000>;
153 compatible = "sirf,atlas6-ble";
154 reg = <0xa0000000 0x2000>;
161 compatible = "simple-bus";
162 #address-cells = <1>;
164 ranges = <0xa8000000 0xa8000000 0x2000000>;
167 compatible = "sirf,prima2-dspif";
168 reg = <0xa8000000 0x10000>;
173 compatible = "sirf,prima2-gps";
174 reg = <0xa8010000 0x10000>;
180 compatible = "sirf,prima2-dsp";
181 reg = <0xa9000000 0x1000000>;
188 compatible = "simple-bus";
189 #address-cells = <1>;
191 ranges = <0xb0000000 0xb0000000 0x180000>,
192 <0x56000000 0x56000000 0x1b00000>;
195 compatible = "sirf,prima2-tick";
196 reg = <0xb0020000 0x1000>;
201 compatible = "sirf,prima2-nand";
202 reg = <0xb0030000 0x10000>;
208 compatible = "sirf,prima2-audio";
209 reg = <0xb0040000 0x10000>;
214 uart0: uart@b0050000 {
216 compatible = "sirf,prima2-uart";
217 reg = <0xb0050000 0x1000>;
221 dmas = <&dmac1 5>, <&dmac0 2>;
222 dma-names = "rx", "tx";
225 uart1: uart@b0060000 {
227 compatible = "sirf,prima2-uart";
228 reg = <0xb0060000 0x1000>;
232 dma-names = "no-rx", "no-tx";
235 uart2: uart@b0070000 {
237 compatible = "sirf,prima2-uart";
238 reg = <0xb0070000 0x1000>;
242 dmas = <&dmac0 6>, <&dmac0 7>;
243 dma-names = "rx", "tx";
248 compatible = "sirf,prima2-usp";
249 reg = <0xb0080000 0x10000>;
253 dmas = <&dmac1 1>, <&dmac1 2>;
254 dma-names = "rx", "tx";
259 compatible = "sirf,prima2-usp";
260 reg = <0xb0090000 0x10000>;
264 dmas = <&dmac0 14>, <&dmac0 15>;
265 dma-names = "rx", "tx";
268 dmac0: dma-controller@b00b0000 {
270 compatible = "sirf,prima2-dmac";
271 reg = <0xb00b0000 0x10000>;
276 dmac1: dma-controller@b0160000 {
278 compatible = "sirf,prima2-dmac";
279 reg = <0xb0160000 0x10000>;
285 compatible = "sirf,prima2-vip";
286 reg = <0xb00C0000 0x10000>;
289 sirf,vip-dma-rx-channel = <16>;
294 compatible = "sirf,prima2-spi";
295 reg = <0xb00d0000 0x10000>;
297 sirf,spi-num-chipselects = <1>;
298 cs-gpios = <&gpio 0 0>;
299 sirf,spi-dma-rx-channel = <25>;
300 sirf,spi-dma-tx-channel = <20>;
301 #address-cells = <1>;
309 compatible = "sirf,prima2-spi";
310 reg = <0xb0170000 0x10000>;
312 sirf,spi-num-chipselects = <1>;
313 sirf,spi-dma-rx-channel = <12>;
314 sirf,spi-dma-tx-channel = <13>;
315 #address-cells = <1>;
323 compatible = "sirf,prima2-i2c";
324 reg = <0xb00e0000 0x10000>;
326 #address-cells = <1>;
333 compatible = "sirf,prima2-i2c";
334 reg = <0xb00f0000 0x10000>;
336 #address-cells = <1>;
342 compatible = "sirf,prima2-tsc";
343 reg = <0xb0110000 0x10000>;
348 gpio: pinctrl@b0120000 {
350 #interrupt-cells = <2>;
351 compatible = "sirf,atlas6-pinctrl";
352 reg = <0xb0120000 0x10000>;
353 interrupts = <43 44 45 46 47>;
355 interrupt-controller;
357 lcd_16pins_a: lcd0@0 {
359 sirf,pins = "lcd_16bitsgrp";
360 sirf,function = "lcd_16bits";
363 lcd_18pins_a: lcd0@1 {
365 sirf,pins = "lcd_18bitsgrp";
366 sirf,function = "lcd_18bits";
369 lcd_24pins_a: lcd0@2 {
371 sirf,pins = "lcd_24bitsgrp";
372 sirf,function = "lcd_24bits";
375 lcdrom_pins_a: lcdrom0@0 {
377 sirf,pins = "lcdromgrp";
378 sirf,function = "lcdrom";
381 uart0_pins_a: uart0@0 {
383 sirf,pins = "uart0grp";
384 sirf,function = "uart0";
387 uart0_noflow_pins_a: uart0@1 {
389 sirf,pins = "uart0_nostreamctrlgrp";
390 sirf,function = "uart0_nostreamctrl";
393 uart1_pins_a: uart1@0 {
395 sirf,pins = "uart1grp";
396 sirf,function = "uart1";
399 uart2_pins_a: uart2@0 {
401 sirf,pins = "uart2grp";
402 sirf,function = "uart2";
405 uart2_noflow_pins_a: uart2@1 {
407 sirf,pins = "uart2_nostreamctrlgrp";
408 sirf,function = "uart2_nostreamctrl";
411 spi0_pins_a: spi0@0 {
413 sirf,pins = "spi0grp";
414 sirf,function = "spi0";
417 spi1_pins_a: spi1@0 {
419 sirf,pins = "spi1grp";
420 sirf,function = "spi1";
423 i2c0_pins_a: i2c0@0 {
425 sirf,pins = "i2c0grp";
426 sirf,function = "i2c0";
429 i2c1_pins_a: i2c1@0 {
431 sirf,pins = "i2c1grp";
432 sirf,function = "i2c1";
435 pwm0_pins_a: pwm0@0 {
437 sirf,pins = "pwm0grp";
438 sirf,function = "pwm0";
441 pwm1_pins_a: pwm1@0 {
443 sirf,pins = "pwm1grp";
444 sirf,function = "pwm1";
447 pwm2_pins_a: pwm2@0 {
449 sirf,pins = "pwm2grp";
450 sirf,function = "pwm2";
453 pwm3_pins_a: pwm3@0 {
455 sirf,pins = "pwm3grp";
456 sirf,function = "pwm3";
459 pwm4_pins_a: pwm4@0 {
461 sirf,pins = "pwm4grp";
462 sirf,function = "pwm4";
467 sirf,pins = "gpsgrp";
468 sirf,function = "gps";
473 sirf,pins = "vipgrp";
474 sirf,function = "vip";
477 sdmmc0_pins_a: sdmmc0@0 {
479 sirf,pins = "sdmmc0grp";
480 sirf,function = "sdmmc0";
483 sdmmc1_pins_a: sdmmc1@0 {
485 sirf,pins = "sdmmc1grp";
486 sirf,function = "sdmmc1";
489 sdmmc2_pins_a: sdmmc2@0 {
491 sirf,pins = "sdmmc2grp";
492 sirf,function = "sdmmc2";
495 sdmmc2_nowp_pins_a: sdmmc2_nowp@0 {
497 sirf,pins = "sdmmc2_nowpgrp";
498 sirf,function = "sdmmc2_nowp";
501 sdmmc3_pins_a: sdmmc3@0 {
503 sirf,pins = "sdmmc3grp";
504 sirf,function = "sdmmc3";
507 sdmmc5_pins_a: sdmmc5@0 {
509 sirf,pins = "sdmmc5grp";
510 sirf,function = "sdmmc5";
515 sirf,pins = "i2sgrp";
516 sirf,function = "i2s";
519 i2s_no_din_pins_a: i2s_no_din@0 {
521 sirf,pins = "i2s_no_dingrp";
522 sirf,function = "i2s_no_din";
525 i2s_6chn_pins_a: i2s_6chn@0 {
527 sirf,pins = "i2s_6chngrp";
528 sirf,function = "i2s_6chn";
531 ac97_pins_a: ac97@0 {
533 sirf,pins = "ac97grp";
534 sirf,function = "ac97";
537 nand_pins_a: nand@0 {
539 sirf,pins = "nandgrp";
540 sirf,function = "nand";
543 usp0_pins_a: usp0@0 {
545 sirf,pins = "usp0grp";
546 sirf,function = "usp0";
549 usp0_uart_nostreamctrl_pins_a: usp0@1 {
551 sirf,pins = "usp0_uart_nostreamctrl_grp";
552 sirf,function = "usp0_uart_nostreamctrl";
555 usp1_pins_a: usp1@0 {
557 sirf,pins = "usp1grp";
558 sirf,function = "usp1";
561 usp1_uart_nostreamctrl_pins_a: usp1@1 {
563 sirf,pins = "usp1_uart_nostreamctrl_grp";
564 sirf,function = "usp1_uart_nostreamctrl";
567 usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 {
569 sirf,pins = "usb0_upli_drvbusgrp";
570 sirf,function = "usb0_upli_drvbus";
573 usb1_utmi_drvbus_pins_a: usb1_utmi_drvbus@0 {
575 sirf,pins = "usb1_utmi_drvbusgrp";
576 sirf,function = "usb1_utmi_drvbus";
579 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
581 sirf,pins = "usb1_dp_dngrp";
582 sirf,function = "usb1_dp_dn";
585 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
586 uart1_route_io_usb1 {
587 sirf,pins = "uart1_route_io_usb1grp";
588 sirf,function = "uart1_route_io_usb1";
591 warm_rst_pins_a: warm_rst@0 {
593 sirf,pins = "warm_rstgrp";
594 sirf,function = "warm_rst";
597 pulse_count_pins_a: pulse_count@0 {
599 sirf,pins = "pulse_countgrp";
600 sirf,function = "pulse_count";
603 cko0_pins_a: cko0@0 {
605 sirf,pins = "cko0grp";
606 sirf,function = "cko0";
609 cko1_pins_a: cko1@0 {
611 sirf,pins = "cko1grp";
612 sirf,function = "cko1";
618 compatible = "sirf,prima2-pwm";
619 reg = <0xb0130000 0x10000>;
624 compatible = "sirf,prima2-efuse";
625 reg = <0xb0140000 0x10000>;
630 compatible = "sirf,prima2-pulsec";
631 reg = <0xb0150000 0x10000>;
637 compatible = "sirf,prima2-pciiobg", "simple-bus";
638 #address-cells = <1>;
640 ranges = <0x56000000 0x56000000 0x1b00000>;
642 sd0: sdhci@56000000 {
644 compatible = "sirf,prima2-sdhc";
645 reg = <0x56000000 0x100000>;
651 sd1: sdhci@56100000 {
653 compatible = "sirf,prima2-sdhc";
654 reg = <0x56100000 0x100000>;
661 sd2: sdhci@56200000 {
663 compatible = "sirf,prima2-sdhc";
664 reg = <0x56200000 0x100000>;
671 sd3: sdhci@56300000 {
673 compatible = "sirf,prima2-sdhc";
674 reg = <0x56300000 0x100000>;
681 sd5: sdhci@56500000 {
683 compatible = "sirf,prima2-sdhc";
684 reg = <0x56500000 0x100000>;
692 compatible = "sirf,prima2-pcicp";
693 reg = <0x57900000 0x100000>;
697 rom-interface@57a00000 {
698 compatible = "sirf,prima2-romif";
699 reg = <0x57a00000 0x100000>;
705 compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus";
706 #address-cells = <1>;
708 reg = <0x80030000 0x10000>;
711 compatible = "sirf,prima2-gpsrtc";
712 reg = <0x1000 0x1000>;
713 interrupts = <55 56 57>;
717 compatible = "sirf,prima2-sysrtc";
718 reg = <0x2000 0x1000>;
719 interrupts = <52 53 54>;
723 compatible = "sirf,prima2-minigpsrtc";
724 reg = <0x2000 0x1000>;
729 compatible = "sirf,prima2-pwrc";
730 reg = <0x3000 0x1000>;
736 compatible = "simple-bus";
737 #address-cells = <1>;
739 ranges = <0xb8000000 0xb8000000 0x40000>;
742 compatible = "chipidea,ci13611a-prima2";
743 reg = <0xb8000000 0x10000>;
749 compatible = "chipidea,ci13611a-prima2";
750 reg = <0xb8010000 0x10000>;
756 compatible = "sirf,prima2-security";
757 reg = <0xb8030000 0x10000>;