2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
9 * Licensed under GPLv2 or later.
12 #include "skeleton.dtsi"
13 #include <dt-bindings/dma/at91.h>
14 #include <dt-bindings/pinctrl/at91.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91SAM9x5 family SoC";
21 compatible = "atmel,at91sam9x5";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm926ej-s";
52 reg = <0x20000000 0x10000000>;
56 slow_xtal: slow_xtal {
57 compatible = "fixed-clock";
59 clock-frequency = <0>;
62 main_xtal: main_xtal {
63 compatible = "fixed-clock";
65 clock-frequency = <0>;
68 adc_op_clk: adc_op_clk{
69 compatible = "fixed-clock";
71 clock-frequency = <1000000>;
76 compatible = "mmio-sram";
77 reg = <0x00300000 0x8000>;
81 compatible = "simple-bus";
87 compatible = "simple-bus";
92 aic: interrupt-controller@fffff000 {
93 #interrupt-cells = <3>;
94 compatible = "atmel,at91rm9200-aic";
96 reg = <0xfffff000 0x200>;
97 atmel,external-irqs = <31>;
100 matrix: matrix@ffffde00 {
101 compatible = "atmel,at91sam9x5-matrix", "syscon";
102 reg = <0xffffde00 0x100>;
105 pmecc: ecc-engine@ffffe000 {
106 compatible = "atmel,at91sam9g45-pmecc";
107 reg = <0xffffe000 0x600>,
111 ramc0: ramc@ffffe800 {
112 compatible = "atmel,at91sam9g45-ddramc";
113 reg = <0xffffe800 0x200>;
115 clock-names = "ddrck";
119 compatible = "atmel,at91sam9260-smc", "syscon";
120 reg = <0xffffea00 0x200>;
124 compatible = "atmel,at91sam9x5-pmc", "syscon";
125 reg = <0xfffffc00 0x200>;
126 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
127 interrupt-controller;
128 #address-cells = <1>;
130 #interrupt-cells = <1>;
132 main_rc_osc: main_rc_osc {
133 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
135 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
136 clock-frequency = <12000000>;
137 clock-accuracy = <50000000>;
141 compatible = "atmel,at91rm9200-clk-main-osc";
143 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
144 clocks = <&main_xtal>;
148 compatible = "atmel,at91sam9x5-clk-main";
150 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
151 clocks = <&main_rc_osc>, <&main_osc>;
155 compatible = "atmel,at91rm9200-clk-pll";
157 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
160 atmel,clk-input-range = <2000000 32000000>;
161 #atmel,pll-clk-output-range-cells = <4>;
162 atmel,pll-clk-output-ranges = <745000000 800000000 0 0
163 695000000 750000000 1 0
164 645000000 700000000 2 0
165 595000000 650000000 3 0
166 545000000 600000000 0 1
167 495000000 555000000 1 1
168 445000000 500000000 2 1
169 400000000 450000000 3 1>;
173 compatible = "atmel,at91sam9x5-clk-plldiv";
179 compatible = "atmel,at91sam9x5-clk-utmi";
181 interrupts-extended = <&pmc AT91_PMC_LOCKU>;
186 compatible = "atmel,at91sam9x5-clk-master";
188 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
189 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
190 atmel,clk-output-range = <0 133333333>;
191 atmel,clk-divisors = <1 2 4 3>;
192 atmel,master-clk-have-div3-pres;
196 compatible = "atmel,at91sam9x5-clk-usb";
198 clocks = <&plladiv>, <&utmi>;
202 compatible = "atmel,at91sam9x5-clk-programmable";
203 #address-cells = <1>;
205 interrupt-parent = <&pmc>;
206 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
211 interrupts = <AT91_PMC_PCKRDY(0)>;
217 interrupts = <AT91_PMC_PCKRDY(1)>;
222 compatible = "atmel,at91sam9x5-clk-smd";
224 clocks = <&plladiv>, <&utmi>;
228 compatible = "atmel,at91rm9200-clk-system";
229 #address-cells = <1>;
270 compatible = "atmel,at91sam9x5-clk-peripheral";
271 #address-cells = <1>;
275 pioAB_clk: pioAB_clk {
280 pioCD_clk: pioCD_clk {
290 usart0_clk: usart0_clk {
295 usart1_clk: usart1_clk {
300 usart2_clk: usart2_clk {
335 uart0_clk: uart0_clk {
340 uart1_clk: uart1_clk {
370 uhphs_clk: uhphs_clk {
375 udphs_clk: udphs_clk {
393 compatible = "atmel,at91sam9g45-rstc";
394 reg = <0xfffffe00 0x10>;
399 compatible = "atmel,at91sam9x5-shdwc";
400 reg = <0xfffffe10 0x10>;
404 pit: timer@fffffe30 {
405 compatible = "atmel,at91sam9260-pit";
406 reg = <0xfffffe30 0xf>;
407 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
412 compatible = "atmel,at91sam9x5-sckc";
413 reg = <0xfffffe50 0x4>;
416 compatible = "atmel,at91sam9x5-clk-slow-osc";
418 clocks = <&slow_xtal>;
421 slow_rc_osc: slow_rc_osc {
422 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
424 clock-frequency = <32768>;
425 clock-accuracy = <50000000>;
429 compatible = "atmel,at91sam9x5-clk-slow";
431 clocks = <&slow_rc_osc>, <&slow_osc>;
435 tcb0: timer@f8008000 {
436 compatible = "atmel,at91sam9x5-tcb";
437 reg = <0xf8008000 0x100>;
438 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
439 clocks = <&tcb0_clk>, <&clk32k>;
440 clock-names = "t0_clk", "slow_clk";
443 tcb1: timer@f800c000 {
444 compatible = "atmel,at91sam9x5-tcb";
445 reg = <0xf800c000 0x100>;
446 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
447 clocks = <&tcb0_clk>, <&clk32k>;
448 clock-names = "t0_clk", "slow_clk";
451 dma0: dma-controller@ffffec00 {
452 compatible = "atmel,at91sam9g45-dma";
453 reg = <0xffffec00 0x200>;
454 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
456 clocks = <&dma0_clk>;
457 clock-names = "dma_clk";
460 dma1: dma-controller@ffffee00 {
461 compatible = "atmel,at91sam9g45-dma";
462 reg = <0xffffee00 0x200>;
463 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
465 clocks = <&dma1_clk>;
466 clock-names = "dma_clk";
470 #address-cells = <1>;
472 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
473 ranges = <0xfffff400 0xfffff400 0x800>;
475 /* shared pinctrl settings */
477 pinctrl_dbgu: dbgu-0 {
479 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
480 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
485 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
487 <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
488 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
489 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
490 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
491 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
492 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
493 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
494 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
497 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
499 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
500 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
501 AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
502 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
503 AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
504 AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
505 AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
506 AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
509 pinctrl_ebi_addr_nand: ebi-addr-0 {
511 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
512 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
517 pinctrl_usart0: usart0-0 {
519 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
520 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
523 pinctrl_usart0_rts: usart0_rts-0 {
525 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
528 pinctrl_usart0_cts: usart0_cts-0 {
530 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
533 pinctrl_usart0_sck: usart0_sck-0 {
535 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
540 pinctrl_usart1: usart1-0 {
542 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
543 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
546 pinctrl_usart1_rts: usart1_rts-0 {
548 <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
551 pinctrl_usart1_cts: usart1_cts-0 {
553 <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
556 pinctrl_usart1_sck: usart1_sck-0 {
558 <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
563 pinctrl_usart2: usart2-0 {
565 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
566 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
569 pinctrl_usart2_rts: usart2_rts-0 {
571 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
574 pinctrl_usart2_cts: usart2_cts-0 {
576 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
579 pinctrl_usart2_sck: usart2_sck-0 {
581 <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
586 pinctrl_uart0: uart0-0 {
588 <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
589 AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
594 pinctrl_uart1: uart1-0 {
596 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
597 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
602 pinctrl_nand_oe_we: nand-oe-we-0 {
604 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
605 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
608 pinctrl_nand_rb: nand-rb-0 {
610 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
613 pinctrl_nand_cs: nand-cs-0 {
615 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
620 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
622 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
623 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
624 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
627 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
629 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
630 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
631 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
636 pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
638 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
639 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
640 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
643 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
645 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
646 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
647 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
652 pinctrl_ssc0_tx: ssc0_tx-0 {
654 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
655 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
656 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
659 pinctrl_ssc0_rx: ssc0_rx-0 {
661 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
662 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
663 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
668 pinctrl_spi0: spi0-0 {
670 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
671 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
672 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
677 pinctrl_spi1: spi1-0 {
679 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
680 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
681 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
686 pinctrl_i2c0: i2c0-0 {
688 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
689 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
694 pinctrl_i2c1: i2c1-0 {
696 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
697 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
702 pinctrl_i2c2: i2c2-0 {
704 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
705 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
710 pinctrl_i2c_gpio0: i2c_gpio0-0 {
712 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
713 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
718 pinctrl_i2c_gpio1: i2c_gpio1-0 {
720 <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
721 AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
726 pinctrl_i2c_gpio2: i2c_gpio2-0 {
728 <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
729 AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
734 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
736 <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
738 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
740 <AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
742 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
744 <AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
747 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
749 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
751 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
753 <AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
755 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
757 <AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
760 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
762 <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
764 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
766 <AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
769 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
771 <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
773 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
775 <AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
780 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
781 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
784 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
785 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
788 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
789 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
792 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
793 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
796 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
797 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
800 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
801 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
804 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
805 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
808 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
809 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
812 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
813 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
818 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
819 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
822 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
823 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
826 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
827 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
830 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
831 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
834 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
835 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
838 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
839 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
842 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
843 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
846 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
847 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
850 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
851 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
855 pioA: gpio@fffff400 {
856 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
857 reg = <0xfffff400 0x200>;
858 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
861 interrupt-controller;
862 #interrupt-cells = <2>;
863 clocks = <&pioAB_clk>;
866 pioB: gpio@fffff600 {
867 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
868 reg = <0xfffff600 0x200>;
869 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
873 interrupt-controller;
874 #interrupt-cells = <2>;
875 clocks = <&pioAB_clk>;
878 pioC: gpio@fffff800 {
879 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
880 reg = <0xfffff800 0x200>;
881 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
884 interrupt-controller;
885 #interrupt-cells = <2>;
886 clocks = <&pioCD_clk>;
889 pioD: gpio@fffffa00 {
890 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
891 reg = <0xfffffa00 0x200>;
892 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
896 interrupt-controller;
897 #interrupt-cells = <2>;
898 clocks = <&pioCD_clk>;
903 compatible = "atmel,at91sam9g45-ssc";
904 reg = <0xf0010000 0x4000>;
905 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
906 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
907 <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
908 dma-names = "tx", "rx";
909 pinctrl-names = "default";
910 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
911 clocks = <&ssc0_clk>;
912 clock-names = "pclk";
917 compatible = "atmel,hsmci";
918 reg = <0xf0008000 0x600>;
919 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
920 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
922 pinctrl-names = "default";
923 clocks = <&mci0_clk>;
924 clock-names = "mci_clk";
925 #address-cells = <1>;
931 compatible = "atmel,hsmci";
932 reg = <0xf000c000 0x600>;
933 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
934 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
936 pinctrl-names = "default";
937 clocks = <&mci1_clk>;
938 clock-names = "mci_clk";
939 #address-cells = <1>;
944 dbgu: serial@fffff200 {
945 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
946 reg = <0xfffff200 0x200>;
947 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
948 pinctrl-names = "default";
949 pinctrl-0 = <&pinctrl_dbgu>;
950 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
951 <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
952 dma-names = "tx", "rx";
954 clock-names = "usart";
958 usart0: serial@f801c000 {
959 compatible = "atmel,at91sam9260-usart";
960 reg = <0xf801c000 0x200>;
961 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
962 pinctrl-names = "default";
963 pinctrl-0 = <&pinctrl_usart0>;
964 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
965 <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
966 dma-names = "tx", "rx";
967 clocks = <&usart0_clk>;
968 clock-names = "usart";
972 usart1: serial@f8020000 {
973 compatible = "atmel,at91sam9260-usart";
974 reg = <0xf8020000 0x200>;
975 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
976 pinctrl-names = "default";
977 pinctrl-0 = <&pinctrl_usart1>;
978 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
979 <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
980 dma-names = "tx", "rx";
981 clocks = <&usart1_clk>;
982 clock-names = "usart";
986 usart2: serial@f8024000 {
987 compatible = "atmel,at91sam9260-usart";
988 reg = <0xf8024000 0x200>;
989 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
990 pinctrl-names = "default";
991 pinctrl-0 = <&pinctrl_usart2>;
992 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
993 <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
994 dma-names = "tx", "rx";
995 clocks = <&usart2_clk>;
996 clock-names = "usart";
1000 i2c0: i2c@f8010000 {
1001 compatible = "atmel,at91sam9x5-i2c";
1002 reg = <0xf8010000 0x100>;
1003 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
1004 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
1005 <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
1006 dma-names = "tx", "rx";
1007 #address-cells = <1>;
1009 pinctrl-names = "default";
1010 pinctrl-0 = <&pinctrl_i2c0>;
1011 clocks = <&twi0_clk>;
1012 status = "disabled";
1015 i2c1: i2c@f8014000 {
1016 compatible = "atmel,at91sam9x5-i2c";
1017 reg = <0xf8014000 0x100>;
1018 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
1019 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
1020 <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
1021 dma-names = "tx", "rx";
1022 #address-cells = <1>;
1024 pinctrl-names = "default";
1025 pinctrl-0 = <&pinctrl_i2c1>;
1026 clocks = <&twi1_clk>;
1027 status = "disabled";
1030 i2c2: i2c@f8018000 {
1031 compatible = "atmel,at91sam9x5-i2c";
1032 reg = <0xf8018000 0x100>;
1033 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
1034 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
1035 <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
1036 dma-names = "tx", "rx";
1037 #address-cells = <1>;
1039 pinctrl-names = "default";
1040 pinctrl-0 = <&pinctrl_i2c2>;
1041 clocks = <&twi2_clk>;
1042 status = "disabled";
1045 uart0: serial@f8040000 {
1046 compatible = "atmel,at91sam9260-usart";
1047 reg = <0xf8040000 0x200>;
1048 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
1049 pinctrl-names = "default";
1050 pinctrl-0 = <&pinctrl_uart0>;
1051 clocks = <&uart0_clk>;
1052 clock-names = "usart";
1053 status = "disabled";
1056 uart1: serial@f8044000 {
1057 compatible = "atmel,at91sam9260-usart";
1058 reg = <0xf8044000 0x200>;
1059 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
1060 pinctrl-names = "default";
1061 pinctrl-0 = <&pinctrl_uart1>;
1062 clocks = <&uart1_clk>;
1063 clock-names = "usart";
1064 status = "disabled";
1067 adc0: adc@f804c000 {
1068 #address-cells = <1>;
1070 compatible = "atmel,at91sam9x5-adc";
1071 reg = <0xf804c000 0x100>;
1072 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
1073 clocks = <&adc_clk>,
1075 clock-names = "adc_clk", "adc_op_clk";
1076 atmel,adc-use-external-triggers;
1077 atmel,adc-channels-used = <0xffff>;
1078 atmel,adc-vref = <3300>;
1079 atmel,adc-startup-time = <40>;
1080 atmel,adc-sample-hold-time = <11>;
1081 atmel,adc-res = <8 10>;
1082 atmel,adc-res-names = "lowres", "highres";
1083 atmel,adc-use-res = "highres";
1086 trigger-name = "external-rising";
1087 trigger-value = <0x1>;
1092 trigger-name = "external-falling";
1093 trigger-value = <0x2>;
1098 trigger-name = "external-any";
1099 trigger-value = <0x3>;
1104 trigger-name = "continuous";
1105 trigger-value = <0x6>;
1109 spi0: spi@f0000000 {
1110 #address-cells = <1>;
1112 compatible = "atmel,at91rm9200-spi";
1113 reg = <0xf0000000 0x100>;
1114 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
1115 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
1116 <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
1117 dma-names = "tx", "rx";
1118 pinctrl-names = "default";
1119 pinctrl-0 = <&pinctrl_spi0>;
1120 clocks = <&spi0_clk>;
1121 clock-names = "spi_clk";
1122 status = "disabled";
1125 spi1: spi@f0004000 {
1126 #address-cells = <1>;
1128 compatible = "atmel,at91rm9200-spi";
1129 reg = <0xf0004000 0x100>;
1130 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
1131 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
1132 <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
1133 dma-names = "tx", "rx";
1134 pinctrl-names = "default";
1135 pinctrl-0 = <&pinctrl_spi1>;
1136 clocks = <&spi1_clk>;
1137 clock-names = "spi_clk";
1138 status = "disabled";
1141 usb2: gadget@f803c000 {
1142 #address-cells = <1>;
1144 compatible = "atmel,at91sam9g45-udc";
1145 reg = <0x00500000 0x80000
1147 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1148 clocks = <&utmi>, <&udphs_clk>;
1149 clock-names = "hclk", "pclk";
1150 status = "disabled";
1154 atmel,fifo-size = <64>;
1155 atmel,nb-banks = <1>;
1160 atmel,fifo-size = <1024>;
1161 atmel,nb-banks = <2>;
1168 atmel,fifo-size = <1024>;
1169 atmel,nb-banks = <2>;
1176 atmel,fifo-size = <1024>;
1177 atmel,nb-banks = <3>;
1183 atmel,fifo-size = <1024>;
1184 atmel,nb-banks = <3>;
1190 atmel,fifo-size = <1024>;
1191 atmel,nb-banks = <3>;
1198 atmel,fifo-size = <1024>;
1199 atmel,nb-banks = <3>;
1206 compatible = "atmel,at91sam9260-wdt";
1207 reg = <0xfffffe40 0x10>;
1208 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1210 atmel,watchdog-type = "hardware";
1211 atmel,reset-type = "all";
1213 status = "disabled";
1217 compatible = "atmel,at91sam9x5-rtc";
1218 reg = <0xfffffeb0 0x40>;
1219 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1221 status = "disabled";
1224 pwm0: pwm@f8034000 {
1225 compatible = "atmel,at91sam9rl-pwm";
1226 reg = <0xf8034000 0x300>;
1227 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1228 clocks = <&pwm_clk>;
1230 status = "disabled";
1235 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1236 reg = <0x00600000 0x100000>;
1237 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1238 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1239 clock-names = "ohci_clk", "hclk", "uhpck";
1240 status = "disabled";
1244 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1245 reg = <0x00700000 0x100000>;
1246 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1247 clocks = <&utmi>, <&uhphs_clk>;
1248 clock-names = "usb_clk", "ehci_clk";
1249 status = "disabled";
1253 compatible = "atmel,at91sam9x5-ebi";
1254 #address-cells = <2>;
1257 atmel,matrix = <&matrix>;
1258 reg = <0x10000000 0x60000000>;
1259 ranges = <0x0 0x0 0x10000000 0x10000000
1260 0x1 0x0 0x20000000 0x10000000
1261 0x2 0x0 0x30000000 0x10000000
1262 0x3 0x0 0x40000000 0x10000000
1263 0x4 0x0 0x50000000 0x10000000
1264 0x5 0x0 0x60000000 0x10000000>;
1266 status = "disabled";
1268 nand_controller: nand-controller {
1269 compatible = "atmel,at91sam9g45-nand-controller";
1270 ecc-engine = <&pmecc>;
1271 #address-cells = <2>;
1274 status = "disabled";
1280 compatible = "i2c-gpio";
1281 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1282 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1284 i2c-gpio,sda-open-drain;
1285 i2c-gpio,scl-open-drain;
1286 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1287 #address-cells = <1>;
1289 pinctrl-names = "default";
1290 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1291 status = "disabled";
1295 compatible = "i2c-gpio";
1296 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1297 &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1299 i2c-gpio,sda-open-drain;
1300 i2c-gpio,scl-open-drain;
1301 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1302 #address-cells = <1>;
1304 pinctrl-names = "default";
1305 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1306 status = "disabled";
1310 compatible = "i2c-gpio";
1311 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1312 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1314 i2c-gpio,sda-open-drain;
1315 i2c-gpio,scl-open-drain;
1316 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1317 #address-cells = <1>;
1319 pinctrl-names = "default";
1320 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1321 status = "disabled";