1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
5 * Copyright (C) 2012 Atmel,
6 * 2012 Hong Xu <hong.xu@atmel.com>
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
18 model = "Atmel AT91SAM9N12 SoC";
19 compatible = "atmel,at91sam9n12";
20 interrupt-parent = <&aic>;
44 compatible = "arm,arm926ej-s";
50 device_type = "memory";
51 reg = <0x20000000 0x10000000>;
55 slow_xtal: slow_xtal {
56 compatible = "fixed-clock";
58 clock-frequency = <0>;
61 main_xtal: main_xtal {
62 compatible = "fixed-clock";
64 clock-frequency = <0>;
69 compatible = "mmio-sram";
70 reg = <0x00300000 0x8000>;
74 compatible = "simple-bus";
80 compatible = "simple-bus";
85 aic: interrupt-controller@fffff000 {
86 #interrupt-cells = <3>;
87 compatible = "atmel,at91rm9200-aic";
89 reg = <0xfffff000 0x200>;
90 atmel,external-irqs = <31>;
93 matrix: matrix@ffffde00 {
94 compatible = "atmel,at91sam9n12-matrix", "syscon";
95 reg = <0xffffde00 0x100>;
98 pmecc: ecc-engine@ffffe000 {
99 compatible = "atmel,at91sam9g45-pmecc";
100 reg = <0xffffe000 0x600>,
104 ramc0: ramc@ffffe800 {
105 compatible = "atmel,at91sam9g45-ddramc";
106 reg = <0xffffe800 0x200>;
108 clock-names = "ddrck";
112 compatible = "atmel,at91sam9260-smc", "syscon";
113 reg = <0xffffea00 0x200>;
117 compatible = "atmel,at91sam9n12-pmc", "syscon";
118 reg = <0xfffffc00 0x200>;
119 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
120 interrupt-controller;
121 #address-cells = <1>;
123 #interrupt-cells = <1>;
125 main_rc_osc: main_rc_osc {
126 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
128 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
129 clock-frequency = <12000000>;
130 clock-accuracy = <50000000>;
134 compatible = "atmel,at91rm9200-clk-main-osc";
136 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
137 clocks = <&main_xtal>;
141 compatible = "atmel,at91sam9x5-clk-main";
143 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
144 clocks = <&main_rc_osc>, <&main_osc>;
148 compatible = "atmel,at91rm9200-clk-pll";
150 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
153 atmel,clk-input-range = <2000000 32000000>;
154 #atmel,pll-clk-output-range-cells = <4>;
155 atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
156 <695000000 750000000 1 0>,
157 <645000000 700000000 2 0>,
158 <595000000 650000000 3 0>,
159 <545000000 600000000 0 1>,
160 <495000000 555000000 1 1>,
161 <445000000 500000000 2 1>,
162 <400000000 450000000 3 1>;
166 compatible = "atmel,at91sam9x5-clk-plldiv";
172 compatible = "atmel,at91rm9200-clk-pll";
174 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
177 atmel,clk-input-range = <2000000 32000000>;
178 #atmel,pll-clk-output-range-cells = <3>;
179 atmel,pll-clk-output-ranges = <30000000 100000000 0>;
183 compatible = "atmel,at91sam9x5-clk-master";
185 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
186 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
187 atmel,clk-output-range = <0 133333333>;
188 atmel,clk-divisors = <1 2 4 3>;
189 atmel,master-clk-have-div3-pres;
193 compatible = "atmel,at91sam9n12-clk-usb";
199 compatible = "atmel,at91sam9x5-clk-programmable";
200 #address-cells = <1>;
202 interrupt-parent = <&pmc>;
203 clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
208 interrupts = <AT91_PMC_PCKRDY(0)>;
214 interrupts = <AT91_PMC_PCKRDY(1)>;
219 compatible = "atmel,at91rm9200-clk-system";
220 #address-cells = <1>;
261 compatible = "atmel,at91sam9x5-clk-peripheral";
262 #address-cells = <1>;
266 pioAB_clk: pioAB_clk {
271 pioCD_clk: pioCD_clk {
281 usart0_clk: usart0_clk {
286 usart1_clk: usart1_clk {
291 usart2_clk: usart2_clk {
296 usart3_clk: usart3_clk {
326 uart0_clk: uart0_clk {
331 uart1_clk: uart1_clk {
356 uhphs_clk: uhphs_clk {
361 udphs_clk: udphs_clk {
394 compatible = "atmel,at91sam9g45-rstc";
395 reg = <0xfffffe00 0x10>;
399 pit: timer@fffffe30 {
400 compatible = "atmel,at91sam9260-pit";
401 reg = <0xfffffe30 0xf>;
402 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
407 compatible = "atmel,at91sam9x5-shdwc";
408 reg = <0xfffffe10 0x10>;
413 compatible = "atmel,at91sam9x5-sckc";
414 reg = <0xfffffe50 0x4>;
417 compatible = "atmel,at91sam9x5-clk-slow-osc";
419 clocks = <&slow_xtal>;
422 slow_rc_osc: slow_rc_osc {
423 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
425 clock-frequency = <32768>;
426 clock-accuracy = <50000000>;
430 compatible = "atmel,at91sam9x5-clk-slow";
432 clocks = <&slow_rc_osc>, <&slow_osc>;
437 compatible = "atmel,hsmci";
438 reg = <0xf0008000 0x600>;
439 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
440 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
442 clocks = <&mci0_clk>;
443 clock-names = "mci_clk";
444 #address-cells = <1>;
449 tcb0: timer@f8008000 {
450 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
451 #address-cells = <1>;
453 reg = <0xf8008000 0x100>;
454 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
455 clocks = <&tcb_clk>, <&clk32k>;
456 clock-names = "t0_clk", "slow_clk";
459 tcb1: timer@f800c000 {
460 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
461 #address-cells = <1>;
463 reg = <0xf800c000 0x100>;
464 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
465 clocks = <&tcb_clk>, <&clk32k>;
466 clock-names = "t0_clk", "slow_clk";
469 hlcdc: hlcdc@f8038000 {
470 compatible = "atmel,at91sam9n12-hlcdc";
471 reg = <0xf8038000 0x2000>;
472 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
473 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
474 clock-names = "periph_clk", "sys_clk", "slow_clk";
477 hlcdc-display-controller {
478 compatible = "atmel,hlcdc-display-controller";
479 #address-cells = <1>;
483 #address-cells = <1>;
489 hlcdc_pwm: hlcdc-pwm {
490 compatible = "atmel,hlcdc-pwm";
491 pinctrl-names = "default";
492 pinctrl-0 = <&pinctrl_lcd_pwm>;
497 dma: dma-controller@ffffec00 {
498 compatible = "atmel,at91sam9g45-dma";
499 reg = <0xffffec00 0x200>;
500 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
502 clocks = <&dma0_clk>;
503 clock-names = "dma_clk";
507 #address-cells = <1>;
509 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
510 ranges = <0xfffff400 0xfffff400 0x800>;
514 0xffffffff 0xffe07983 0x00000000 /* pioA */
515 0x00040000 0x00047e0f 0x00000000 /* pioB */
516 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
517 0x003fffff 0x003f8000 0x00000000 /* pioD */
520 /* shared pinctrl settings */
522 pinctrl_dbgu: dbgu-0 {
524 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
525 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
530 pinctrl_lcd_base: lcd-base-0 {
532 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
533 AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
534 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */
535 AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
536 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
539 pinctrl_lcd_pwm: lcd-pwm-0 {
540 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
543 pinctrl_lcd_rgb888: lcd-rgb-3 {
545 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
546 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
547 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
548 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
549 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
550 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
551 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
552 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
553 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
554 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
555 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
556 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
557 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
558 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
559 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
560 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
561 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
562 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
563 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
564 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
565 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
566 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
567 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
568 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
573 pinctrl_usart0: usart0-0 {
575 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
576 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
579 pinctrl_usart0_rts: usart0_rts-0 {
581 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
584 pinctrl_usart0_cts: usart0_cts-0 {
586 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
591 pinctrl_usart1: usart1-0 {
593 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
594 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
599 pinctrl_usart2: usart2-0 {
601 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
602 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
605 pinctrl_usart2_rts: usart2_rts-0 {
607 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
610 pinctrl_usart2_cts: usart2_cts-0 {
612 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
617 pinctrl_usart3: usart3-0 {
619 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
620 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
623 pinctrl_usart3_rts: usart3_rts-0 {
625 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
628 pinctrl_usart3_cts: usart3_cts-0 {
630 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
635 pinctrl_uart0: uart0-0 {
637 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
638 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
643 pinctrl_uart1: uart1-0 {
645 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
646 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
651 pinctrl_nand_rb: nand-rb-0 {
653 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
656 pinctrl_nand_cs: nand-cs-0 {
658 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
663 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
665 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
666 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
667 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
670 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
672 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
673 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
674 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
677 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
679 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
680 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
681 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
682 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
687 pinctrl_ssc0_tx: ssc0_tx-0 {
689 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
690 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
691 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
694 pinctrl_ssc0_rx: ssc0_rx-0 {
696 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
697 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
698 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
703 pinctrl_spi0: spi0-0 {
705 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
706 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
707 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
712 pinctrl_spi1: spi1-0 {
714 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
715 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
716 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
721 pinctrl_i2c0: i2c0-0 {
723 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
724 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
729 pinctrl_i2c1: i2c1-0 {
731 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
732 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
737 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
738 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
741 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
742 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
745 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
746 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
749 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
750 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
753 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
754 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
757 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
758 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
761 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
762 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
765 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
766 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
769 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
770 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
775 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
776 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
779 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
780 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
783 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
784 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
787 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
788 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
791 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
792 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
795 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
796 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
799 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
800 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
803 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
804 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
807 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
808 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
812 pioA: gpio@fffff400 {
813 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
814 reg = <0xfffff400 0x200>;
815 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
818 interrupt-controller;
819 #interrupt-cells = <2>;
820 clocks = <&pioAB_clk>;
823 pioB: gpio@fffff600 {
824 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
825 reg = <0xfffff600 0x200>;
826 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
829 interrupt-controller;
830 #interrupt-cells = <2>;
831 clocks = <&pioAB_clk>;
834 pioC: gpio@fffff800 {
835 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
836 reg = <0xfffff800 0x200>;
837 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
840 interrupt-controller;
841 #interrupt-cells = <2>;
842 clocks = <&pioCD_clk>;
845 pioD: gpio@fffffa00 {
846 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
847 reg = <0xfffffa00 0x200>;
848 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
851 interrupt-controller;
852 #interrupt-cells = <2>;
853 clocks = <&pioCD_clk>;
857 dbgu: serial@fffff200 {
858 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
859 reg = <0xfffff200 0x200>;
860 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
861 pinctrl-names = "default";
862 pinctrl-0 = <&pinctrl_dbgu>;
864 clock-names = "usart";
869 compatible = "atmel,at91sam9g45-ssc";
870 reg = <0xf0010000 0x4000>;
871 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
872 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
873 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
874 dma-names = "tx", "rx";
875 pinctrl-names = "default";
876 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
877 clocks = <&ssc0_clk>;
878 clock-names = "pclk";
882 usart0: serial@f801c000 {
883 compatible = "atmel,at91sam9260-usart";
884 reg = <0xf801c000 0x4000>;
885 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
886 pinctrl-names = "default";
887 pinctrl-0 = <&pinctrl_usart0>;
888 clocks = <&usart0_clk>;
889 clock-names = "usart";
893 usart1: serial@f8020000 {
894 compatible = "atmel,at91sam9260-usart";
895 reg = <0xf8020000 0x4000>;
896 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
897 pinctrl-names = "default";
898 pinctrl-0 = <&pinctrl_usart1>;
899 clocks = <&usart1_clk>;
900 clock-names = "usart";
904 usart2: serial@f8024000 {
905 compatible = "atmel,at91sam9260-usart";
906 reg = <0xf8024000 0x4000>;
907 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
908 pinctrl-names = "default";
909 pinctrl-0 = <&pinctrl_usart2>;
910 clocks = <&usart2_clk>;
911 clock-names = "usart";
915 usart3: serial@f8028000 {
916 compatible = "atmel,at91sam9260-usart";
917 reg = <0xf8028000 0x4000>;
918 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
919 pinctrl-names = "default";
920 pinctrl-0 = <&pinctrl_usart3>;
921 clocks = <&usart3_clk>;
922 clock-names = "usart";
927 compatible = "atmel,at91sam9x5-i2c";
928 reg = <0xf8010000 0x100>;
929 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
930 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
931 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
932 dma-names = "tx", "rx";
933 #address-cells = <1>;
935 pinctrl-names = "default";
936 pinctrl-0 = <&pinctrl_i2c0>;
937 clocks = <&twi0_clk>;
942 compatible = "atmel,at91sam9x5-i2c";
943 reg = <0xf8014000 0x100>;
944 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
945 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
946 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
947 dma-names = "tx", "rx";
948 #address-cells = <1>;
950 pinctrl-names = "default";
951 pinctrl-0 = <&pinctrl_i2c1>;
952 clocks = <&twi1_clk>;
957 #address-cells = <1>;
959 compatible = "atmel,at91rm9200-spi";
960 reg = <0xf0000000 0x100>;
961 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
962 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
963 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
964 dma-names = "tx", "rx";
965 pinctrl-names = "default";
966 pinctrl-0 = <&pinctrl_spi0>;
967 clocks = <&spi0_clk>;
968 clock-names = "spi_clk";
973 #address-cells = <1>;
975 compatible = "atmel,at91rm9200-spi";
976 reg = <0xf0004000 0x100>;
977 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
978 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
979 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
980 dma-names = "tx", "rx";
981 pinctrl-names = "default";
982 pinctrl-0 = <&pinctrl_spi1>;
983 clocks = <&spi1_clk>;
984 clock-names = "spi_clk";
989 compatible = "atmel,at91sam9260-wdt";
990 reg = <0xfffffe40 0x10>;
991 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
993 atmel,watchdog-type = "hardware";
994 atmel,reset-type = "all";
1000 compatible = "atmel,at91rm9200-rtc";
1001 reg = <0xfffffeb0 0x40>;
1002 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1004 status = "disabled";
1007 pwm0: pwm@f8034000 {
1008 compatible = "atmel,at91sam9rl-pwm";
1009 reg = <0xf8034000 0x300>;
1010 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1012 clocks = <&pwm_clk>;
1013 status = "disabled";
1016 usb1: gadget@f803c000 {
1017 compatible = "atmel,at91sam9260-udc";
1018 reg = <0xf803c000 0x4000>;
1019 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
1020 clocks = <&udphs_clk>, <&udpck>;
1021 clock-names = "pclk", "hclk";
1022 status = "disabled";
1027 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1028 reg = <0x00500000 0x00100000>;
1029 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1030 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1031 clock-names = "ohci_clk", "hclk", "uhpck";
1032 status = "disabled";
1036 compatible = "atmel,at91sam9x5-ebi";
1037 #address-cells = <2>;
1040 atmel,matrix = <&matrix>;
1041 reg = <0x10000000 0x60000000>;
1042 ranges = <0x0 0x0 0x10000000 0x10000000
1043 0x1 0x0 0x20000000 0x10000000
1044 0x2 0x0 0x30000000 0x10000000
1045 0x3 0x0 0x40000000 0x10000000
1046 0x4 0x0 0x50000000 0x10000000
1047 0x5 0x0 0x60000000 0x10000000>;
1049 status = "disabled";
1051 nand_controller: nand-controller {
1052 compatible = "atmel,at91sam9g45-nand-controller";
1053 ecc-engine = <&pmecc>;
1054 #address-cells = <2>;
1057 status = "disabled";
1063 compatible = "i2c-gpio";
1064 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1065 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1067 i2c-gpio,sda-open-drain;
1068 i2c-gpio,scl-open-drain;
1069 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1070 #address-cells = <1>;
1072 status = "disabled";