1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 #include <dt-bindings/pinctrl/at91.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/clock/at91.h>
16 model = "Atmel AT91SAM9263 family SoC";
17 compatible = "atmel,at91sam9263";
18 interrupt-parent = <&aic>;
42 compatible = "arm,arm926ej-s";
49 device_type = "memory";
50 reg = <0x20000000 0x08000000>;
54 main_xtal: main_xtal {
55 compatible = "fixed-clock";
57 clock-frequency = <0>;
60 slow_xtal: slow_xtal {
61 compatible = "fixed-clock";
63 clock-frequency = <0>;
68 compatible = "mmio-sram";
69 reg = <0x00300000 0x14000>;
72 ranges = <0 0x00300000 0x14000>;
76 compatible = "mmio-sram";
77 reg = <0x00500000 0x4000>;
80 ranges = <0 0x00500000 0x4000>;
84 compatible = "simple-bus";
90 compatible = "simple-bus";
95 aic: interrupt-controller@fffff000 {
96 #interrupt-cells = <3>;
97 compatible = "atmel,at91rm9200-aic";
99 reg = <0xfffff000 0x200>;
100 atmel,external-irqs = <30 31>;
104 compatible = "atmel,at91sam9263-pmc", "syscon";
105 reg = <0xfffffc00 0x100>;
106 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
108 clocks = <&slow_xtal>, <&main_xtal>;
109 clock-names = "slow_xtal", "main_xtal";
112 ramc0: ramc@ffffe200 {
113 compatible = "atmel,at91sam9260-sdramc";
114 reg = <0xffffe200 0x200>;
118 compatible = "atmel,at91sam9260-smc", "syscon";
119 reg = <0xffffe400 0x200>;
122 ramc1: ramc@ffffe800 {
123 compatible = "atmel,at91sam9260-sdramc";
124 reg = <0xffffe800 0x200>;
128 compatible = "atmel,at91sam9260-smc", "syscon";
129 reg = <0xffffea00 0x200>;
132 matrix: matrix@ffffec00 {
133 compatible = "atmel,at91sam9263-matrix", "syscon";
134 reg = <0xffffec00 0x200>;
137 pit: timer@fffffd30 {
138 compatible = "atmel,at91sam9260-pit";
139 reg = <0xfffffd30 0xf>;
140 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
141 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
144 tcb0: timer@fff7c000 {
145 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
146 #address-cells = <1>;
148 reg = <0xfff7c000 0x100>;
149 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
150 clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
151 clock-names = "t0_clk", "slow_clk";
155 compatible = "atmel,at91sam9260-rstc";
156 reg = <0xfffffd00 0x10>;
157 clocks = <&slow_xtal>;
161 compatible = "atmel,at91sam9260-shdwc";
162 reg = <0xfffffd10 0x10>;
163 clocks = <&slow_xtal>;
167 #address-cells = <1>;
169 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
170 ranges = <0xfffff200 0xfffff200 0xa00>;
174 0xfffffffb 0xffffe07f /* pioA */
175 0x0007ffff 0x39072fff /* pioB */
176 0xffffffff 0x3ffffff8 /* pioC */
177 0xfffffbff 0xffffffff /* pioD */
178 0xffe00fff 0xfbfcff00 /* pioE */
181 /* shared pinctrl settings */
183 pinctrl_dbgu: dbgu-0 {
185 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
186 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
191 pinctrl_usart0: usart0-0 {
193 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
194 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
197 pinctrl_usart0_rts: usart0_rts-0 {
199 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
202 pinctrl_usart0_cts: usart0_cts-0 {
204 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
209 pinctrl_usart1: usart1-0 {
211 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
212 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
215 pinctrl_usart1_rts: usart1_rts-0 {
217 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
220 pinctrl_usart1_cts: usart1_cts-0 {
222 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
227 pinctrl_usart2: usart2-0 {
229 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
230 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
233 pinctrl_usart2_rts: usart2_rts-0 {
235 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
238 pinctrl_usart2_cts: usart2_cts-0 {
240 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
245 pinctrl_nand_rb: nand-rb-0 {
247 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
250 pinctrl_nand_cs: nand-cs-0 {
252 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
257 pinctrl_macb_rmii: macb_rmii-0 {
259 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
260 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
261 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
262 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
263 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
264 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
265 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
266 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
267 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
268 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
271 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
273 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
274 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
275 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
276 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
277 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
278 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
279 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
280 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
285 pinctrl_mmc0_clk: mmc0_clk-0 {
287 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
290 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
292 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
293 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
296 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
298 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
299 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
300 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
303 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
305 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
306 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
309 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
311 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
312 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
313 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
318 pinctrl_mmc1_clk: mmc1_clk-0 {
320 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
323 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
325 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
326 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
329 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
331 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
332 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
333 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
336 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
338 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
339 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
342 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
344 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
345 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
346 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
351 pinctrl_ssc0_tx: ssc0_tx-0 {
353 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
354 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
355 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
358 pinctrl_ssc0_rx: ssc0_rx-0 {
360 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
361 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
362 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
367 pinctrl_ssc1_tx: ssc1_tx-0 {
369 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
370 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
371 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
374 pinctrl_ssc1_rx: ssc1_rx-0 {
376 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
377 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
378 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
383 pinctrl_spi0: spi0-0 {
385 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
386 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
387 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
392 pinctrl_spi1: spi1-0 {
394 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
395 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
396 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
401 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
402 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
405 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
406 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
409 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
410 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
413 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
414 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
417 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
418 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
422 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
426 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
429 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
430 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
433 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
434 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
441 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
442 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
443 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
444 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
445 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
446 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
447 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
448 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
449 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
450 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
451 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
452 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
453 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
454 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
455 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
456 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
457 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
458 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
459 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
460 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
461 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
462 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
467 pinctrl_can_rx_tx: can_rx_tx {
469 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */
470 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */
475 pinctrl_ac97: ac97-0 {
477 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */
478 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */
479 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */
480 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */
484 pioA: gpio@fffff200 {
485 compatible = "atmel,at91rm9200-gpio";
486 reg = <0xfffff200 0x200>;
487 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
490 interrupt-controller;
491 #interrupt-cells = <2>;
492 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
495 pioB: gpio@fffff400 {
496 compatible = "atmel,at91rm9200-gpio";
497 reg = <0xfffff400 0x200>;
498 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
501 interrupt-controller;
502 #interrupt-cells = <2>;
503 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
506 pioC: gpio@fffff600 {
507 compatible = "atmel,at91rm9200-gpio";
508 reg = <0xfffff600 0x200>;
509 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
512 interrupt-controller;
513 #interrupt-cells = <2>;
514 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
517 pioD: gpio@fffff800 {
518 compatible = "atmel,at91rm9200-gpio";
519 reg = <0xfffff800 0x200>;
520 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
523 interrupt-controller;
524 #interrupt-cells = <2>;
525 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
528 pioE: gpio@fffffa00 {
529 compatible = "atmel,at91rm9200-gpio";
530 reg = <0xfffffa00 0x200>;
531 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
534 interrupt-controller;
535 #interrupt-cells = <2>;
536 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
540 dbgu: serial@ffffee00 {
541 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
542 reg = <0xffffee00 0x200>;
543 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
544 pinctrl-names = "default";
545 pinctrl-0 = <&pinctrl_dbgu>;
546 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
547 clock-names = "usart";
551 usart0: serial@fff8c000 {
552 compatible = "atmel,at91sam9260-usart";
553 reg = <0xfff8c000 0x200>;
554 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
557 pinctrl-names = "default";
558 pinctrl-0 = <&pinctrl_usart0>;
559 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
560 clock-names = "usart";
564 usart1: serial@fff90000 {
565 compatible = "atmel,at91sam9260-usart";
566 reg = <0xfff90000 0x200>;
567 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
570 pinctrl-names = "default";
571 pinctrl-0 = <&pinctrl_usart1>;
572 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
573 clock-names = "usart";
577 usart2: serial@fff94000 {
578 compatible = "atmel,at91sam9260-usart";
579 reg = <0xfff94000 0x200>;
580 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
583 pinctrl-names = "default";
584 pinctrl-0 = <&pinctrl_usart2>;
585 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
586 clock-names = "usart";
591 compatible = "atmel,at91rm9200-ssc";
592 reg = <0xfff98000 0x4000>;
593 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
594 pinctrl-names = "default";
595 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
596 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
597 clock-names = "pclk";
602 compatible = "atmel,at91rm9200-ssc";
603 reg = <0xfff9c000 0x4000>;
604 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
605 pinctrl-names = "default";
606 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
607 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
608 clock-names = "pclk";
612 ac97: sound@fffa0000 {
613 compatible = "atmel,at91sam9263-ac97c";
614 reg = <0xfffa0000 0x4000>;
615 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
616 pinctrl-names = "default";
617 pinctrl-0 = <&pinctrl_ac97>;
618 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
619 clock-names = "ac97_clk";
623 macb0: ethernet@fffbc000 {
624 compatible = "cdns,at91sam9260-macb", "cdns,macb";
625 reg = <0xfffbc000 0x100>;
626 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
627 pinctrl-names = "default";
628 pinctrl-0 = <&pinctrl_macb_rmii>;
629 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
630 clock-names = "hclk", "pclk";
634 usb1: gadget@fff78000 {
635 compatible = "atmel,at91sam9263-udc";
636 reg = <0xfff78000 0x4000>;
637 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
638 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>;
639 clock-names = "pclk", "hclk";
644 compatible = "atmel,at91sam9260-i2c";
645 reg = <0xfff88000 0x100>;
646 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
647 #address-cells = <1>;
649 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
654 compatible = "atmel,hsmci";
655 reg = <0xfff80000 0x600>;
656 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
657 #address-cells = <1>;
659 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
660 clock-names = "mci_clk";
665 compatible = "atmel,hsmci";
666 reg = <0xfff84000 0x600>;
667 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
668 #address-cells = <1>;
670 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
671 clock-names = "mci_clk";
676 compatible = "atmel,at91sam9260-wdt";
677 reg = <0xfffffd40 0x10>;
678 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
679 clocks = <&slow_xtal>;
680 atmel,watchdog-type = "hardware";
681 atmel,reset-type = "all";
687 #address-cells = <1>;
689 compatible = "atmel,at91rm9200-spi";
690 reg = <0xfffa4000 0x200>;
691 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_spi0>;
694 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
695 clock-names = "spi_clk";
700 #address-cells = <1>;
702 compatible = "atmel,at91rm9200-spi";
703 reg = <0xfffa8000 0x200>;
704 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
705 pinctrl-names = "default";
706 pinctrl-0 = <&pinctrl_spi1>;
707 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
708 clock-names = "spi_clk";
713 compatible = "atmel,at91sam9rl-pwm";
714 reg = <0xfffb8000 0x300>;
715 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
717 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
718 clock-names = "pwm_clk";
723 compatible = "atmel,at91sam9263-can";
724 reg = <0xfffac000 0x300>;
725 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
726 pinctrl-names = "default";
727 pinctrl-0 = <&pinctrl_can_rx_tx>;
728 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
729 clock-names = "can_clk";
733 compatible = "atmel,at91sam9260-rtt";
734 reg = <0xfffffd20 0x10>;
735 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
736 clocks = <&slow_xtal>;
741 compatible = "atmel,at91sam9260-rtt";
742 reg = <0xfffffd50 0x10>;
743 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
744 clocks = <&slow_xtal>;
748 gpbr: syscon@fffffd60 {
749 compatible = "atmel,at91sam9260-gpbr", "syscon";
750 reg = <0xfffffd60 0x50>;
756 compatible = "atmel,at91sam9263-lcdc";
757 reg = <0x00700000 0x1000>;
758 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
759 pinctrl-names = "default";
760 pinctrl-0 = <&pinctrl_fb>;
761 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>;
762 clock-names = "lcdc_clk", "hclk";
767 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
768 reg = <0x00a00000 0x100000>;
769 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
770 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>;
771 clock-names = "ohci_clk", "hclk", "uhpck";
776 compatible = "atmel,at91sam9263-ebi0";
777 #address-cells = <2>;
780 atmel,matrix = <&matrix>;
781 reg = <0x10000000 0x80000000>;
782 ranges = <0x0 0x0 0x10000000 0x10000000
783 0x1 0x0 0x20000000 0x10000000
784 0x2 0x0 0x30000000 0x10000000
785 0x3 0x0 0x40000000 0x10000000
786 0x4 0x0 0x50000000 0x10000000
787 0x5 0x0 0x60000000 0x10000000>;
788 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
791 nand_controller0: nand-controller {
792 compatible = "atmel,at91sam9260-nand-controller";
793 #address-cells = <2>;
801 compatible = "atmel,at91sam9263-ebi1";
802 #address-cells = <2>;
805 atmel,matrix = <&matrix>;
806 reg = <0x80000000 0x20000000>;
807 ranges = <0x0 0x0 0x80000000 0x10000000
808 0x1 0x0 0x90000000 0x10000000>;
809 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
812 nand_controller1: nand-controller {
813 compatible = "atmel,at91sam9260-nand-controller";
814 #address-cells = <2>;
823 compatible = "i2c-gpio";
824 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
825 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
827 i2c-gpio,sda-open-drain;
828 i2c-gpio,scl-open-drain;
829 i2c-gpio,delay-us = <2>; /* ~100 kHz */
830 #address-cells = <1>;