1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
5 * Copyright (C) 2011 Atmel,
6 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
7 * 2012 Joachim Eastwood <manabian@gmail.com>
9 * Based on at91sam9260.dtsi
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91RM9200 family SoC";
21 compatible = "atmel,at91rm9200";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm920t";
52 device_type = "memory";
53 reg = <0x20000000 0x04000000>;
57 slow_xtal: slow_xtal {
58 compatible = "fixed-clock";
60 clock-frequency = <0>;
63 main_xtal: main_xtal {
64 compatible = "fixed-clock";
66 clock-frequency = <0>;
71 compatible = "mmio-sram";
72 reg = <0x00200000 0x4000>;
76 compatible = "simple-bus";
82 compatible = "simple-bus";
87 aic: interrupt-controller@fffff000 {
88 #interrupt-cells = <3>;
89 compatible = "atmel,at91rm9200-aic";
91 reg = <0xfffff000 0x200>;
92 atmel,external-irqs = <25 26 27 28 29 30 31>;
95 ramc0: ramc@ffffff00 {
96 compatible = "atmel,at91rm9200-sdramc", "syscon";
97 reg = <0xffffff00 0x100>;
101 compatible = "atmel,at91rm9200-pmc", "syscon";
102 reg = <0xfffffc00 0x100>;
103 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
105 clocks = <&slow_xtal>, <&main_xtal>;
106 clock-names = "slow_xtal", "main_xtal";
110 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
111 reg = <0xfffffd00 0x100>;
112 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
113 clocks = <&slow_xtal>;
116 compatible = "atmel,at91rm9200-wdt";
121 compatible = "atmel,at91rm9200-rtc";
122 reg = <0xfffffe00 0x40>;
123 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
124 clocks = <&slow_xtal>;
128 tcb0: timer@fffa0000 {
129 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
130 #address-cells = <1>;
132 reg = <0xfffa0000 0x100>;
133 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
134 18 IRQ_TYPE_LEVEL_HIGH 0
135 19 IRQ_TYPE_LEVEL_HIGH 0>;
136 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
137 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
140 tcb1: timer@fffa4000 {
141 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
142 #address-cells = <1>;
144 reg = <0xfffa4000 0x100>;
145 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
146 21 IRQ_TYPE_LEVEL_HIGH 0
147 22 IRQ_TYPE_LEVEL_HIGH 0>;
148 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>;
149 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
153 compatible = "atmel,at91rm9200-i2c";
154 reg = <0xfffb8000 0x4000>;
155 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_twi>;
158 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
159 #address-cells = <1>;
165 compatible = "atmel,hsmci";
166 reg = <0xfffb4000 0x4000>;
167 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
168 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
169 clock-names = "mci_clk";
170 #address-cells = <1>;
172 pinctrl-names = "default";
177 compatible = "atmel,at91rm9200-ssc";
178 reg = <0xfffd0000 0x4000>;
179 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
182 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
183 clock-names = "pclk";
188 compatible = "atmel,at91rm9200-ssc";
189 reg = <0xfffd4000 0x4000>;
190 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
193 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
194 clock-names = "pclk";
199 compatible = "atmel,at91rm9200-ssc";
200 reg = <0xfffd8000 0x4000>;
201 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
204 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
205 clock-names = "pclk";
209 macb0: ethernet@fffbc000 {
210 compatible = "cdns,at91rm9200-emac", "cdns,emac";
211 reg = <0xfffbc000 0x4000>;
212 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_macb_rmii>;
216 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
217 clock-names = "ether_clk";
222 #address-cells = <1>;
224 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
225 ranges = <0xfffff400 0xfffff400 0x800>;
229 0xffffffff 0xffffffff /* pioA */
230 0xffffffff 0x083fffff /* pioB */
231 0xffff3fff 0x00000000 /* pioC */
232 0x03ff87ff 0x0fffff80 /* pioD */
235 /* shared pinctrl settings */
237 pinctrl_dbgu: dbgu-0 {
239 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
240 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
245 pinctrl_uart0: uart0-0 {
247 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE
248 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
251 pinctrl_uart0_cts: uart0_cts-0 {
253 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
256 pinctrl_uart0_rts: uart0_rts-0 {
258 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
263 pinctrl_uart1: uart1-0 {
265 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
266 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
269 pinctrl_uart1_rts: uart1_rts-0 {
271 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
274 pinctrl_uart1_cts: uart1_cts-0 {
276 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
279 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
281 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
282 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
285 pinctrl_uart1_dcd: uart1_dcd-0 {
287 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
290 pinctrl_uart1_ri: uart1_ri-0 {
292 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
297 pinctrl_uart2: uart2-0 {
299 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
300 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
303 pinctrl_uart2_rts: uart2_rts-0 {
305 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
308 pinctrl_uart2_cts: uart2_cts-0 {
310 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
315 pinctrl_uart3: uart3-0 {
317 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE
318 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
321 pinctrl_uart3_rts: uart3_rts-0 {
323 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
326 pinctrl_uart3_cts: uart3_cts-0 {
328 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
333 pinctrl_nand: nand-0 {
335 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
336 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
341 pinctrl_macb_rmii: macb_rmii-0 {
343 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
344 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
345 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
346 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
347 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
348 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
349 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
350 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
351 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
352 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
355 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
357 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
358 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
359 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
360 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
361 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
362 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
363 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
364 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
369 pinctrl_mmc0_clk: mmc0_clk-0 {
371 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
374 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
376 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
377 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
380 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
382 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
383 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
384 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
387 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
389 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
390 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
393 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
395 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
396 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
397 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
402 pinctrl_ssc0_tx: ssc0_tx-0 {
404 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
405 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
406 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
409 pinctrl_ssc0_rx: ssc0_rx-0 {
411 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
412 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
413 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
418 pinctrl_ssc1_tx: ssc1_tx-0 {
420 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
421 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
422 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
425 pinctrl_ssc1_rx: ssc1_rx-0 {
427 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
428 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
429 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
434 pinctrl_ssc2_tx: ssc2_tx-0 {
436 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
437 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
438 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
441 pinctrl_ssc2_rx: ssc2_rx-0 {
443 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
444 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
445 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
452 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
453 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
456 pinctrl_twi_gpio: twi_gpio-0 {
458 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
459 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
464 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
465 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
468 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
469 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
473 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
477 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
480 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
481 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
485 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
489 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
493 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
497 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
502 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
503 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
506 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
507 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
510 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
511 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
514 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
515 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
518 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
519 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
522 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
523 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
526 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
527 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
530 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
531 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
534 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
535 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
540 pinctrl_spi0: spi0-0 {
542 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
543 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
544 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
548 pioA: gpio@fffff400 {
549 compatible = "atmel,at91rm9200-gpio";
550 reg = <0xfffff400 0x200>;
551 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
554 interrupt-controller;
555 #interrupt-cells = <2>;
556 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
559 pioB: gpio@fffff600 {
560 compatible = "atmel,at91rm9200-gpio";
561 reg = <0xfffff600 0x200>;
562 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
565 interrupt-controller;
566 #interrupt-cells = <2>;
567 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
570 pioC: gpio@fffff800 {
571 compatible = "atmel,at91rm9200-gpio";
572 reg = <0xfffff800 0x200>;
573 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
576 interrupt-controller;
577 #interrupt-cells = <2>;
578 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
581 pioD: gpio@fffffa00 {
582 compatible = "atmel,at91rm9200-gpio";
583 reg = <0xfffffa00 0x200>;
584 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
587 interrupt-controller;
588 #interrupt-cells = <2>;
589 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
593 dbgu: serial@fffff200 {
594 compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
595 reg = <0xfffff200 0x200>;
596 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
597 pinctrl-names = "default";
598 pinctrl-0 = <&pinctrl_dbgu>;
599 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
600 clock-names = "usart";
604 usart0: serial@fffc0000 {
605 compatible = "atmel,at91rm9200-usart";
606 reg = <0xfffc0000 0x200>;
607 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
610 pinctrl-names = "default";
611 pinctrl-0 = <&pinctrl_uart0>;
612 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
613 clock-names = "usart";
617 usart1: serial@fffc4000 {
618 compatible = "atmel,at91rm9200-usart";
619 reg = <0xfffc4000 0x200>;
620 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
623 pinctrl-names = "default";
624 pinctrl-0 = <&pinctrl_uart1>;
625 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
626 clock-names = "usart";
630 usart2: serial@fffc8000 {
631 compatible = "atmel,at91rm9200-usart";
632 reg = <0xfffc8000 0x200>;
633 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
636 pinctrl-names = "default";
637 pinctrl-0 = <&pinctrl_uart2>;
638 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
639 clock-names = "usart";
643 usart3: serial@fffcc000 {
644 compatible = "atmel,at91rm9200-usart";
645 reg = <0xfffcc000 0x200>;
646 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
649 pinctrl-names = "default";
650 pinctrl-0 = <&pinctrl_uart3>;
651 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
652 clock-names = "usart";
656 usb1: gadget@fffb0000 {
657 compatible = "atmel,at91rm9200-udc";
658 reg = <0xfffb0000 0x4000>;
659 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
660 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>, <&pmc PMC_TYPE_SYSTEM 2>;
661 clock-names = "pclk", "hclk";
666 #address-cells = <1>;
668 compatible = "atmel,at91rm9200-spi";
669 reg = <0xfffe0000 0x200>;
670 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
671 pinctrl-names = "default";
672 pinctrl-0 = <&pinctrl_spi0>;
673 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
674 clock-names = "spi_clk";
679 nand0: nand@40000000 {
680 compatible = "atmel,at91rm9200-nand";
681 #address-cells = <1>;
683 reg = <0x40000000 0x10000000>;
684 atmel,nand-addr-offset = <21>;
685 atmel,nand-cmd-offset = <22>;
686 pinctrl-names = "default";
687 pinctrl-0 = <&pinctrl_nand>;
688 nand-ecc-mode = "soft";
689 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
691 &pioB 1 GPIO_ACTIVE_HIGH
697 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
698 reg = <0x00300000 0x100000>;
699 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
700 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 4>;
701 clock-names = "ohci_clk", "hclk", "uhpck";
707 compatible = "i2c-gpio";
708 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
709 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
711 i2c-gpio,sda-open-drain;
712 i2c-gpio,scl-open-drain;
713 i2c-gpio,delay-us = <2>; /* ~100 kHz */
714 pinctrl-names = "default";
715 pinctrl-0 = <&pinctrl_twi_gpio>;
716 #address-cells = <1>;