1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
5 * Copyright (C) 2011 Atmel,
6 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
7 * 2012 Joachim Eastwood <manabian@gmail.com>
9 * Based on at91sam9260.dtsi
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
20 model = "Atmel AT91RM9200 family SoC";
21 compatible = "atmel,at91rm9200";
22 interrupt-parent = <&aic>;
46 compatible = "arm,arm920t";
53 device_type = "memory";
54 reg = <0x20000000 0x04000000>;
58 slow_xtal: slow_xtal {
59 compatible = "fixed-clock";
61 clock-frequency = <0>;
64 main_xtal: main_xtal {
65 compatible = "fixed-clock";
67 clock-frequency = <0>;
72 compatible = "mmio-sram";
73 reg = <0x00200000 0x4000>;
76 ranges = <0 0x00200000 0x4000>;
80 compatible = "simple-bus";
86 compatible = "simple-bus";
91 aic: interrupt-controller@fffff000 {
92 #interrupt-cells = <3>;
93 compatible = "atmel,at91rm9200-aic";
95 reg = <0xfffff000 0x200>;
96 atmel,external-irqs = <25 26 27 28 29 30 31>;
99 ramc0: ramc@ffffff00 {
100 compatible = "atmel,at91rm9200-sdramc", "syscon";
101 reg = <0xffffff00 0x100>;
105 compatible = "atmel,at91rm9200-pmc", "syscon";
106 reg = <0xfffffc00 0x100>;
107 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
109 clocks = <&slow_xtal>, <&main_xtal>;
110 clock-names = "slow_xtal", "main_xtal";
114 compatible = "atmel,at91rm9200-st", "syscon", "simple-mfd";
115 reg = <0xfffffd00 0x100>;
116 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
117 clocks = <&slow_xtal>;
120 compatible = "atmel,at91rm9200-wdt";
125 compatible = "atmel,at91rm9200-rtc";
126 reg = <0xfffffe00 0x40>;
127 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
128 clocks = <&slow_xtal>;
132 tcb0: timer@fffa0000 {
133 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
134 #address-cells = <1>;
136 reg = <0xfffa0000 0x100>;
137 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
138 18 IRQ_TYPE_LEVEL_HIGH 0
139 19 IRQ_TYPE_LEVEL_HIGH 0>;
140 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
141 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
144 tcb1: timer@fffa4000 {
145 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
146 #address-cells = <1>;
148 reg = <0xfffa4000 0x100>;
149 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
150 21 IRQ_TYPE_LEVEL_HIGH 0
151 22 IRQ_TYPE_LEVEL_HIGH 0>;
152 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&slow_xtal>;
153 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
157 compatible = "atmel,at91rm9200-i2c";
158 reg = <0xfffb8000 0x4000>;
159 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
160 pinctrl-names = "default";
161 pinctrl-0 = <&pinctrl_twi>;
162 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
163 #address-cells = <1>;
169 compatible = "atmel,hsmci";
170 reg = <0xfffb4000 0x4000>;
171 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
172 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
173 clock-names = "mci_clk";
174 #address-cells = <1>;
176 pinctrl-names = "default";
181 compatible = "atmel,at91rm9200-ssc";
182 reg = <0xfffd0000 0x4000>;
183 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
184 pinctrl-names = "default";
185 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
186 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
187 clock-names = "pclk";
192 compatible = "atmel,at91rm9200-ssc";
193 reg = <0xfffd4000 0x4000>;
194 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
197 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
198 clock-names = "pclk";
203 compatible = "atmel,at91rm9200-ssc";
204 reg = <0xfffd8000 0x4000>;
205 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
208 clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
209 clock-names = "pclk";
213 macb0: ethernet@fffbc000 {
214 compatible = "cdns,at91rm9200-emac", "cdns,emac";
215 reg = <0xfffbc000 0x4000>;
216 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_macb_rmii>;
220 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
221 clock-names = "ether_clk";
226 #address-cells = <1>;
228 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
229 ranges = <0xfffff400 0xfffff400 0x800>;
233 0xffffffff 0xffffffff /* pioA */
234 0xffffffff 0x083fffff /* pioB */
235 0xffff3fff 0x00000000 /* pioC */
236 0x03ff87ff 0x0fffff80 /* pioD */
239 /* shared pinctrl settings */
241 pinctrl_dbgu: dbgu-0 {
243 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
244 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
249 pinctrl_uart0: uart0-0 {
251 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE
252 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
255 pinctrl_uart0_cts: uart0_cts-0 {
257 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
260 pinctrl_uart0_rts: uart0_rts-0 {
262 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
267 pinctrl_uart1: uart1-0 {
269 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
270 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
273 pinctrl_uart1_rts: uart1_rts-0 {
275 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
278 pinctrl_uart1_cts: uart1_cts-0 {
280 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
283 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
285 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
286 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
289 pinctrl_uart1_dcd: uart1_dcd-0 {
291 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
294 pinctrl_uart1_ri: uart1_ri-0 {
296 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
301 pinctrl_uart2: uart2-0 {
303 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
304 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
307 pinctrl_uart2_rts: uart2_rts-0 {
309 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
312 pinctrl_uart2_cts: uart2_cts-0 {
314 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
319 pinctrl_uart3: uart3-0 {
321 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE
322 AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
325 pinctrl_uart3_rts: uart3_rts-0 {
327 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
330 pinctrl_uart3_cts: uart3_cts-0 {
332 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
337 pinctrl_nand: nand-0 {
339 <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
340 AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
345 pinctrl_macb_rmii: macb_rmii-0 {
347 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
348 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
349 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
350 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
351 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
352 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
353 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
354 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
355 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
356 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
359 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
361 <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
362 AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
363 AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
364 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
365 AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
366 AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
367 AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
368 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
373 pinctrl_mmc0_clk: mmc0_clk-0 {
375 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
378 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
380 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
381 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
384 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
386 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
387 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
388 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
391 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
393 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
394 AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
397 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
399 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
400 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
401 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
406 pinctrl_ssc0_tx: ssc0_tx-0 {
408 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
409 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
410 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
413 pinctrl_ssc0_rx: ssc0_rx-0 {
415 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
416 AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
417 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
422 pinctrl_ssc1_tx: ssc1_tx-0 {
424 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
425 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
426 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
429 pinctrl_ssc1_rx: ssc1_rx-0 {
431 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
432 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
433 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
438 pinctrl_ssc2_tx: ssc2_tx-0 {
440 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
441 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
442 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
445 pinctrl_ssc2_rx: ssc2_rx-0 {
447 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
448 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
449 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
456 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
457 AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
460 pinctrl_twi_gpio: twi_gpio-0 {
462 <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
463 AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
468 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
469 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
472 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
473 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
477 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
480 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
481 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
485 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
488 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
489 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
492 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
493 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
496 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
497 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
500 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
501 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
506 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
507 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
510 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
511 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
514 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
515 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
518 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
519 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
522 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
523 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
526 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
527 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
530 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
531 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
534 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
535 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
538 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
539 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
544 pinctrl_spi0: spi0-0 {
546 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
547 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
548 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
552 pioA: gpio@fffff400 {
553 compatible = "atmel,at91rm9200-gpio";
554 reg = <0xfffff400 0x200>;
555 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
558 interrupt-controller;
559 #interrupt-cells = <2>;
560 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
563 pioB: gpio@fffff600 {
564 compatible = "atmel,at91rm9200-gpio";
565 reg = <0xfffff600 0x200>;
566 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
569 interrupt-controller;
570 #interrupt-cells = <2>;
571 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
574 pioC: gpio@fffff800 {
575 compatible = "atmel,at91rm9200-gpio";
576 reg = <0xfffff800 0x200>;
577 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
580 interrupt-controller;
581 #interrupt-cells = <2>;
582 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
585 pioD: gpio@fffffa00 {
586 compatible = "atmel,at91rm9200-gpio";
587 reg = <0xfffffa00 0x200>;
588 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
591 interrupt-controller;
592 #interrupt-cells = <2>;
593 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
597 dbgu: serial@fffff200 {
598 compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
599 reg = <0xfffff200 0x200>;
600 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
601 pinctrl-names = "default";
602 pinctrl-0 = <&pinctrl_dbgu>;
603 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
604 clock-names = "usart";
608 usart0: serial@fffc0000 {
609 compatible = "atmel,at91rm9200-usart";
610 reg = <0xfffc0000 0x200>;
611 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
614 pinctrl-names = "default";
615 pinctrl-0 = <&pinctrl_uart0>;
616 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
617 clock-names = "usart";
621 usart1: serial@fffc4000 {
622 compatible = "atmel,at91rm9200-usart";
623 reg = <0xfffc4000 0x200>;
624 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
627 pinctrl-names = "default";
628 pinctrl-0 = <&pinctrl_uart1>;
629 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
630 clock-names = "usart";
634 usart2: serial@fffc8000 {
635 compatible = "atmel,at91rm9200-usart";
636 reg = <0xfffc8000 0x200>;
637 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
640 pinctrl-names = "default";
641 pinctrl-0 = <&pinctrl_uart2>;
642 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
643 clock-names = "usart";
647 usart3: serial@fffcc000 {
648 compatible = "atmel,at91rm9200-usart";
649 reg = <0xfffcc000 0x200>;
650 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
653 pinctrl-names = "default";
654 pinctrl-0 = <&pinctrl_uart3>;
655 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
656 clock-names = "usart";
660 usb1: gadget@fffb0000 {
661 compatible = "atmel,at91rm9200-udc";
662 reg = <0xfffb0000 0x4000>;
663 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
664 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>, <&pmc PMC_TYPE_SYSTEM 2>;
665 clock-names = "pclk", "hclk";
670 #address-cells = <1>;
672 compatible = "atmel,at91rm9200-spi";
673 reg = <0xfffe0000 0x200>;
674 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
675 pinctrl-names = "default";
676 pinctrl-0 = <&pinctrl_spi0>;
677 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
678 clock-names = "spi_clk";
683 nand0: nand@40000000 {
684 compatible = "atmel,at91rm9200-nand";
685 #address-cells = <1>;
687 reg = <0x40000000 0x10000000>;
688 atmel,nand-addr-offset = <21>;
689 atmel,nand-cmd-offset = <22>;
690 pinctrl-names = "default";
691 pinctrl-0 = <&pinctrl_nand>;
692 nand-ecc-mode = "soft";
693 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
695 &pioB 1 GPIO_ACTIVE_HIGH
701 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
702 reg = <0x00300000 0x100000>;
703 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
704 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 4>;
705 clock-names = "ohci_clk", "hclk", "uhpck";
711 compatible = "i2c-gpio";
712 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
713 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
715 i2c-gpio,sda-open-drain;
716 i2c-gpio,scl-open-drain;
717 i2c-gpio,delay-us = <2>; /* ~100 kHz */
718 pinctrl-names = "default";
719 pinctrl-0 = <&pinctrl_twi_gpio>;
720 #address-cells = <1>;