1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
5 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
7 * Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
8 * Author: Eugen Hristev <eugen.hristev@microcihp.com>
10 #include "sama5d2.dtsi"
11 #include "sama5d2-pinfunc.h"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/pinctrl/at91.h>
17 model = "Microchip SAMA5D27 WLSOM1";
18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
26 clock-frequency = <32768>;
30 clock-frequency = <24000000>;
34 wifi_pwrseq: wifi_pwrseq {
35 compatible = "mmc-pwrseq-wilc1000";
36 reset-gpios = <&pioA PIN_PA27 GPIO_ACTIVE_HIGH>;
37 powerdown-gpios = <&pioA PIN_PA29 GPIO_ACTIVE_HIGH>;
38 pinctrl-0 = <&pinctrl_wilc_pwrseq>;
39 pinctrl-names = "default";
44 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
47 pinctrl-0 = <&pinctrl_flx1_default>;
48 pinctrl-names = "default";
53 pinctrl-0 = <&pinctrl_i2c0_default>;
54 pinctrl-1 = <&pinctrl_i2c0_gpio>;
55 pinctrl-names = "default", "gpio";
56 sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
57 scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
63 pinctrl-names = "default", "gpio";
64 pinctrl-0 = <&pinctrl_i2c1_default>;
65 pinctrl-1 = <&pinctrl_i2c1_gpio>;
66 sda-gpios = <&pioA PIN_PD19 GPIO_ACTIVE_HIGH>;
67 scl-gpios = <&pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
71 compatible = "microchip,mcp16502";
74 lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>;
78 regulator-name = "VDD_IO";
79 regulator-min-microvolt = <1200000>;
80 regulator-max-microvolt = <3700000>;
81 regulator-initial-mode = <2>;
82 regulator-allowed-modes = <2>, <4>;
85 regulator-state-standby {
86 regulator-on-in-suspend;
91 regulator-off-in-suspend;
97 regulator-name = "VDD_DDR";
98 regulator-min-microvolt = <600000>;
99 regulator-max-microvolt = <1850000>;
100 regulator-initial-mode = <2>;
101 regulator-allowed-modes = <2>, <4>;
104 regulator-state-standby {
105 regulator-on-in-suspend;
106 regulator-suspend-microvolt = <1200000>;
107 regulator-changeable-in-suspend;
108 regulator-mode = <4>;
111 regulator-state-mem {
112 regulator-on-in-suspend;
113 regulator-suspend-microvolt = <1200000>;
114 regulator-changeable-in-suspend;
115 regulator-mode = <4>;
120 regulator-name = "VDD_CORE";
121 regulator-min-microvolt = <600000>;
122 regulator-max-microvolt = <1850000>;
123 regulator-initial-mode = <2>;
124 regulator-allowed-modes = <2>, <4>;
127 regulator-state-standby {
128 regulator-on-in-suspend;
129 regulator-mode = <4>;
132 regulator-state-mem {
133 regulator-off-in-suspend;
134 regulator-mode = <4>;
139 regulator-name = "VDD_OTHER";
140 regulator-min-microvolt = <1800000>;
141 regulator-max-microvolt = <1800000>;
142 regulator-initial-mode = <2>;
143 regulator-allowed-modes = <2>, <4>;
146 regulator-state-standby {
147 regulator-on-in-suspend;
148 regulator-suspend-microvolt = <1800000>;
149 regulator-changeable-in-suspend;
150 regulator-mode = <4>;
153 regulator-state-mem {
154 regulator-on-in-suspend;
155 regulator-suspend-microvolt = <1800000>;
156 regulator-changeable-in-suspend;
157 regulator-mode = <4>;
162 regulator-name = "LDO1";
163 regulator-min-microvolt = <1200000>;
164 regulator-max-microvolt = <3700000>;
167 regulator-state-standby {
168 regulator-on-in-suspend;
171 regulator-state-mem {
172 regulator-off-in-suspend;
177 regulator-name = "LDO2";
178 regulator-min-microvolt = <1200000>;
179 regulator-max-microvolt = <3700000>;
182 regulator-state-standby {
183 regulator-on-in-suspend;
186 regulator-state-mem {
187 regulator-off-in-suspend;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_macb0_default>;
201 interrupt-parent = <&pioA>;
202 interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&pinctrl_macb0_phy_irq>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_qspi1_default>;
217 qspi1_flash: spi_flash@0 {
218 #address-cells = <1>;
220 compatible = "jedec,spi-nor";
222 spi-max-frequency = <80000000>;
223 spi-rx-bus-width = <4>;
224 spi-tx-bus-width = <4>;
229 label = "at91bootstrap";
234 label = "bootloader";
235 reg = <0x40000 0xc0000>;
238 bootloaderenvred@100000 {
239 label = "bootloader env redundant";
240 reg = <0x100000 0x40000>;
243 bootloaderenv@140000 {
244 label = "bootloader env";
245 reg = <0x140000 0x40000>;
249 label = "device tree";
250 reg = <0x180000 0x80000>;
255 reg = <0x200000 0x600000>;
261 pinctrl_flx1_default: flx1_usart_default {
262 pinmux = <PIN_PA24__FLEXCOM1_IO0>,
263 <PIN_PA23__FLEXCOM1_IO1>,
264 <PIN_PA25__FLEXCOM1_IO3>,
265 <PIN_PA26__FLEXCOM1_IO4>;
269 pinctrl_i2c0_default: i2c0_default {
270 pinmux = <PIN_PD21__TWD0>,
275 pinctrl_i2c0_gpio: i2c0_gpio {
276 pinmux = <PIN_PD21__GPIO>,
281 pinctrl_i2c1_default: i2c1_default {
282 pinmux = <PIN_PD19__TWD1>,
287 pinctrl_i2c1_gpio: i2c1_gpio {
288 pinmux = <PIN_PD19__GPIO>,
293 pinctrl_macb0_default: macb0_default {
294 pinmux = <PIN_PB14__GTXCK>,
307 pinctrl_macb0_phy_irq: macb0_phy_irq {
308 pinmux = <PIN_PB24__GPIO>;
312 pinctrl_qspi1_default: qspi1_default {
313 pinmux = <PIN_PB5__QSPI1_SCK>,
315 <PIN_PB7__QSPI1_IO0>,
316 <PIN_PB8__QSPI1_IO1>,
317 <PIN_PB9__QSPI1_IO2>,
318 <PIN_PB10__QSPI1_IO3>;
322 pinctrl_sdmmc1_default: sdmmc1_default {
324 pinmux = <PIN_PA28__SDMMC1_CMD>,
325 <PIN_PA18__SDMMC1_DAT0>,
326 <PIN_PA19__SDMMC1_DAT1>,
327 <PIN_PA20__SDMMC1_DAT2>,
328 <PIN_PA21__SDMMC1_DAT3>;
333 pinmux = <PIN_PA22__SDMMC1_CK>;
338 pinctrl_wilc_default: wilc_default {
340 pinmux = <PIN_PB25__GPIO>;
345 pinctrl_wilc_pwrseq: wilc_pwrseq {
347 pinmux = <PIN_PA27__GPIO>,
353 pinmux = <PIN_PB13__PCK1>;
360 #address-cells = <1>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_sdmmc1_default>;
365 mmc-pwrseq = <&wifi_pwrseq>;
373 compatible = "microchip,wilc1000";
374 pinctrl-names = "default";
375 pinctrl-0 = <&pinctrl_wilc_default>;
376 clocks = <&pmc PMC_TYPE_SYSTEM 9>;
378 interrupts = <PIN_PB25 IRQ_TYPE_NONE>;
379 interrupt-parent = <&pioA>;
380 assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>;
381 assigned-clock-rates = <32768>;