1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1
5 * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries
7 * Author: Nicolas Ferre <nicolas.ferre@microcihp.com>
8 * Author: Eugen Hristev <eugen.hristev@microcihp.com>
10 #include "sama5d2.dtsi"
11 #include "sama5d2-pinfunc.h"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/mfd/atmel-flexcom.h>
14 #include <dt-bindings/pinctrl/at91.h>
17 model = "Microchip SAMA5D27 WLSOM1";
18 compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
26 clock-frequency = <32768>;
30 clock-frequency = <24000000>;
36 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
39 pinctrl-0 = <&pinctrl_flx1_default>;
40 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_i2c0_default>;
46 pinctrl-1 = <&pinctrl_i2c0_gpio>;
47 pinctrl-names = "default", "gpio";
48 sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
49 scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
55 pinctrl-names = "default", "gpio";
56 pinctrl-0 = <&pinctrl_i2c1_default>;
57 pinctrl-1 = <&pinctrl_i2c1_gpio>;
58 sda-gpios = <&pioA PIN_PD19 GPIO_ACTIVE_HIGH>;
59 scl-gpios = <&pioA PIN_PD20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
63 compatible = "microchip,mcp16502";
66 lpm-gpios = <&pioBU 0 GPIO_ACTIVE_LOW>;
70 regulator-name = "VDD_IO";
71 regulator-min-microvolt = <1200000>;
72 regulator-max-microvolt = <3700000>;
73 regulator-initial-mode = <2>;
74 regulator-allowed-modes = <2>, <4>;
77 regulator-state-standby {
78 regulator-on-in-suspend;
83 regulator-off-in-suspend;
89 regulator-name = "VDD_DDR";
90 regulator-min-microvolt = <600000>;
91 regulator-max-microvolt = <1850000>;
92 regulator-initial-mode = <2>;
93 regulator-allowed-modes = <2>, <4>;
96 regulator-state-standby {
97 regulator-on-in-suspend;
98 regulator-suspend-microvolt = <1200000>;
99 regulator-changeable-in-suspend;
100 regulator-mode = <4>;
103 regulator-state-mem {
104 regulator-on-in-suspend;
105 regulator-suspend-microvolt = <1200000>;
106 regulator-changeable-in-suspend;
107 regulator-mode = <4>;
112 regulator-name = "VDD_CORE";
113 regulator-min-microvolt = <600000>;
114 regulator-max-microvolt = <1850000>;
115 regulator-initial-mode = <2>;
116 regulator-allowed-modes = <2>, <4>;
119 regulator-state-standby {
120 regulator-on-in-suspend;
121 regulator-mode = <4>;
124 regulator-state-mem {
125 regulator-off-in-suspend;
126 regulator-mode = <4>;
131 regulator-name = "VDD_OTHER";
132 regulator-min-microvolt = <1800000>;
133 regulator-max-microvolt = <1800000>;
134 regulator-initial-mode = <2>;
135 regulator-allowed-modes = <2>, <4>;
138 regulator-state-standby {
139 regulator-on-in-suspend;
140 regulator-suspend-microvolt = <1800000>;
141 regulator-changeable-in-suspend;
142 regulator-mode = <4>;
145 regulator-state-mem {
146 regulator-on-in-suspend;
147 regulator-suspend-microvolt = <1800000>;
148 regulator-changeable-in-suspend;
149 regulator-mode = <4>;
154 regulator-name = "LDO1";
155 regulator-min-microvolt = <1200000>;
156 regulator-max-microvolt = <3700000>;
159 regulator-state-standby {
160 regulator-on-in-suspend;
163 regulator-state-mem {
164 regulator-off-in-suspend;
169 regulator-name = "LDO2";
170 regulator-min-microvolt = <1200000>;
171 regulator-max-microvolt = <3700000>;
174 regulator-state-standby {
175 regulator-on-in-suspend;
178 regulator-state-mem {
179 regulator-off-in-suspend;
187 pinctrl-names = "default";
188 pinctrl-0 = <&pinctrl_macb0_default>;
193 interrupt-parent = <&pioA>;
194 interrupts = <PIN_PB24 IRQ_TYPE_LEVEL_LOW>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_macb0_phy_irq>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_qspi1_default>;
209 qspi1_flash: spi_flash@0 {
210 #address-cells = <1>;
212 compatible = "jedec,spi-nor";
214 spi-max-frequency = <80000000>;
215 spi-rx-bus-width = <4>;
216 spi-tx-bus-width = <4>;
221 label = "at91bootstrap";
226 label = "bootloader";
227 reg = <0x40000 0xc0000>;
230 bootloaderenvred@100000 {
231 label = "bootloader env redundant";
232 reg = <0x100000 0x40000>;
235 bootloaderenv@140000 {
236 label = "bootloader env";
237 reg = <0x140000 0x40000>;
241 label = "device tree";
242 reg = <0x180000 0x80000>;
247 reg = <0x200000 0x600000>;
253 pinctrl_flx1_default: flx1_usart_default {
254 pinmux = <PIN_PA24__FLEXCOM1_IO0>,
255 <PIN_PA23__FLEXCOM1_IO1>,
256 <PIN_PA25__FLEXCOM1_IO3>,
257 <PIN_PA26__FLEXCOM1_IO4>;
261 pinctrl_i2c0_default: i2c0_default {
262 pinmux = <PIN_PD21__TWD0>,
267 pinctrl_i2c0_gpio: i2c0_gpio {
268 pinmux = <PIN_PD21__GPIO>,
273 pinctrl_i2c1_default: i2c1_default {
274 pinmux = <PIN_PD19__TWD1>,
279 pinctrl_i2c1_gpio: i2c1_gpio {
280 pinmux = <PIN_PD19__GPIO>,
285 pinctrl_macb0_default: macb0_default {
286 pinmux = <PIN_PB14__GTXCK>,
299 pinctrl_macb0_phy_irq: macb0_phy_irq {
300 pinmux = <PIN_PB24__GPIO>;
304 pinctrl_qspi1_default: qspi1_default {
305 pinmux = <PIN_PB5__QSPI1_SCK>,
307 <PIN_PB7__QSPI1_IO0>,
308 <PIN_PB8__QSPI1_IO1>,
309 <PIN_PB9__QSPI1_IO2>,
310 <PIN_PB10__QSPI1_IO3>;