arch/arm/boot/dts/at91-sama5d27_som1.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
   4  *
   5  *  Copyright (c) 2017, Microchip Technology Inc.
   6  *                2017 Cristian Birsan <cristian.birsan@microchip.com>
   7  *                2017 Claudiu Beznea <claudiu.beznea@microchip.com>
   8  */
   9 #include "sama5d2.dtsi"
  10 #include "sama5d2-pinfunc.h"
  11
  12 / {
  13         model = "Atmel SAMA5D27 SoM1";
  14         compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
  15
  16         clocks {
  17                 slow_xtal {
  18                         clock-frequency = <32768>;
  19                 };
  20
  21                 main_xtal {
  22                         clock-frequency = <24000000>;
  23                 };
  24         };
  25
  26         ahb {
  27                 sdmmc0: sdio-host@a0000000 {
  28                         microchip,sdcal-inverted;
  29                 };
  30
  31                 apb {
  32                         qspi1: spi@f0024000 {
  33                                 pinctrl-names = "default";
  34                                 pinctrl-0 = <&pinctrl_qspi1_default>;
  35
  36                                 flash@0 {
  37                                         compatible = "jedec,spi-nor";
  38                                         reg = <0>;
  39                                         spi-max-frequency = <80000000>;
  40                                         spi-tx-bus-width = <4>;
  41                                         spi-rx-bus-width = <4>;
  42                                         m25p,fast-read;
  43                                 };
  44                         };
  45
  46                         macb0: ethernet@f8008000 {
  47                                 pinctrl-names = "default";
  48                                 pinctrl-0 = <&pinctrl_macb0_default>;
  49                                 phy-mode = "rmii";
  50
  51                                 ethernet-phy@0 {
  52                                         reg = <0x0>;
  53                                         interrupt-parent = <&pioA>;
  54                                         interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
  55                                         pinctrl-names = "default";
  56                                         pinctrl-0 = <&pinctrl_macb0_phy_irq>;
  57                                 };
  58                         };
  59
  60                         pinctrl@fc038000 {
  61
  62                                 pinctrl_qspi1_default: qspi1_default {
  63                                         sck_cs {
  64                                                 pinmux = <PIN_PB5__QSPI1_SCK>,
  65                                                          <PIN_PB6__QSPI1_CS>;
  66                                                 bias-disable;
  67                                         };
  68
  69                                         data {
  70                                                 pinmux = <PIN_PB7__QSPI1_IO0>,
  71                                                          <PIN_PB8__QSPI1_IO1>,
  72                                                          <PIN_PB9__QSPI1_IO2>,
  73                                                          <PIN_PB10__QSPI1_IO3>;
  74                                                 bias-pull-up;
  75                                         };
  76                                 };
  77
  78                                 pinctrl_macb0_default: macb0_default {
  79                                         pinmux = <PIN_PD9__GTXCK>,
  80                                                  <PIN_PD10__GTXEN>,
  81                                                  <PIN_PD11__GRXDV>,
  82                                                  <PIN_PD12__GRXER>,
  83                                                  <PIN_PD13__GRX0>,
  84                                                  <PIN_PD14__GRX1>,
  85                                                  <PIN_PD15__GTX0>,
  86                                                  <PIN_PD16__GTX1>,
  87                                                  <PIN_PD17__GMDC>,
  88                                                  <PIN_PD18__GMDIO>;
  89                                         bias-disable;
  90                                 };
  91
  92                                 pinctrl_macb0_phy_irq: macb0_phy_irq {
  93                                         pinmux = <PIN_PD31__GPIO>;
  94                                         bias-disable;
  95                                 };
  96                         };
  97                 };
  98         };
  99 };