1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2500";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm1176jzf-s";
46 device_type = "memory";
50 edac: sdram@1e6e0000 {
51 compatible = "aspeed,ast2500-sdram-edac";
52 reg = <0x1e6e0000 0x174>;
58 compatible = "simple-bus";
63 fmc: flash-controller@1e620000 {
64 reg = < 0x1e620000 0xc4
65 0x20000000 0x10000000 >;
68 compatible = "aspeed,ast2500-fmc";
69 clocks = <&syscon ASPEED_CLK_AHB>;
74 compatible = "jedec,spi-nor";
79 compatible = "jedec,spi-nor";
84 compatible = "jedec,spi-nor";
89 spi1: flash-controller@1e630000 {
90 reg = < 0x1e630000 0xc4
91 0x30000000 0x08000000 >;
94 compatible = "aspeed,ast2500-spi";
95 clocks = <&syscon ASPEED_CLK_AHB>;
99 compatible = "jedec,spi-nor";
104 compatible = "jedec,spi-nor";
109 spi2: flash-controller@1e631000 {
110 reg = < 0x1e631000 0xc4
111 0x38000000 0x08000000 >;
112 #address-cells = <1>;
114 compatible = "aspeed,ast2500-spi";
115 clocks = <&syscon ASPEED_CLK_AHB>;
119 compatible = "jedec,spi-nor";
124 compatible = "jedec,spi-nor";
129 vic: interrupt-controller@1e6c0080 {
130 compatible = "aspeed,ast2400-vic";
131 interrupt-controller;
132 #interrupt-cells = <1>;
133 valid-sources = <0xfefff7ff 0x0807ffff>;
134 reg = <0x1e6c0080 0x80>;
137 cvic: copro-interrupt-controller@1e6c2000 {
138 compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
139 valid-sources = <0xffffffff>;
140 copro-sw-interrupts = <1>;
141 reg = <0x1e6c2000 0x80>;
144 mac0: ethernet@1e660000 {
145 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
146 reg = <0x1e660000 0x180>;
148 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
152 mac1: ethernet@1e680000 {
153 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
154 reg = <0x1e680000 0x180>;
156 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
160 ehci0: usb@1e6a1000 {
161 compatible = "aspeed,ast2500-ehci", "generic-ehci";
162 reg = <0x1e6a1000 0x100>;
164 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usb2ah_default>;
170 ehci1: usb@1e6a3000 {
171 compatible = "aspeed,ast2500-ehci", "generic-ehci";
172 reg = <0x1e6a3000 0x100>;
174 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_usb2bh_default>;
181 compatible = "aspeed,ast2500-uhci", "generic-uhci";
182 reg = <0x1e6b0000 0x100>;
185 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
188 * No default pinmux, it will follow EHCI, use an explicit pinmux
189 * override if you don't enable EHCI
193 vhub: usb-vhub@1e6a0000 {
194 compatible = "aspeed,ast2500-usb-vhub";
195 reg = <0x1e6a0000 0x300>;
197 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_usb2ad_default>;
204 compatible = "simple-bus";
205 #address-cells = <1>;
209 syscon: syscon@1e6e2000 {
210 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
211 reg = <0x1e6e2000 0x1a8>;
212 #address-cells = <1>;
218 compatible = "aspeed,g5-pinctrl";
219 aspeed,external-nodes = <&gfx &lhc>;
224 rng: hwrng@1e6e2078 {
225 compatible = "timeriomem_rng";
226 reg = <0x1e6e2078 0x4>;
231 gfx: display@1e6e6000 {
232 compatible = "aspeed,ast2500-gfx", "syscon";
233 reg = <0x1e6e6000 0x1000>;
235 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
236 resets = <&syscon ASPEED_RESET_CRT1>;
242 compatible = "aspeed,ast2500-adc";
243 reg = <0x1e6e9000 0xb0>;
244 clocks = <&syscon ASPEED_CLK_APB>;
245 resets = <&syscon ASPEED_RESET_ADC>;
246 #io-channel-cells = <1>;
250 video: video@1e700000 {
251 compatible = "aspeed,ast2500-video-engine";
252 reg = <0x1e700000 0x1000>;
253 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
254 <&syscon ASPEED_CLK_GATE_ECLK>;
255 clock-names = "vclk", "eclk";
260 sram: sram@1e720000 {
261 compatible = "mmio-sram";
262 reg = <0x1e720000 0x9000>; // 36K
265 gpio: gpio@1e780000 {
268 compatible = "aspeed,ast2500-gpio";
269 reg = <0x1e780000 0x1000>;
271 gpio-ranges = <&pinctrl 0 0 220>;
272 clocks = <&syscon ASPEED_CLK_APB>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
278 compatible = "aspeed,ast2500-rtc";
279 reg = <0x1e781000 0x18>;
283 timer: timer@1e782000 {
284 /* This timer is a Faraday FTTMR010 derivative */
285 compatible = "aspeed,ast2400-timer";
286 reg = <0x1e782000 0x90>;
287 interrupts = <16 17 18 35 36 37 38 39>;
288 clocks = <&syscon ASPEED_CLK_APB>;
289 clock-names = "PCLK";
292 uart1: serial@1e783000 {
293 compatible = "ns16550a";
294 reg = <0x1e783000 0x20>;
297 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
298 resets = <&lpc_reset 4>;
303 uart5: serial@1e784000 {
304 compatible = "ns16550a";
305 reg = <0x1e784000 0x20>;
308 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
313 wdt1: watchdog@1e785000 {
314 compatible = "aspeed,ast2500-wdt";
315 reg = <0x1e785000 0x20>;
316 clocks = <&syscon ASPEED_CLK_APB>;
319 wdt2: watchdog@1e785020 {
320 compatible = "aspeed,ast2500-wdt";
321 reg = <0x1e785020 0x20>;
322 clocks = <&syscon ASPEED_CLK_APB>;
325 wdt3: watchdog@1e785040 {
326 compatible = "aspeed,ast2500-wdt";
327 reg = <0x1e785040 0x20>;
328 clocks = <&syscon ASPEED_CLK_APB>;
332 pwm_tacho: pwm-tacho-controller@1e786000 {
333 compatible = "aspeed,ast2500-pwm-tacho";
334 #address-cells = <1>;
336 reg = <0x1e786000 0x1000>;
337 clocks = <&syscon ASPEED_CLK_24M>;
338 resets = <&syscon ASPEED_RESET_PWM>;
342 vuart: serial@1e787000 {
343 compatible = "aspeed,ast2500-vuart";
344 reg = <0x1e787000 0x40>;
347 clocks = <&syscon ASPEED_CLK_APB>;
353 compatible = "aspeed,ast2500-lpc", "simple-mfd";
354 reg = <0x1e789000 0x1000>;
356 #address-cells = <1>;
358 ranges = <0x0 0x1e789000 0x1000>;
361 compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
365 #address-cells = <1>;
367 ranges = <0x0 0x0 0x80>;
370 compatible = "aspeed,ast2500-kcs-bmc";
376 compatible = "aspeed,ast2500-kcs-bmc";
382 compatible = "aspeed,ast2500-kcs-bmc";
389 lpc_host: lpc-host@80 {
390 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
394 #address-cells = <1>;
396 ranges = <0x0 0x80 0x1e0>;
399 compatible = "aspeed,ast2500-kcs-bmc";
405 lpc_ctrl: lpc-ctrl@0 {
406 compatible = "aspeed,ast2500-lpc-ctrl";
408 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
412 lpc_snoop: lpc-snoop@0 {
413 compatible = "aspeed,ast2500-lpc-snoop";
420 compatible = "aspeed,ast2500-lhc";
421 reg = <0x20 0x24 0x48 0x8>;
424 lpc_reset: reset-controller@18 {
425 compatible = "aspeed,ast2500-lpc-reset";
431 compatible = "aspeed,ast2500-ibt-bmc";
439 uart2: serial@1e78d000 {
440 compatible = "ns16550a";
441 reg = <0x1e78d000 0x20>;
444 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
445 resets = <&lpc_reset 5>;
450 uart3: serial@1e78e000 {
451 compatible = "ns16550a";
452 reg = <0x1e78e000 0x20>;
455 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
456 resets = <&lpc_reset 6>;
461 uart4: serial@1e78f000 {
462 compatible = "ns16550a";
463 reg = <0x1e78f000 0x20>;
466 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
467 resets = <&lpc_reset 7>;
473 compatible = "simple-bus";
474 #address-cells = <1>;
476 ranges = <0 0x1e78a000 0x1000>;
483 i2c_ic: interrupt-controller@0 {
484 #interrupt-cells = <1>;
485 compatible = "aspeed,ast2500-i2c-ic";
488 interrupt-controller;
492 #address-cells = <1>;
494 #interrupt-cells = <1>;
497 compatible = "aspeed,ast2500-i2c-bus";
498 clocks = <&syscon ASPEED_CLK_APB>;
499 resets = <&syscon ASPEED_RESET_I2C>;
500 bus-frequency = <100000>;
502 interrupt-parent = <&i2c_ic>;
504 /* Does not need pinctrl properties */
508 #address-cells = <1>;
510 #interrupt-cells = <1>;
513 compatible = "aspeed,ast2500-i2c-bus";
514 clocks = <&syscon ASPEED_CLK_APB>;
515 resets = <&syscon ASPEED_RESET_I2C>;
516 bus-frequency = <100000>;
518 interrupt-parent = <&i2c_ic>;
520 /* Does not need pinctrl properties */
524 #address-cells = <1>;
526 #interrupt-cells = <1>;
529 compatible = "aspeed,ast2500-i2c-bus";
530 clocks = <&syscon ASPEED_CLK_APB>;
531 resets = <&syscon ASPEED_RESET_I2C>;
532 bus-frequency = <100000>;
534 interrupt-parent = <&i2c_ic>;
535 pinctrl-names = "default";
536 pinctrl-0 = <&pinctrl_i2c3_default>;
541 #address-cells = <1>;
543 #interrupt-cells = <1>;
546 compatible = "aspeed,ast2500-i2c-bus";
547 clocks = <&syscon ASPEED_CLK_APB>;
548 resets = <&syscon ASPEED_RESET_I2C>;
549 bus-frequency = <100000>;
551 interrupt-parent = <&i2c_ic>;
552 pinctrl-names = "default";
553 pinctrl-0 = <&pinctrl_i2c4_default>;
558 #address-cells = <1>;
560 #interrupt-cells = <1>;
563 compatible = "aspeed,ast2500-i2c-bus";
564 clocks = <&syscon ASPEED_CLK_APB>;
565 resets = <&syscon ASPEED_RESET_I2C>;
566 bus-frequency = <100000>;
568 interrupt-parent = <&i2c_ic>;
569 pinctrl-names = "default";
570 pinctrl-0 = <&pinctrl_i2c5_default>;
575 #address-cells = <1>;
577 #interrupt-cells = <1>;
580 compatible = "aspeed,ast2500-i2c-bus";
581 clocks = <&syscon ASPEED_CLK_APB>;
582 resets = <&syscon ASPEED_RESET_I2C>;
583 bus-frequency = <100000>;
585 interrupt-parent = <&i2c_ic>;
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_i2c6_default>;
592 #address-cells = <1>;
594 #interrupt-cells = <1>;
597 compatible = "aspeed,ast2500-i2c-bus";
598 clocks = <&syscon ASPEED_CLK_APB>;
599 resets = <&syscon ASPEED_RESET_I2C>;
600 bus-frequency = <100000>;
602 interrupt-parent = <&i2c_ic>;
603 pinctrl-names = "default";
604 pinctrl-0 = <&pinctrl_i2c7_default>;
609 #address-cells = <1>;
611 #interrupt-cells = <1>;
614 compatible = "aspeed,ast2500-i2c-bus";
615 clocks = <&syscon ASPEED_CLK_APB>;
616 resets = <&syscon ASPEED_RESET_I2C>;
617 bus-frequency = <100000>;
619 interrupt-parent = <&i2c_ic>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_i2c8_default>;
626 #address-cells = <1>;
628 #interrupt-cells = <1>;
631 compatible = "aspeed,ast2500-i2c-bus";
632 clocks = <&syscon ASPEED_CLK_APB>;
633 resets = <&syscon ASPEED_RESET_I2C>;
634 bus-frequency = <100000>;
636 interrupt-parent = <&i2c_ic>;
637 pinctrl-names = "default";
638 pinctrl-0 = <&pinctrl_i2c9_default>;
643 #address-cells = <1>;
645 #interrupt-cells = <1>;
648 compatible = "aspeed,ast2500-i2c-bus";
649 clocks = <&syscon ASPEED_CLK_APB>;
650 resets = <&syscon ASPEED_RESET_I2C>;
651 bus-frequency = <100000>;
653 interrupt-parent = <&i2c_ic>;
654 pinctrl-names = "default";
655 pinctrl-0 = <&pinctrl_i2c10_default>;
660 #address-cells = <1>;
662 #interrupt-cells = <1>;
665 compatible = "aspeed,ast2500-i2c-bus";
666 clocks = <&syscon ASPEED_CLK_APB>;
667 resets = <&syscon ASPEED_RESET_I2C>;
668 bus-frequency = <100000>;
670 interrupt-parent = <&i2c_ic>;
671 pinctrl-names = "default";
672 pinctrl-0 = <&pinctrl_i2c11_default>;
677 #address-cells = <1>;
679 #interrupt-cells = <1>;
682 compatible = "aspeed,ast2500-i2c-bus";
683 clocks = <&syscon ASPEED_CLK_APB>;
684 resets = <&syscon ASPEED_RESET_I2C>;
685 bus-frequency = <100000>;
687 interrupt-parent = <&i2c_ic>;
688 pinctrl-names = "default";
689 pinctrl-0 = <&pinctrl_i2c12_default>;
694 #address-cells = <1>;
696 #interrupt-cells = <1>;
699 compatible = "aspeed,ast2500-i2c-bus";
700 clocks = <&syscon ASPEED_CLK_APB>;
701 resets = <&syscon ASPEED_RESET_I2C>;
702 bus-frequency = <100000>;
704 interrupt-parent = <&i2c_ic>;
705 pinctrl-names = "default";
706 pinctrl-0 = <&pinctrl_i2c13_default>;
711 #address-cells = <1>;
713 #interrupt-cells = <1>;
716 compatible = "aspeed,ast2500-i2c-bus";
717 clocks = <&syscon ASPEED_CLK_APB>;
718 resets = <&syscon ASPEED_RESET_I2C>;
719 bus-frequency = <100000>;
721 interrupt-parent = <&i2c_ic>;
722 pinctrl-names = "default";
723 pinctrl-0 = <&pinctrl_i2c14_default>;
729 pinctrl_acpi_default: acpi_default {
734 pinctrl_adc0_default: adc0_default {
739 pinctrl_adc1_default: adc1_default {
744 pinctrl_adc10_default: adc10_default {
749 pinctrl_adc11_default: adc11_default {
754 pinctrl_adc12_default: adc12_default {
759 pinctrl_adc13_default: adc13_default {
764 pinctrl_adc14_default: adc14_default {
769 pinctrl_adc15_default: adc15_default {
774 pinctrl_adc2_default: adc2_default {
779 pinctrl_adc3_default: adc3_default {
784 pinctrl_adc4_default: adc4_default {
789 pinctrl_adc5_default: adc5_default {
794 pinctrl_adc6_default: adc6_default {
799 pinctrl_adc7_default: adc7_default {
804 pinctrl_adc8_default: adc8_default {
809 pinctrl_adc9_default: adc9_default {
814 pinctrl_bmcint_default: bmcint_default {
819 pinctrl_ddcclk_default: ddcclk_default {
824 pinctrl_ddcdat_default: ddcdat_default {
829 pinctrl_espi_default: espi_default {
834 pinctrl_fwspics1_default: fwspics1_default {
835 function = "FWSPICS1";
839 pinctrl_fwspics2_default: fwspics2_default {
840 function = "FWSPICS2";
844 pinctrl_gpid0_default: gpid0_default {
849 pinctrl_gpid2_default: gpid2_default {
854 pinctrl_gpid4_default: gpid4_default {
859 pinctrl_gpid6_default: gpid6_default {
864 pinctrl_gpie0_default: gpie0_default {
869 pinctrl_gpie2_default: gpie2_default {
874 pinctrl_gpie4_default: gpie4_default {
879 pinctrl_gpie6_default: gpie6_default {
884 pinctrl_i2c10_default: i2c10_default {
889 pinctrl_i2c11_default: i2c11_default {
894 pinctrl_i2c12_default: i2c12_default {
899 pinctrl_i2c13_default: i2c13_default {
904 pinctrl_i2c14_default: i2c14_default {
909 pinctrl_i2c3_default: i2c3_default {
914 pinctrl_i2c4_default: i2c4_default {
919 pinctrl_i2c5_default: i2c5_default {
924 pinctrl_i2c6_default: i2c6_default {
929 pinctrl_i2c7_default: i2c7_default {
934 pinctrl_i2c8_default: i2c8_default {
939 pinctrl_i2c9_default: i2c9_default {
944 pinctrl_lad0_default: lad0_default {
949 pinctrl_lad1_default: lad1_default {
954 pinctrl_lad2_default: lad2_default {
959 pinctrl_lad3_default: lad3_default {
964 pinctrl_lclk_default: lclk_default {
969 pinctrl_lframe_default: lframe_default {
974 pinctrl_lpchc_default: lpchc_default {
979 pinctrl_lpcpd_default: lpcpd_default {
984 pinctrl_lpcplus_default: lpcplus_default {
985 function = "LPCPLUS";
989 pinctrl_lpcpme_default: lpcpme_default {
994 pinctrl_lpcrst_default: lpcrst_default {
999 pinctrl_lpcsmi_default: lpcsmi_default {
1000 function = "LPCSMI";
1004 pinctrl_lsirq_default: lsirq_default {
1009 pinctrl_mac1link_default: mac1link_default {
1010 function = "MAC1LINK";
1011 groups = "MAC1LINK";
1014 pinctrl_mac2link_default: mac2link_default {
1015 function = "MAC2LINK";
1016 groups = "MAC2LINK";
1019 pinctrl_mdio1_default: mdio1_default {
1024 pinctrl_mdio2_default: mdio2_default {
1029 pinctrl_ncts1_default: ncts1_default {
1034 pinctrl_ncts2_default: ncts2_default {
1039 pinctrl_ncts3_default: ncts3_default {
1044 pinctrl_ncts4_default: ncts4_default {
1049 pinctrl_ndcd1_default: ndcd1_default {
1054 pinctrl_ndcd2_default: ndcd2_default {
1059 pinctrl_ndcd3_default: ndcd3_default {
1064 pinctrl_ndcd4_default: ndcd4_default {
1069 pinctrl_ndsr1_default: ndsr1_default {
1074 pinctrl_ndsr2_default: ndsr2_default {
1079 pinctrl_ndsr3_default: ndsr3_default {
1084 pinctrl_ndsr4_default: ndsr4_default {
1089 pinctrl_ndtr1_default: ndtr1_default {
1094 pinctrl_ndtr2_default: ndtr2_default {
1099 pinctrl_ndtr3_default: ndtr3_default {
1104 pinctrl_ndtr4_default: ndtr4_default {
1109 pinctrl_nri1_default: nri1_default {
1114 pinctrl_nri2_default: nri2_default {
1119 pinctrl_nri3_default: nri3_default {
1124 pinctrl_nri4_default: nri4_default {
1129 pinctrl_nrts1_default: nrts1_default {
1134 pinctrl_nrts2_default: nrts2_default {
1139 pinctrl_nrts3_default: nrts3_default {
1144 pinctrl_nrts4_default: nrts4_default {
1149 pinctrl_oscclk_default: oscclk_default {
1150 function = "OSCCLK";
1154 pinctrl_pewake_default: pewake_default {
1155 function = "PEWAKE";
1159 pinctrl_pnor_default: pnor_default {
1164 pinctrl_pwm0_default: pwm0_default {
1169 pinctrl_pwm1_default: pwm1_default {
1174 pinctrl_pwm2_default: pwm2_default {
1179 pinctrl_pwm3_default: pwm3_default {
1184 pinctrl_pwm4_default: pwm4_default {
1189 pinctrl_pwm5_default: pwm5_default {
1194 pinctrl_pwm6_default: pwm6_default {
1199 pinctrl_pwm7_default: pwm7_default {
1204 pinctrl_rgmii1_default: rgmii1_default {
1205 function = "RGMII1";
1209 pinctrl_rgmii2_default: rgmii2_default {
1210 function = "RGMII2";
1214 pinctrl_rmii1_default: rmii1_default {
1219 pinctrl_rmii2_default: rmii2_default {
1224 pinctrl_rxd1_default: rxd1_default {
1229 pinctrl_rxd2_default: rxd2_default {
1234 pinctrl_rxd3_default: rxd3_default {
1239 pinctrl_rxd4_default: rxd4_default {
1244 pinctrl_salt1_default: salt1_default {
1249 pinctrl_salt10_default: salt10_default {
1250 function = "SALT10";
1254 pinctrl_salt11_default: salt11_default {
1255 function = "SALT11";
1259 pinctrl_salt12_default: salt12_default {
1260 function = "SALT12";
1264 pinctrl_salt13_default: salt13_default {
1265 function = "SALT13";
1269 pinctrl_salt14_default: salt14_default {
1270 function = "SALT14";
1274 pinctrl_salt2_default: salt2_default {
1279 pinctrl_salt3_default: salt3_default {
1284 pinctrl_salt4_default: salt4_default {
1289 pinctrl_salt5_default: salt5_default {
1294 pinctrl_salt6_default: salt6_default {
1299 pinctrl_salt7_default: salt7_default {
1304 pinctrl_salt8_default: salt8_default {
1309 pinctrl_salt9_default: salt9_default {
1314 pinctrl_scl1_default: scl1_default {
1319 pinctrl_scl2_default: scl2_default {
1324 pinctrl_sd1_default: sd1_default {
1329 pinctrl_sd2_default: sd2_default {
1334 pinctrl_sda1_default: sda1_default {
1339 pinctrl_sda2_default: sda2_default {
1344 pinctrl_sgps1_default: sgps1_default {
1349 pinctrl_sgps2_default: sgps2_default {
1354 pinctrl_sioonctrl_default: sioonctrl_default {
1355 function = "SIOONCTRL";
1356 groups = "SIOONCTRL";
1359 pinctrl_siopbi_default: siopbi_default {
1360 function = "SIOPBI";
1364 pinctrl_siopbo_default: siopbo_default {
1365 function = "SIOPBO";
1369 pinctrl_siopwreq_default: siopwreq_default {
1370 function = "SIOPWREQ";
1371 groups = "SIOPWREQ";
1374 pinctrl_siopwrgd_default: siopwrgd_default {
1375 function = "SIOPWRGD";
1376 groups = "SIOPWRGD";
1379 pinctrl_sios3_default: sios3_default {
1384 pinctrl_sios5_default: sios5_default {
1389 pinctrl_siosci_default: siosci_default {
1390 function = "SIOSCI";
1394 pinctrl_spi1_default: spi1_default {
1399 pinctrl_spi1cs1_default: spi1cs1_default {
1400 function = "SPI1CS1";
1404 pinctrl_spi1debug_default: spi1debug_default {
1405 function = "SPI1DEBUG";
1406 groups = "SPI1DEBUG";
1409 pinctrl_spi1passthru_default: spi1passthru_default {
1410 function = "SPI1PASSTHRU";
1411 groups = "SPI1PASSTHRU";
1414 pinctrl_spi2ck_default: spi2ck_default {
1415 function = "SPI2CK";
1419 pinctrl_spi2cs0_default: spi2cs0_default {
1420 function = "SPI2CS0";
1424 pinctrl_spi2cs1_default: spi2cs1_default {
1425 function = "SPI2CS1";
1429 pinctrl_spi2miso_default: spi2miso_default {
1430 function = "SPI2MISO";
1431 groups = "SPI2MISO";
1434 pinctrl_spi2mosi_default: spi2mosi_default {
1435 function = "SPI2MOSI";
1436 groups = "SPI2MOSI";
1439 pinctrl_timer3_default: timer3_default {
1440 function = "TIMER3";
1444 pinctrl_timer4_default: timer4_default {
1445 function = "TIMER4";
1449 pinctrl_timer5_default: timer5_default {
1450 function = "TIMER5";
1454 pinctrl_timer6_default: timer6_default {
1455 function = "TIMER6";
1459 pinctrl_timer7_default: timer7_default {
1460 function = "TIMER7";
1464 pinctrl_timer8_default: timer8_default {
1465 function = "TIMER8";
1469 pinctrl_txd1_default: txd1_default {
1474 pinctrl_txd2_default: txd2_default {
1479 pinctrl_txd3_default: txd3_default {
1484 pinctrl_txd4_default: txd4_default {
1489 pinctrl_uart6_default: uart6_default {
1494 pinctrl_usbcki_default: usbcki_default {
1495 function = "USBCKI";
1499 pinctrl_usb2ah_default: usb2ah_default {
1500 function = "USB2AH";
1504 pinctrl_usb2ad_default: usb2ad_default {
1505 function = "USB2AD";
1509 pinctrl_usb11bhid_default: usb11bhid_default {
1510 function = "USB11BHID";
1511 groups = "USB11BHID";
1514 pinctrl_usb2bh_default: usb2bh_default {
1515 function = "USB2BH";
1519 pinctrl_vgabiosrom_default: vgabiosrom_default {
1520 function = "VGABIOSROM";
1521 groups = "VGABIOSROM";
1524 pinctrl_vgahs_default: vgahs_default {
1529 pinctrl_vgavs_default: vgavs_default {
1534 pinctrl_vpi24_default: vpi24_default {
1539 pinctrl_vpo_default: vpo_default {
1544 pinctrl_wdtrst1_default: wdtrst1_default {
1545 function = "WDTRST1";
1549 pinctrl_wdtrst2_default: wdtrst2_default {
1550 function = "WDTRST2";