1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2500";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm1176jzf-s";
46 device_type = "memory";
51 compatible = "simple-bus";
57 reg = < 0x1e620000 0xc4
58 0x20000000 0x10000000 >;
61 compatible = "aspeed,ast2500-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
68 spi-max-frequency = <50000000>;
73 compatible = "jedec,spi-nor";
74 spi-max-frequency = <50000000>;
79 compatible = "jedec,spi-nor";
80 spi-max-frequency = <50000000>;
86 reg = < 0x1e630000 0xc4
87 0x30000000 0x08000000 >;
90 compatible = "aspeed,ast2500-spi";
91 clocks = <&syscon ASPEED_CLK_AHB>;
95 compatible = "jedec,spi-nor";
96 spi-max-frequency = <50000000>;
101 compatible = "jedec,spi-nor";
102 spi-max-frequency = <50000000>;
108 reg = < 0x1e631000 0xc4
109 0x38000000 0x08000000 >;
110 #address-cells = <1>;
112 compatible = "aspeed,ast2500-spi";
113 clocks = <&syscon ASPEED_CLK_AHB>;
117 compatible = "jedec,spi-nor";
118 spi-max-frequency = <50000000>;
123 compatible = "jedec,spi-nor";
124 spi-max-frequency = <50000000>;
129 vic: interrupt-controller@1e6c0080 {
130 compatible = "aspeed,ast2400-vic";
131 interrupt-controller;
132 #interrupt-cells = <1>;
133 valid-sources = <0xfefff7ff 0x0807ffff>;
134 reg = <0x1e6c0080 0x80>;
137 cvic: copro-interrupt-controller@1e6c2000 {
138 compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
139 valid-sources = <0xffffffff>;
140 copro-sw-interrupts = <1>;
141 reg = <0x1e6c2000 0x80>;
144 mac0: ethernet@1e660000 {
145 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
146 reg = <0x1e660000 0x180>;
148 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
152 mac1: ethernet@1e680000 {
153 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
154 reg = <0x1e680000 0x180>;
156 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
160 ehci0: usb@1e6a1000 {
161 compatible = "aspeed,ast2500-ehci", "generic-ehci";
162 reg = <0x1e6a1000 0x100>;
164 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usb2ah_default>;
170 ehci1: usb@1e6a3000 {
171 compatible = "aspeed,ast2500-ehci", "generic-ehci";
172 reg = <0x1e6a3000 0x100>;
174 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_usb2bh_default>;
181 compatible = "aspeed,ast2500-uhci", "generic-uhci";
182 reg = <0x1e6b0000 0x100>;
185 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
188 * No default pinmux, it will follow EHCI, use an explicit pinmux
189 * override if you don't enable EHCI
193 vhub: usb-vhub@1e6a0000 {
194 compatible = "aspeed,ast2500-usb-vhub";
195 reg = <0x1e6a0000 0x300>;
197 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
198 aspeed,vhub-downstream-ports = <5>;
199 aspeed,vhub-generic-endpoints = <15>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&pinctrl_usb2ad_default>;
206 compatible = "simple-bus";
207 #address-cells = <1>;
211 edac: memory-controller@1e6e0000 {
212 compatible = "aspeed,ast2500-sdram-edac";
213 reg = <0x1e6e0000 0x174>;
218 syscon: syscon@1e6e2000 {
219 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
220 reg = <0x1e6e2000 0x1a8>;
221 #address-cells = <1>;
223 ranges = <0 0x1e6e2000 0x1000>;
227 p2a: p2a-control@2c {
228 compatible = "aspeed,ast2500-p2a-ctrl";
233 pinctrl: pinctrl@80 {
234 compatible = "aspeed,ast2500-pinctrl";
235 reg = <0x80 0x18>, <0xa0 0x10>;
236 aspeed,external-nodes = <&gfx>, <&lhc>;
240 rng: hwrng@1e6e2078 {
241 compatible = "timeriomem_rng";
242 reg = <0x1e6e2078 0x4>;
247 gfx: display@1e6e6000 {
248 compatible = "aspeed,ast2500-gfx", "syscon";
249 reg = <0x1e6e6000 0x1000>;
251 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
252 resets = <&syscon ASPEED_RESET_CRT1>;
258 compatible = "aspeed,ast2500-adc";
259 reg = <0x1e6e9000 0xb0>;
260 clocks = <&syscon ASPEED_CLK_APB>;
261 resets = <&syscon ASPEED_RESET_ADC>;
262 #io-channel-cells = <1>;
266 video: video@1e700000 {
267 compatible = "aspeed,ast2500-video-engine";
268 reg = <0x1e700000 0x1000>;
269 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
270 <&syscon ASPEED_CLK_GATE_ECLK>;
271 clock-names = "vclk", "eclk";
276 sram: sram@1e720000 {
277 compatible = "mmio-sram";
278 reg = <0x1e720000 0x9000>; // 36K
281 sdmmc: sd-controller@1e740000 {
282 compatible = "aspeed,ast2500-sd-controller";
283 reg = <0x1e740000 0x100>;
284 #address-cells = <1>;
286 ranges = <0 0x1e740000 0x10000>;
287 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
291 compatible = "aspeed,ast2500-sdhci";
295 clocks = <&syscon ASPEED_CLK_SDIO>;
300 compatible = "aspeed,ast2500-sdhci";
304 clocks = <&syscon ASPEED_CLK_SDIO>;
309 gpio: gpio@1e780000 {
312 compatible = "aspeed,ast2500-gpio";
313 reg = <0x1e780000 0x200>;
315 gpio-ranges = <&pinctrl 0 0 232>;
316 clocks = <&syscon ASPEED_CLK_APB>;
317 interrupt-controller;
318 #interrupt-cells = <2>;
321 sgpio: sgpio@1e780200 {
323 compatible = "aspeed,ast2500-sgpio";
326 reg = <0x1e780200 0x0100>;
327 clocks = <&syscon ASPEED_CLK_APB>;
328 interrupt-controller;
330 bus-frequency = <12000000>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&pinctrl_sgpm_default>;
337 compatible = "aspeed,ast2500-rtc";
338 reg = <0x1e781000 0x18>;
342 timer: timer@1e782000 {
343 /* This timer is a Faraday FTTMR010 derivative */
344 compatible = "aspeed,ast2400-timer";
345 reg = <0x1e782000 0x90>;
346 interrupts = <16 17 18 35 36 37 38 39>;
347 clocks = <&syscon ASPEED_CLK_APB>;
348 clock-names = "PCLK";
351 uart1: serial@1e783000 {
352 compatible = "ns16550a";
353 reg = <0x1e783000 0x20>;
356 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
357 resets = <&lpc_reset 4>;
362 uart5: serial@1e784000 {
363 compatible = "ns16550a";
364 reg = <0x1e784000 0x20>;
367 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
372 wdt1: watchdog@1e785000 {
373 compatible = "aspeed,ast2500-wdt";
374 reg = <0x1e785000 0x20>;
375 clocks = <&syscon ASPEED_CLK_APB>;
378 wdt2: watchdog@1e785020 {
379 compatible = "aspeed,ast2500-wdt";
380 reg = <0x1e785020 0x20>;
381 clocks = <&syscon ASPEED_CLK_APB>;
384 wdt3: watchdog@1e785040 {
385 compatible = "aspeed,ast2500-wdt";
386 reg = <0x1e785040 0x20>;
387 clocks = <&syscon ASPEED_CLK_APB>;
391 pwm_tacho: pwm-tacho-controller@1e786000 {
392 compatible = "aspeed,ast2500-pwm-tacho";
393 #address-cells = <1>;
395 reg = <0x1e786000 0x1000>;
396 clocks = <&syscon ASPEED_CLK_24M>;
397 resets = <&syscon ASPEED_RESET_PWM>;
401 vuart: serial@1e787000 {
402 compatible = "aspeed,ast2500-vuart";
403 reg = <0x1e787000 0x40>;
406 clocks = <&syscon ASPEED_CLK_APB>;
408 aspeed,sirq-polarity-sense = <&syscon 0x70 25>;
413 compatible = "aspeed,ast2500-lpc", "simple-mfd";
414 reg = <0x1e789000 0x1000>;
416 #address-cells = <1>;
418 ranges = <0x0 0x1e789000 0x1000>;
421 compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
425 #address-cells = <1>;
427 ranges = <0x0 0x0 0x80>;
430 compatible = "aspeed,ast2500-kcs-bmc";
436 compatible = "aspeed,ast2500-kcs-bmc";
442 compatible = "aspeed,ast2500-kcs-bmc";
449 lpc_host: lpc-host@80 {
450 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
454 #address-cells = <1>;
456 ranges = <0x0 0x80 0x1e0>;
459 compatible = "aspeed,ast2500-kcs-bmc";
465 lpc_ctrl: lpc-ctrl@0 {
466 compatible = "aspeed,ast2500-lpc-ctrl";
468 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
472 lpc_snoop: lpc-snoop@10 {
473 compatible = "aspeed,ast2500-lpc-snoop";
479 lpc_reset: reset-controller@18 {
480 compatible = "aspeed,ast2500-lpc-reset";
486 compatible = "aspeed,ast2500-lhc";
487 reg = <0x20 0x24 0x48 0x8>;
492 compatible = "aspeed,ast2500-ibt-bmc";
500 uart2: serial@1e78d000 {
501 compatible = "ns16550a";
502 reg = <0x1e78d000 0x20>;
505 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
506 resets = <&lpc_reset 5>;
511 uart3: serial@1e78e000 {
512 compatible = "ns16550a";
513 reg = <0x1e78e000 0x20>;
516 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
517 resets = <&lpc_reset 6>;
522 uart4: serial@1e78f000 {
523 compatible = "ns16550a";
524 reg = <0x1e78f000 0x20>;
527 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
528 resets = <&lpc_reset 7>;
534 compatible = "simple-bus";
535 #address-cells = <1>;
537 ranges = <0 0x1e78a000 0x1000>;
544 i2c_ic: interrupt-controller@0 {
545 #interrupt-cells = <1>;
546 compatible = "aspeed,ast2500-i2c-ic";
549 interrupt-controller;
553 #address-cells = <1>;
555 #interrupt-cells = <1>;
558 compatible = "aspeed,ast2500-i2c-bus";
559 clocks = <&syscon ASPEED_CLK_APB>;
560 resets = <&syscon ASPEED_RESET_I2C>;
561 bus-frequency = <100000>;
563 interrupt-parent = <&i2c_ic>;
565 /* Does not need pinctrl properties */
569 #address-cells = <1>;
571 #interrupt-cells = <1>;
574 compatible = "aspeed,ast2500-i2c-bus";
575 clocks = <&syscon ASPEED_CLK_APB>;
576 resets = <&syscon ASPEED_RESET_I2C>;
577 bus-frequency = <100000>;
579 interrupt-parent = <&i2c_ic>;
581 /* Does not need pinctrl properties */
585 #address-cells = <1>;
587 #interrupt-cells = <1>;
590 compatible = "aspeed,ast2500-i2c-bus";
591 clocks = <&syscon ASPEED_CLK_APB>;
592 resets = <&syscon ASPEED_RESET_I2C>;
593 bus-frequency = <100000>;
595 interrupt-parent = <&i2c_ic>;
596 pinctrl-names = "default";
597 pinctrl-0 = <&pinctrl_i2c3_default>;
602 #address-cells = <1>;
604 #interrupt-cells = <1>;
607 compatible = "aspeed,ast2500-i2c-bus";
608 clocks = <&syscon ASPEED_CLK_APB>;
609 resets = <&syscon ASPEED_RESET_I2C>;
610 bus-frequency = <100000>;
612 interrupt-parent = <&i2c_ic>;
613 pinctrl-names = "default";
614 pinctrl-0 = <&pinctrl_i2c4_default>;
619 #address-cells = <1>;
621 #interrupt-cells = <1>;
624 compatible = "aspeed,ast2500-i2c-bus";
625 clocks = <&syscon ASPEED_CLK_APB>;
626 resets = <&syscon ASPEED_RESET_I2C>;
627 bus-frequency = <100000>;
629 interrupt-parent = <&i2c_ic>;
630 pinctrl-names = "default";
631 pinctrl-0 = <&pinctrl_i2c5_default>;
636 #address-cells = <1>;
638 #interrupt-cells = <1>;
641 compatible = "aspeed,ast2500-i2c-bus";
642 clocks = <&syscon ASPEED_CLK_APB>;
643 resets = <&syscon ASPEED_RESET_I2C>;
644 bus-frequency = <100000>;
646 interrupt-parent = <&i2c_ic>;
647 pinctrl-names = "default";
648 pinctrl-0 = <&pinctrl_i2c6_default>;
653 #address-cells = <1>;
655 #interrupt-cells = <1>;
658 compatible = "aspeed,ast2500-i2c-bus";
659 clocks = <&syscon ASPEED_CLK_APB>;
660 resets = <&syscon ASPEED_RESET_I2C>;
661 bus-frequency = <100000>;
663 interrupt-parent = <&i2c_ic>;
664 pinctrl-names = "default";
665 pinctrl-0 = <&pinctrl_i2c7_default>;
670 #address-cells = <1>;
672 #interrupt-cells = <1>;
675 compatible = "aspeed,ast2500-i2c-bus";
676 clocks = <&syscon ASPEED_CLK_APB>;
677 resets = <&syscon ASPEED_RESET_I2C>;
678 bus-frequency = <100000>;
680 interrupt-parent = <&i2c_ic>;
681 pinctrl-names = "default";
682 pinctrl-0 = <&pinctrl_i2c8_default>;
687 #address-cells = <1>;
689 #interrupt-cells = <1>;
692 compatible = "aspeed,ast2500-i2c-bus";
693 clocks = <&syscon ASPEED_CLK_APB>;
694 resets = <&syscon ASPEED_RESET_I2C>;
695 bus-frequency = <100000>;
697 interrupt-parent = <&i2c_ic>;
698 pinctrl-names = "default";
699 pinctrl-0 = <&pinctrl_i2c9_default>;
704 #address-cells = <1>;
706 #interrupt-cells = <1>;
709 compatible = "aspeed,ast2500-i2c-bus";
710 clocks = <&syscon ASPEED_CLK_APB>;
711 resets = <&syscon ASPEED_RESET_I2C>;
712 bus-frequency = <100000>;
714 interrupt-parent = <&i2c_ic>;
715 pinctrl-names = "default";
716 pinctrl-0 = <&pinctrl_i2c10_default>;
721 #address-cells = <1>;
723 #interrupt-cells = <1>;
726 compatible = "aspeed,ast2500-i2c-bus";
727 clocks = <&syscon ASPEED_CLK_APB>;
728 resets = <&syscon ASPEED_RESET_I2C>;
729 bus-frequency = <100000>;
731 interrupt-parent = <&i2c_ic>;
732 pinctrl-names = "default";
733 pinctrl-0 = <&pinctrl_i2c11_default>;
738 #address-cells = <1>;
740 #interrupt-cells = <1>;
743 compatible = "aspeed,ast2500-i2c-bus";
744 clocks = <&syscon ASPEED_CLK_APB>;
745 resets = <&syscon ASPEED_RESET_I2C>;
746 bus-frequency = <100000>;
748 interrupt-parent = <&i2c_ic>;
749 pinctrl-names = "default";
750 pinctrl-0 = <&pinctrl_i2c12_default>;
755 #address-cells = <1>;
757 #interrupt-cells = <1>;
760 compatible = "aspeed,ast2500-i2c-bus";
761 clocks = <&syscon ASPEED_CLK_APB>;
762 resets = <&syscon ASPEED_RESET_I2C>;
763 bus-frequency = <100000>;
765 interrupt-parent = <&i2c_ic>;
766 pinctrl-names = "default";
767 pinctrl-0 = <&pinctrl_i2c13_default>;
772 #address-cells = <1>;
774 #interrupt-cells = <1>;
777 compatible = "aspeed,ast2500-i2c-bus";
778 clocks = <&syscon ASPEED_CLK_APB>;
779 resets = <&syscon ASPEED_RESET_I2C>;
780 bus-frequency = <100000>;
782 interrupt-parent = <&i2c_ic>;
783 pinctrl-names = "default";
784 pinctrl-0 = <&pinctrl_i2c14_default>;
790 pinctrl_acpi_default: acpi_default {
795 pinctrl_adc0_default: adc0_default {
800 pinctrl_adc1_default: adc1_default {
805 pinctrl_adc10_default: adc10_default {
810 pinctrl_adc11_default: adc11_default {
815 pinctrl_adc12_default: adc12_default {
820 pinctrl_adc13_default: adc13_default {
825 pinctrl_adc14_default: adc14_default {
830 pinctrl_adc15_default: adc15_default {
835 pinctrl_adc2_default: adc2_default {
840 pinctrl_adc3_default: adc3_default {
845 pinctrl_adc4_default: adc4_default {
850 pinctrl_adc5_default: adc5_default {
855 pinctrl_adc6_default: adc6_default {
860 pinctrl_adc7_default: adc7_default {
865 pinctrl_adc8_default: adc8_default {
870 pinctrl_adc9_default: adc9_default {
875 pinctrl_bmcint_default: bmcint_default {
880 pinctrl_ddcclk_default: ddcclk_default {
885 pinctrl_ddcdat_default: ddcdat_default {
890 pinctrl_espi_default: espi_default {
895 pinctrl_fwspics1_default: fwspics1_default {
896 function = "FWSPICS1";
900 pinctrl_fwspics2_default: fwspics2_default {
901 function = "FWSPICS2";
905 pinctrl_gpid0_default: gpid0_default {
910 pinctrl_gpid2_default: gpid2_default {
915 pinctrl_gpid4_default: gpid4_default {
920 pinctrl_gpid6_default: gpid6_default {
925 pinctrl_gpie0_default: gpie0_default {
930 pinctrl_gpie2_default: gpie2_default {
935 pinctrl_gpie4_default: gpie4_default {
940 pinctrl_gpie6_default: gpie6_default {
945 pinctrl_i2c10_default: i2c10_default {
950 pinctrl_i2c11_default: i2c11_default {
955 pinctrl_i2c12_default: i2c12_default {
960 pinctrl_i2c13_default: i2c13_default {
965 pinctrl_i2c14_default: i2c14_default {
970 pinctrl_i2c3_default: i2c3_default {
975 pinctrl_i2c4_default: i2c4_default {
980 pinctrl_i2c5_default: i2c5_default {
985 pinctrl_i2c6_default: i2c6_default {
990 pinctrl_i2c7_default: i2c7_default {
995 pinctrl_i2c8_default: i2c8_default {
1000 pinctrl_i2c9_default: i2c9_default {
1005 pinctrl_lad0_default: lad0_default {
1010 pinctrl_lad1_default: lad1_default {
1015 pinctrl_lad2_default: lad2_default {
1020 pinctrl_lad3_default: lad3_default {
1025 pinctrl_lclk_default: lclk_default {
1030 pinctrl_lframe_default: lframe_default {
1031 function = "LFRAME";
1035 pinctrl_lpchc_default: lpchc_default {
1040 pinctrl_lpcpd_default: lpcpd_default {
1045 pinctrl_lpcplus_default: lpcplus_default {
1046 function = "LPCPLUS";
1050 pinctrl_lpcpme_default: lpcpme_default {
1051 function = "LPCPME";
1055 pinctrl_lpcrst_default: lpcrst_default {
1056 function = "LPCRST";
1060 pinctrl_lpcsmi_default: lpcsmi_default {
1061 function = "LPCSMI";
1065 pinctrl_lsirq_default: lsirq_default {
1070 pinctrl_mac1link_default: mac1link_default {
1071 function = "MAC1LINK";
1072 groups = "MAC1LINK";
1075 pinctrl_mac2link_default: mac2link_default {
1076 function = "MAC2LINK";
1077 groups = "MAC2LINK";
1080 pinctrl_mdio1_default: mdio1_default {
1085 pinctrl_mdio2_default: mdio2_default {
1090 pinctrl_ncts1_default: ncts1_default {
1095 pinctrl_ncts2_default: ncts2_default {
1100 pinctrl_ncts3_default: ncts3_default {
1105 pinctrl_ncts4_default: ncts4_default {
1110 pinctrl_ndcd1_default: ndcd1_default {
1115 pinctrl_ndcd2_default: ndcd2_default {
1120 pinctrl_ndcd3_default: ndcd3_default {
1125 pinctrl_ndcd4_default: ndcd4_default {
1130 pinctrl_ndsr1_default: ndsr1_default {
1135 pinctrl_ndsr2_default: ndsr2_default {
1140 pinctrl_ndsr3_default: ndsr3_default {
1145 pinctrl_ndsr4_default: ndsr4_default {
1150 pinctrl_ndtr1_default: ndtr1_default {
1155 pinctrl_ndtr2_default: ndtr2_default {
1160 pinctrl_ndtr3_default: ndtr3_default {
1165 pinctrl_ndtr4_default: ndtr4_default {
1170 pinctrl_nri1_default: nri1_default {
1175 pinctrl_nri2_default: nri2_default {
1180 pinctrl_nri3_default: nri3_default {
1185 pinctrl_nri4_default: nri4_default {
1190 pinctrl_nrts1_default: nrts1_default {
1195 pinctrl_nrts2_default: nrts2_default {
1200 pinctrl_nrts3_default: nrts3_default {
1205 pinctrl_nrts4_default: nrts4_default {
1210 pinctrl_oscclk_default: oscclk_default {
1211 function = "OSCCLK";
1215 pinctrl_pewake_default: pewake_default {
1216 function = "PEWAKE";
1220 pinctrl_pnor_default: pnor_default {
1225 pinctrl_pwm0_default: pwm0_default {
1230 pinctrl_pwm1_default: pwm1_default {
1235 pinctrl_pwm2_default: pwm2_default {
1240 pinctrl_pwm3_default: pwm3_default {
1245 pinctrl_pwm4_default: pwm4_default {
1250 pinctrl_pwm5_default: pwm5_default {
1255 pinctrl_pwm6_default: pwm6_default {
1260 pinctrl_pwm7_default: pwm7_default {
1265 pinctrl_rgmii1_default: rgmii1_default {
1266 function = "RGMII1";
1270 pinctrl_rgmii2_default: rgmii2_default {
1271 function = "RGMII2";
1275 pinctrl_rmii1_default: rmii1_default {
1280 pinctrl_rmii2_default: rmii2_default {
1285 pinctrl_rxd1_default: rxd1_default {
1290 pinctrl_rxd2_default: rxd2_default {
1295 pinctrl_rxd3_default: rxd3_default {
1300 pinctrl_rxd4_default: rxd4_default {
1305 pinctrl_salt1_default: salt1_default {
1310 pinctrl_salt10_default: salt10_default {
1311 function = "SALT10";
1315 pinctrl_salt11_default: salt11_default {
1316 function = "SALT11";
1320 pinctrl_salt12_default: salt12_default {
1321 function = "SALT12";
1325 pinctrl_salt13_default: salt13_default {
1326 function = "SALT13";
1330 pinctrl_salt14_default: salt14_default {
1331 function = "SALT14";
1335 pinctrl_salt2_default: salt2_default {
1340 pinctrl_salt3_default: salt3_default {
1345 pinctrl_salt4_default: salt4_default {
1350 pinctrl_salt5_default: salt5_default {
1355 pinctrl_salt6_default: salt6_default {
1360 pinctrl_salt7_default: salt7_default {
1365 pinctrl_salt8_default: salt8_default {
1370 pinctrl_salt9_default: salt9_default {
1375 pinctrl_scl1_default: scl1_default {
1380 pinctrl_scl2_default: scl2_default {
1385 pinctrl_sd1_default: sd1_default {
1390 pinctrl_sd2_default: sd2_default {
1395 pinctrl_sda1_default: sda1_default {
1400 pinctrl_sda2_default: sda2_default {
1405 pinctrl_sgpm_default: sgpm_default {
1410 pinctrl_sgps1_default: sgps1_default {
1415 pinctrl_sgps2_default: sgps2_default {
1420 pinctrl_sioonctrl_default: sioonctrl_default {
1421 function = "SIOONCTRL";
1422 groups = "SIOONCTRL";
1425 pinctrl_siopbi_default: siopbi_default {
1426 function = "SIOPBI";
1430 pinctrl_siopbo_default: siopbo_default {
1431 function = "SIOPBO";
1435 pinctrl_siopwreq_default: siopwreq_default {
1436 function = "SIOPWREQ";
1437 groups = "SIOPWREQ";
1440 pinctrl_siopwrgd_default: siopwrgd_default {
1441 function = "SIOPWRGD";
1442 groups = "SIOPWRGD";
1445 pinctrl_sios3_default: sios3_default {
1450 pinctrl_sios5_default: sios5_default {
1455 pinctrl_siosci_default: siosci_default {
1456 function = "SIOSCI";
1460 pinctrl_spi1_default: spi1_default {
1465 pinctrl_spi1cs1_default: spi1cs1_default {
1466 function = "SPI1CS1";
1470 pinctrl_spi1debug_default: spi1debug_default {
1471 function = "SPI1DEBUG";
1472 groups = "SPI1DEBUG";
1475 pinctrl_spi1passthru_default: spi1passthru_default {
1476 function = "SPI1PASSTHRU";
1477 groups = "SPI1PASSTHRU";
1480 pinctrl_spi2ck_default: spi2ck_default {
1481 function = "SPI2CK";
1485 pinctrl_spi2cs0_default: spi2cs0_default {
1486 function = "SPI2CS0";
1490 pinctrl_spi2cs1_default: spi2cs1_default {
1491 function = "SPI2CS1";
1495 pinctrl_spi2miso_default: spi2miso_default {
1496 function = "SPI2MISO";
1497 groups = "SPI2MISO";
1500 pinctrl_spi2mosi_default: spi2mosi_default {
1501 function = "SPI2MOSI";
1502 groups = "SPI2MOSI";
1505 pinctrl_timer3_default: timer3_default {
1506 function = "TIMER3";
1510 pinctrl_timer4_default: timer4_default {
1511 function = "TIMER4";
1515 pinctrl_timer5_default: timer5_default {
1516 function = "TIMER5";
1520 pinctrl_timer6_default: timer6_default {
1521 function = "TIMER6";
1525 pinctrl_timer7_default: timer7_default {
1526 function = "TIMER7";
1530 pinctrl_timer8_default: timer8_default {
1531 function = "TIMER8";
1535 pinctrl_txd1_default: txd1_default {
1540 pinctrl_txd2_default: txd2_default {
1545 pinctrl_txd3_default: txd3_default {
1550 pinctrl_txd4_default: txd4_default {
1555 pinctrl_uart6_default: uart6_default {
1560 pinctrl_usbcki_default: usbcki_default {
1561 function = "USBCKI";
1565 pinctrl_usb2ah_default: usb2ah_default {
1566 function = "USB2AH";
1570 pinctrl_usb2ad_default: usb2ad_default {
1571 function = "USB2AD";
1575 pinctrl_usb11bhid_default: usb11bhid_default {
1576 function = "USB11BHID";
1577 groups = "USB11BHID";
1580 pinctrl_usb2bh_default: usb2bh_default {
1581 function = "USB2BH";
1585 pinctrl_vgabiosrom_default: vgabiosrom_default {
1586 function = "VGABIOSROM";
1587 groups = "VGABIOSROM";
1590 pinctrl_vgahs_default: vgahs_default {
1595 pinctrl_vgavs_default: vgavs_default {
1600 pinctrl_vpi24_default: vpi24_default {
1605 pinctrl_vpo_default: vpo_default {
1610 pinctrl_wdtrst1_default: wdtrst1_default {
1611 function = "WDTRST1";
1615 pinctrl_wdtrst2_default: wdtrst2_default {
1616 function = "WDTRST2";