1 // SPDX-License-Identifier: GPL-2.0
2 #include "skeleton.dtsi"
6 compatible = "aspeed,ast2500";
9 interrupt-parent = <&vic>;
16 compatible = "arm,arm1176jzf-s";
23 compatible = "simple-bus";
28 fmc: flash-controller@1e620000 {
29 reg = < 0x1e620000 0xc4
30 0x20000000 0x10000000 >;
33 compatible = "aspeed,ast2500-fmc";
38 compatible = "jedec,spi-nor";
43 compatible = "jedec,spi-nor";
48 compatible = "jedec,spi-nor";
53 spi1: flash-controller@1e630000 {
54 reg = < 0x1e630000 0xc4
55 0x30000000 0x08000000 >;
58 compatible = "aspeed,ast2500-spi";
62 compatible = "jedec,spi-nor";
67 compatible = "jedec,spi-nor";
72 spi2: flash-controller@1e631000 {
73 reg = < 0x1e631000 0xc4
74 0x38000000 0x08000000 >;
77 compatible = "aspeed,ast2500-spi";
81 compatible = "jedec,spi-nor";
86 compatible = "jedec,spi-nor";
91 vic: interrupt-controller@1e6c0080 {
92 compatible = "aspeed,ast2400-vic";
94 #interrupt-cells = <1>;
95 valid-sources = <0xfefff7ff 0x0807ffff>;
96 reg = <0x1e6c0080 0x80>;
99 mac0: ethernet@1e660000 {
100 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
101 reg = <0x1e660000 0x180>;
106 mac1: ethernet@1e680000 {
107 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
108 reg = <0x1e680000 0x180>;
114 compatible = "simple-bus";
115 #address-cells = <1>;
119 syscon: syscon@1e6e2000 {
120 compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
121 reg = <0x1e6e2000 0x1a8>;
122 #address-cells = <1>;
125 clk_clkin: clk_clkin@70 {
127 compatible = "aspeed,g5-clkin-clock", "fixed-clock";
129 clock-frequency = <24000000>;
132 clk_hpll: clk_hpll@24 {
134 compatible = "aspeed,g5-hpll-clock", "fixed-clock";
136 clocks = <&clk_clkin>;
137 clock-frequency = <792000000>;
140 clk_ahb: clk_ahb@70 {
142 compatible = "aspeed,g5-ahb-clock", "fixed-clock";
144 clocks = <&clk_hpll>;
145 clock-frequency = <198000000>;
148 clk_apb: clk_apb@08 {
150 compatible = "aspeed,g5-apb-clock", "fixed-clock";
152 clocks = <&clk_hpll>;
153 clock-frequency = <24750000>;
156 clk_uart: clk_uart@2c {
158 compatible = "aspeed,uart-clock", "fixed-clock";
160 clock-frequency = <24000000>;
164 compatible = "aspeed,g5-pinctrl";
165 aspeed,external-nodes = <&gfx &lhc>;
167 pinctrl_acpi_default: acpi_default {
172 pinctrl_adc0_default: adc0_default {
177 pinctrl_adc1_default: adc1_default {
182 pinctrl_adc10_default: adc10_default {
187 pinctrl_adc11_default: adc11_default {
192 pinctrl_adc12_default: adc12_default {
197 pinctrl_adc13_default: adc13_default {
202 pinctrl_adc14_default: adc14_default {
207 pinctrl_adc15_default: adc15_default {
212 pinctrl_adc2_default: adc2_default {
217 pinctrl_adc3_default: adc3_default {
222 pinctrl_adc4_default: adc4_default {
227 pinctrl_adc5_default: adc5_default {
232 pinctrl_adc6_default: adc6_default {
237 pinctrl_adc7_default: adc7_default {
242 pinctrl_adc8_default: adc8_default {
247 pinctrl_adc9_default: adc9_default {
252 pinctrl_bmcint_default: bmcint_default {
257 pinctrl_ddcclk_default: ddcclk_default {
262 pinctrl_ddcdat_default: ddcdat_default {
267 pinctrl_espi_default: espi_default {
272 pinctrl_fwspics1_default: fwspics1_default {
273 function = "FWSPICS1";
277 pinctrl_fwspics2_default: fwspics2_default {
278 function = "FWSPICS2";
282 pinctrl_gpid0_default: gpid0_default {
287 pinctrl_gpid2_default: gpid2_default {
292 pinctrl_gpid4_default: gpid4_default {
297 pinctrl_gpid6_default: gpid6_default {
302 pinctrl_gpie0_default: gpie0_default {
307 pinctrl_gpie2_default: gpie2_default {
312 pinctrl_gpie4_default: gpie4_default {
317 pinctrl_gpie6_default: gpie6_default {
322 pinctrl_i2c10_default: i2c10_default {
327 pinctrl_i2c11_default: i2c11_default {
332 pinctrl_i2c12_default: i2c12_default {
337 pinctrl_i2c13_default: i2c13_default {
342 pinctrl_i2c14_default: i2c14_default {
347 pinctrl_i2c3_default: i2c3_default {
352 pinctrl_i2c4_default: i2c4_default {
357 pinctrl_i2c5_default: i2c5_default {
362 pinctrl_i2c6_default: i2c6_default {
367 pinctrl_i2c7_default: i2c7_default {
372 pinctrl_i2c8_default: i2c8_default {
377 pinctrl_i2c9_default: i2c9_default {
382 pinctrl_lad0_default: lad0_default {
386 pinctrl_lad1_default: lad1_default {
391 pinctrl_lad2_default: lad2_default {
396 pinctrl_lad3_default: lad3_default {
401 pinctrl_lclk_default: lclk_default {
406 pinctrl_lframe_default: lframe_default {
411 pinctrl_lpchc_default: lpchc_default {
416 pinctrl_lpcpd_default: lpcpd_default {
421 pinctrl_lpcplus_default: lpcplus_default {
422 function = "LPCPLUS";
426 pinctrl_lpcpme_default: lpcpme_default {
431 pinctrl_lpcrst_default: lpcrst_default {
436 pinctrl_lpcsmi_default: lpcsmi_default {
441 pinctrl_lsirq_default: lsirq_default {
446 pinctrl_mac1link_default: mac1link_default {
447 function = "MAC1LINK";
451 pinctrl_mac2link_default: mac2link_default {
452 function = "MAC2LINK";
456 pinctrl_mdio1_default: mdio1_default {
461 pinctrl_mdio2_default: mdio2_default {
466 pinctrl_ncts1_default: ncts1_default {
471 pinctrl_ncts2_default: ncts2_default {
476 pinctrl_ncts3_default: ncts3_default {
481 pinctrl_ncts4_default: ncts4_default {
486 pinctrl_ndcd1_default: ndcd1_default {
491 pinctrl_ndcd2_default: ndcd2_default {
496 pinctrl_ndcd3_default: ndcd3_default {
501 pinctrl_ndcd4_default: ndcd4_default {
506 pinctrl_ndsr1_default: ndsr1_default {
511 pinctrl_ndsr2_default: ndsr2_default {
516 pinctrl_ndsr3_default: ndsr3_default {
521 pinctrl_ndsr4_default: ndsr4_default {
526 pinctrl_ndtr1_default: ndtr1_default {
531 pinctrl_ndtr2_default: ndtr2_default {
536 pinctrl_ndtr3_default: ndtr3_default {
541 pinctrl_ndtr4_default: ndtr4_default {
546 pinctrl_nri1_default: nri1_default {
551 pinctrl_nri2_default: nri2_default {
556 pinctrl_nri3_default: nri3_default {
561 pinctrl_nri4_default: nri4_default {
566 pinctrl_nrts1_default: nrts1_default {
571 pinctrl_nrts2_default: nrts2_default {
576 pinctrl_nrts3_default: nrts3_default {
581 pinctrl_nrts4_default: nrts4_default {
586 pinctrl_oscclk_default: oscclk_default {
591 pinctrl_pewake_default: pewake_default {
596 pinctrl_pnor_default: pnor_default {
601 pinctrl_pwm0_default: pwm0_default {
606 pinctrl_pwm1_default: pwm1_default {
611 pinctrl_pwm2_default: pwm2_default {
616 pinctrl_pwm3_default: pwm3_default {
621 pinctrl_pwm4_default: pwm4_default {
626 pinctrl_pwm5_default: pwm5_default {
631 pinctrl_pwm6_default: pwm6_default {
636 pinctrl_pwm7_default: pwm7_default {
641 pinctrl_rgmii1_default: rgmii1_default {
646 pinctrl_rgmii2_default: rgmii2_default {
651 pinctrl_rmii1_default: rmii1_default {
656 pinctrl_rmii2_default: rmii2_default {
661 pinctrl_rxd1_default: rxd1_default {
666 pinctrl_rxd2_default: rxd2_default {
671 pinctrl_rxd3_default: rxd3_default {
676 pinctrl_rxd4_default: rxd4_default {
681 pinctrl_salt1_default: salt1_default {
686 pinctrl_salt10_default: salt10_default {
691 pinctrl_salt11_default: salt11_default {
696 pinctrl_salt12_default: salt12_default {
701 pinctrl_salt13_default: salt13_default {
706 pinctrl_salt14_default: salt14_default {
711 pinctrl_salt2_default: salt2_default {
716 pinctrl_salt3_default: salt3_default {
721 pinctrl_salt4_default: salt4_default {
726 pinctrl_salt5_default: salt5_default {
731 pinctrl_salt6_default: salt6_default {
736 pinctrl_salt7_default: salt7_default {
741 pinctrl_salt8_default: salt8_default {
746 pinctrl_salt9_default: salt9_default {
751 pinctrl_scl1_default: scl1_default {
756 pinctrl_scl2_default: scl2_default {
761 pinctrl_sd1_default: sd1_default {
766 pinctrl_sd2_default: sd2_default {
771 pinctrl_sda1_default: sda1_default {
776 pinctrl_sda2_default: sda2_default {
781 pinctrl_sgps1_default: sgps1_default {
786 pinctrl_sgps2_default: sgps2_default {
791 pinctrl_sioonctrl_default: sioonctrl_default {
792 function = "SIOONCTRL";
793 groups = "SIOONCTRL";
796 pinctrl_siopbi_default: siopbi_default {
801 pinctrl_siopbo_default: siopbo_default {
806 pinctrl_siopwreq_default: siopwreq_default {
807 function = "SIOPWREQ";
811 pinctrl_siopwrgd_default: siopwrgd_default {
812 function = "SIOPWRGD";
816 pinctrl_sios3_default: sios3_default {
821 pinctrl_sios5_default: sios5_default {
826 pinctrl_siosci_default: siosci_default {
831 pinctrl_spi1_default: spi1_default {
836 pinctrl_spi1cs1_default: spi1cs1_default {
837 function = "SPI1CS1";
841 pinctrl_spi1debug_default: spi1debug_default {
842 function = "SPI1DEBUG";
843 groups = "SPI1DEBUG";
846 pinctrl_spi1passthru_default: spi1passthru_default {
847 function = "SPI1PASSTHRU";
848 groups = "SPI1PASSTHRU";
851 pinctrl_spi2ck_default: spi2ck_default {
856 pinctrl_spi2cs0_default: spi2cs0_default {
857 function = "SPI2CS0";
861 pinctrl_spi2cs1_default: spi2cs1_default {
862 function = "SPI2CS1";
866 pinctrl_spi2miso_default: spi2miso_default {
867 function = "SPI2MISO";
871 pinctrl_spi2mosi_default: spi2mosi_default {
872 function = "SPI2MOSI";
876 pinctrl_timer3_default: timer3_default {
881 pinctrl_timer4_default: timer4_default {
886 pinctrl_timer5_default: timer5_default {
891 pinctrl_timer6_default: timer6_default {
896 pinctrl_timer7_default: timer7_default {
901 pinctrl_timer8_default: timer8_default {
906 pinctrl_txd1_default: txd1_default {
911 pinctrl_txd2_default: txd2_default {
916 pinctrl_txd3_default: txd3_default {
921 pinctrl_txd4_default: txd4_default {
926 pinctrl_uart6_default: uart6_default {
931 pinctrl_usbcki_default: usbcki_default {
936 pinctrl_vgabiosrom_default: vgabiosrom_default {
937 function = "VGABIOSROM";
938 groups = "VGABIOSROM";
941 pinctrl_vgahs_default: vgahs_default {
946 pinctrl_vgavs_default: vgavs_default {
951 pinctrl_vpi24_default: vpi24_default {
956 pinctrl_vpo_default: vpo_default {
961 pinctrl_wdtrst1_default: wdtrst1_default {
962 function = "WDTRST1";
966 pinctrl_wdtrst2_default: wdtrst2_default {
967 function = "WDTRST2";
975 gfx: display@1e6e6000 {
976 compatible = "aspeed,ast2500-gfx", "syscon";
977 reg = <0x1e6e6000 0x1000>;
982 compatible = "mmio-sram";
983 reg = <0x1e720000 0x9000>; // 36K
986 gpio: gpio@1e780000 {
989 compatible = "aspeed,ast2500-gpio";
990 reg = <0x1e780000 0x1000>;
992 gpio-ranges = <&pinctrl 0 0 220>;
993 interrupt-controller;
996 timer: timer@1e782000 {
997 /* This timer is a Faraday FTTMR010 derivative */
998 compatible = "aspeed,ast2400-timer";
999 reg = <0x1e782000 0x90>;
1000 interrupts = <16 17 18 35 36 37 38 39>;
1001 clocks = <&clk_apb>;
1002 clock-names = "PCLK";
1006 wdt1: wdt@1e785000 {
1007 compatible = "aspeed,ast2500-wdt";
1008 reg = <0x1e785000 0x20>;
1012 wdt2: wdt@1e785020 {
1013 compatible = "aspeed,ast2500-wdt";
1014 reg = <0x1e785020 0x20>;
1016 status = "disabled";
1019 wdt3: wdt@1e785040 {
1020 compatible = "aspeed,ast2500-wdt";
1021 reg = <0x1e785040 0x20>;
1022 status = "disabled";
1025 uart1: serial@1e783000 {
1026 compatible = "ns16550a";
1027 reg = <0x1e783000 0x1000>;
1030 clocks = <&clk_uart>;
1032 status = "disabled";
1036 compatible = "aspeed,ast2500-lpc", "simple-mfd";
1037 reg = <0x1e789000 0x1000>;
1039 #address-cells = <1>;
1041 ranges = <0 0x1e789000 0x1000>;
1043 lpc_bmc: lpc-bmc@0 {
1044 compatible = "aspeed,ast2500-lpc-bmc";
1048 lpc_host: lpc-host@80 {
1049 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
1052 #address-cells = <1>;
1054 ranges = <0 0x80 0x1e0>;
1059 compatible = "aspeed,ast2500-lhc";
1060 reg = <0x20 0x24 0x48 0x8>;
1065 uart2: serial@1e78d000 {
1066 compatible = "ns16550a";
1067 reg = <0x1e78d000 0x1000>;
1070 clocks = <&clk_uart>;
1072 status = "disabled";
1075 uart3: serial@1e78e000 {
1076 compatible = "ns16550a";
1077 reg = <0x1e78e000 0x1000>;
1080 clocks = <&clk_uart>;
1082 status = "disabled";
1085 uart4: serial@1e78f000 {
1086 compatible = "ns16550a";
1087 reg = <0x1e78f000 0x1000>;
1090 clocks = <&clk_uart>;
1092 status = "disabled";
1095 uart5: serial@1e784000 {
1096 compatible = "ns16550a";
1097 reg = <0x1e784000 0x1000>;
1100 clocks = <&clk_uart>;
1101 current-speed = <38400>;
1103 status = "disabled";
1106 uart6: serial@1e787000 {
1107 compatible = "ns16550a";
1108 reg = <0x1e787000 0x1000>;
1111 clocks = <&clk_uart>;
1113 status = "disabled";
1117 compatible = "aspeed,ast2500-adc";
1118 reg = <0x1e6e9000 0xb0>;
1119 clocks = <&clk_apb>;
1120 #io-channel-cells = <1>;
1121 status = "disabled";