1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
7 compatible = "aspeed,ast2500";
10 interrupt-parent = <&vic>;
40 compatible = "arm,arm1176jzf-s";
47 device_type = "memory";
52 compatible = "simple-bus";
58 reg = < 0x1e620000 0xc4
59 0x20000000 0x10000000 >;
62 compatible = "aspeed,ast2500-fmc";
63 clocks = <&syscon ASPEED_CLK_AHB>;
68 compatible = "jedec,spi-nor";
69 spi-max-frequency = <50000000>;
74 compatible = "jedec,spi-nor";
75 spi-max-frequency = <50000000>;
80 compatible = "jedec,spi-nor";
81 spi-max-frequency = <50000000>;
87 reg = < 0x1e630000 0xc4
88 0x30000000 0x08000000 >;
91 compatible = "aspeed,ast2500-spi";
92 clocks = <&syscon ASPEED_CLK_AHB>;
96 compatible = "jedec,spi-nor";
97 spi-max-frequency = <50000000>;
102 compatible = "jedec,spi-nor";
103 spi-max-frequency = <50000000>;
109 reg = < 0x1e631000 0xc4
110 0x38000000 0x08000000 >;
111 #address-cells = <1>;
113 compatible = "aspeed,ast2500-spi";
114 clocks = <&syscon ASPEED_CLK_AHB>;
118 compatible = "jedec,spi-nor";
119 spi-max-frequency = <50000000>;
124 compatible = "jedec,spi-nor";
125 spi-max-frequency = <50000000>;
130 vic: interrupt-controller@1e6c0080 {
131 compatible = "aspeed,ast2400-vic";
132 interrupt-controller;
133 #interrupt-cells = <1>;
134 valid-sources = <0xfefff7ff 0x0807ffff>;
135 reg = <0x1e6c0080 0x80>;
138 cvic: copro-interrupt-controller@1e6c2000 {
139 compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
140 valid-sources = <0xffffffff>;
141 copro-sw-interrupts = <1>;
142 reg = <0x1e6c2000 0x80>;
145 mac0: ethernet@1e660000 {
146 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
147 reg = <0x1e660000 0x180>;
149 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
153 mac1: ethernet@1e680000 {
154 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
155 reg = <0x1e680000 0x180>;
157 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
161 ehci0: usb@1e6a1000 {
162 compatible = "aspeed,ast2500-ehci", "generic-ehci";
163 reg = <0x1e6a1000 0x100>;
165 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_usb2ah_default>;
171 ehci1: usb@1e6a3000 {
172 compatible = "aspeed,ast2500-ehci", "generic-ehci";
173 reg = <0x1e6a3000 0x100>;
175 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_usb2bh_default>;
182 compatible = "aspeed,ast2500-uhci", "generic-uhci";
183 reg = <0x1e6b0000 0x100>;
186 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
189 * No default pinmux, it will follow EHCI, use an explicit pinmux
190 * override if you don't enable EHCI
194 vhub: usb-vhub@1e6a0000 {
195 compatible = "aspeed,ast2500-usb-vhub";
196 reg = <0x1e6a0000 0x300>;
198 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
199 aspeed,vhub-downstream-ports = <5>;
200 aspeed,vhub-generic-endpoints = <15>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&pinctrl_usb2ad_default>;
207 compatible = "simple-bus";
208 #address-cells = <1>;
212 edac: memory-controller@1e6e0000 {
213 compatible = "aspeed,ast2500-sdram-edac";
214 reg = <0x1e6e0000 0x174>;
219 syscon: syscon@1e6e2000 {
220 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
221 reg = <0x1e6e2000 0x1a8>;
222 #address-cells = <1>;
224 ranges = <0 0x1e6e2000 0x1000>;
228 scu_ic: interrupt-controller@18 {
229 #interrupt-cells = <1>;
230 compatible = "aspeed,ast2500-scu-ic";
233 interrupt-controller;
236 p2a: p2a-control@2c {
237 compatible = "aspeed,ast2500-p2a-ctrl";
243 compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
244 reg = <0x7c 0x4 0x150 0x8>;
247 pinctrl: pinctrl@80 {
248 compatible = "aspeed,ast2500-pinctrl";
249 reg = <0x80 0x18>, <0xa0 0x10>;
250 aspeed,external-nodes = <&gfx>, <&lhc>;
254 rng: hwrng@1e6e2078 {
255 compatible = "timeriomem_rng";
256 reg = <0x1e6e2078 0x4>;
261 gfx: display@1e6e6000 {
262 compatible = "aspeed,ast2500-gfx", "syscon";
263 reg = <0x1e6e6000 0x1000>;
265 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
266 resets = <&syscon ASPEED_RESET_CRT1>;
271 xdma: xdma@1e6e7000 {
272 compatible = "aspeed,ast2500-xdma";
273 reg = <0x1e6e7000 0x100>;
274 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
275 resets = <&syscon ASPEED_RESET_XDMA>;
276 interrupts-extended = <&vic 6>, <&scu_ic ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI>;
277 aspeed,pcie-device = "bmc";
278 aspeed,scu = <&syscon>;
283 compatible = "aspeed,ast2500-adc";
284 reg = <0x1e6e9000 0xb0>;
285 clocks = <&syscon ASPEED_CLK_APB>;
286 resets = <&syscon ASPEED_RESET_ADC>;
287 #io-channel-cells = <1>;
291 video: video@1e700000 {
292 compatible = "aspeed,ast2500-video-engine";
293 reg = <0x1e700000 0x1000>;
294 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
295 <&syscon ASPEED_CLK_GATE_ECLK>;
296 clock-names = "vclk", "eclk";
301 sram: sram@1e720000 {
302 compatible = "mmio-sram";
303 reg = <0x1e720000 0x9000>; // 36K
306 sdmmc: sd-controller@1e740000 {
307 compatible = "aspeed,ast2500-sd-controller";
308 reg = <0x1e740000 0x100>;
309 #address-cells = <1>;
311 ranges = <0 0x1e740000 0x10000>;
312 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
316 compatible = "aspeed,ast2500-sdhci";
320 clocks = <&syscon ASPEED_CLK_SDIO>;
325 compatible = "aspeed,ast2500-sdhci";
329 clocks = <&syscon ASPEED_CLK_SDIO>;
334 gpio: gpio@1e780000 {
337 compatible = "aspeed,ast2500-gpio";
338 reg = <0x1e780000 0x200>;
340 gpio-ranges = <&pinctrl 0 0 232>;
341 clocks = <&syscon ASPEED_CLK_APB>;
342 interrupt-controller;
343 #interrupt-cells = <2>;
346 sgpio: sgpio@1e780200 {
348 compatible = "aspeed,ast2500-sgpio";
351 reg = <0x1e780200 0x0100>;
352 clocks = <&syscon ASPEED_CLK_APB>;
353 interrupt-controller;
355 bus-frequency = <12000000>;
356 pinctrl-names = "default";
357 pinctrl-0 = <&pinctrl_sgpm_default>;
362 compatible = "aspeed,ast2500-rtc";
363 reg = <0x1e781000 0x18>;
367 timer: timer@1e782000 {
368 /* This timer is a Faraday FTTMR010 derivative */
369 compatible = "aspeed,ast2400-timer";
370 reg = <0x1e782000 0x90>;
371 interrupts = <16 17 18 35 36 37 38 39>;
372 clocks = <&syscon ASPEED_CLK_APB>;
373 clock-names = "PCLK";
376 uart1: serial@1e783000 {
377 compatible = "ns16550a";
378 reg = <0x1e783000 0x20>;
381 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
382 resets = <&lpc_reset 4>;
387 uart5: serial@1e784000 {
388 compatible = "ns16550a";
389 reg = <0x1e784000 0x20>;
392 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
397 wdt1: watchdog@1e785000 {
398 compatible = "aspeed,ast2500-wdt";
399 reg = <0x1e785000 0x20>;
400 clocks = <&syscon ASPEED_CLK_APB>;
403 wdt2: watchdog@1e785020 {
404 compatible = "aspeed,ast2500-wdt";
405 reg = <0x1e785020 0x20>;
406 clocks = <&syscon ASPEED_CLK_APB>;
409 wdt3: watchdog@1e785040 {
410 compatible = "aspeed,ast2500-wdt";
411 reg = <0x1e785040 0x20>;
412 clocks = <&syscon ASPEED_CLK_APB>;
416 pwm_tacho: pwm-tacho-controller@1e786000 {
417 compatible = "aspeed,ast2500-pwm-tacho";
418 #address-cells = <1>;
420 reg = <0x1e786000 0x1000>;
421 clocks = <&syscon ASPEED_CLK_24M>;
422 resets = <&syscon ASPEED_RESET_PWM>;
426 vuart: serial@1e787000 {
427 compatible = "aspeed,ast2500-vuart";
428 reg = <0x1e787000 0x40>;
431 clocks = <&syscon ASPEED_CLK_APB>;
437 compatible = "aspeed,ast2500-lpc", "simple-mfd";
438 reg = <0x1e789000 0x1000>;
440 #address-cells = <1>;
442 ranges = <0x0 0x1e789000 0x1000>;
445 compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
449 #address-cells = <1>;
451 ranges = <0x0 0x0 0x80>;
454 compatible = "aspeed,ast2500-kcs-bmc-v2";
455 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
460 compatible = "aspeed,ast2500-kcs-bmc-v2";
461 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
466 compatible = "aspeed,ast2500-kcs-bmc-v2";
467 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
473 lpc_host: lpc-host@80 {
474 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
478 #address-cells = <1>;
480 ranges = <0x0 0x80 0x1e0>;
483 compatible = "aspeed,ast2500-kcs-bmc-v2";
484 reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
489 lpc_ctrl: lpc-ctrl@0 {
490 compatible = "aspeed,ast2500-lpc-ctrl";
492 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
496 lpc_snoop: lpc-snoop@10 {
497 compatible = "aspeed,ast2500-lpc-snoop";
503 lpc_reset: reset-controller@18 {
504 compatible = "aspeed,ast2500-lpc-reset";
510 compatible = "aspeed,ast2500-lhc";
511 reg = <0x20 0x24 0x48 0x8>;
516 compatible = "aspeed,ast2500-ibt-bmc";
524 uart2: serial@1e78d000 {
525 compatible = "ns16550a";
526 reg = <0x1e78d000 0x20>;
529 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
530 resets = <&lpc_reset 5>;
535 uart3: serial@1e78e000 {
536 compatible = "ns16550a";
537 reg = <0x1e78e000 0x20>;
540 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
541 resets = <&lpc_reset 6>;
546 uart4: serial@1e78f000 {
547 compatible = "ns16550a";
548 reg = <0x1e78f000 0x20>;
551 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
552 resets = <&lpc_reset 7>;
558 compatible = "simple-bus";
559 #address-cells = <1>;
561 ranges = <0 0x1e78a000 0x1000>;
568 i2c_ic: interrupt-controller@0 {
569 #interrupt-cells = <1>;
570 compatible = "aspeed,ast2500-i2c-ic";
573 interrupt-controller;
577 #address-cells = <1>;
579 #interrupt-cells = <1>;
582 compatible = "aspeed,ast2500-i2c-bus";
583 clocks = <&syscon ASPEED_CLK_APB>;
584 resets = <&syscon ASPEED_RESET_I2C>;
585 bus-frequency = <100000>;
587 interrupt-parent = <&i2c_ic>;
589 /* Does not need pinctrl properties */
593 #address-cells = <1>;
595 #interrupt-cells = <1>;
598 compatible = "aspeed,ast2500-i2c-bus";
599 clocks = <&syscon ASPEED_CLK_APB>;
600 resets = <&syscon ASPEED_RESET_I2C>;
601 bus-frequency = <100000>;
603 interrupt-parent = <&i2c_ic>;
605 /* Does not need pinctrl properties */
609 #address-cells = <1>;
611 #interrupt-cells = <1>;
614 compatible = "aspeed,ast2500-i2c-bus";
615 clocks = <&syscon ASPEED_CLK_APB>;
616 resets = <&syscon ASPEED_RESET_I2C>;
617 bus-frequency = <100000>;
619 interrupt-parent = <&i2c_ic>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_i2c3_default>;
626 #address-cells = <1>;
628 #interrupt-cells = <1>;
631 compatible = "aspeed,ast2500-i2c-bus";
632 clocks = <&syscon ASPEED_CLK_APB>;
633 resets = <&syscon ASPEED_RESET_I2C>;
634 bus-frequency = <100000>;
636 interrupt-parent = <&i2c_ic>;
637 pinctrl-names = "default";
638 pinctrl-0 = <&pinctrl_i2c4_default>;
643 #address-cells = <1>;
645 #interrupt-cells = <1>;
648 compatible = "aspeed,ast2500-i2c-bus";
649 clocks = <&syscon ASPEED_CLK_APB>;
650 resets = <&syscon ASPEED_RESET_I2C>;
651 bus-frequency = <100000>;
653 interrupt-parent = <&i2c_ic>;
654 pinctrl-names = "default";
655 pinctrl-0 = <&pinctrl_i2c5_default>;
660 #address-cells = <1>;
662 #interrupt-cells = <1>;
665 compatible = "aspeed,ast2500-i2c-bus";
666 clocks = <&syscon ASPEED_CLK_APB>;
667 resets = <&syscon ASPEED_RESET_I2C>;
668 bus-frequency = <100000>;
670 interrupt-parent = <&i2c_ic>;
671 pinctrl-names = "default";
672 pinctrl-0 = <&pinctrl_i2c6_default>;
677 #address-cells = <1>;
679 #interrupt-cells = <1>;
682 compatible = "aspeed,ast2500-i2c-bus";
683 clocks = <&syscon ASPEED_CLK_APB>;
684 resets = <&syscon ASPEED_RESET_I2C>;
685 bus-frequency = <100000>;
687 interrupt-parent = <&i2c_ic>;
688 pinctrl-names = "default";
689 pinctrl-0 = <&pinctrl_i2c7_default>;
694 #address-cells = <1>;
696 #interrupt-cells = <1>;
699 compatible = "aspeed,ast2500-i2c-bus";
700 clocks = <&syscon ASPEED_CLK_APB>;
701 resets = <&syscon ASPEED_RESET_I2C>;
702 bus-frequency = <100000>;
704 interrupt-parent = <&i2c_ic>;
705 pinctrl-names = "default";
706 pinctrl-0 = <&pinctrl_i2c8_default>;
711 #address-cells = <1>;
713 #interrupt-cells = <1>;
716 compatible = "aspeed,ast2500-i2c-bus";
717 clocks = <&syscon ASPEED_CLK_APB>;
718 resets = <&syscon ASPEED_RESET_I2C>;
719 bus-frequency = <100000>;
721 interrupt-parent = <&i2c_ic>;
722 pinctrl-names = "default";
723 pinctrl-0 = <&pinctrl_i2c9_default>;
728 #address-cells = <1>;
730 #interrupt-cells = <1>;
733 compatible = "aspeed,ast2500-i2c-bus";
734 clocks = <&syscon ASPEED_CLK_APB>;
735 resets = <&syscon ASPEED_RESET_I2C>;
736 bus-frequency = <100000>;
738 interrupt-parent = <&i2c_ic>;
739 pinctrl-names = "default";
740 pinctrl-0 = <&pinctrl_i2c10_default>;
745 #address-cells = <1>;
747 #interrupt-cells = <1>;
750 compatible = "aspeed,ast2500-i2c-bus";
751 clocks = <&syscon ASPEED_CLK_APB>;
752 resets = <&syscon ASPEED_RESET_I2C>;
753 bus-frequency = <100000>;
755 interrupt-parent = <&i2c_ic>;
756 pinctrl-names = "default";
757 pinctrl-0 = <&pinctrl_i2c11_default>;
762 #address-cells = <1>;
764 #interrupt-cells = <1>;
767 compatible = "aspeed,ast2500-i2c-bus";
768 clocks = <&syscon ASPEED_CLK_APB>;
769 resets = <&syscon ASPEED_RESET_I2C>;
770 bus-frequency = <100000>;
772 interrupt-parent = <&i2c_ic>;
773 pinctrl-names = "default";
774 pinctrl-0 = <&pinctrl_i2c12_default>;
779 #address-cells = <1>;
781 #interrupt-cells = <1>;
784 compatible = "aspeed,ast2500-i2c-bus";
785 clocks = <&syscon ASPEED_CLK_APB>;
786 resets = <&syscon ASPEED_RESET_I2C>;
787 bus-frequency = <100000>;
789 interrupt-parent = <&i2c_ic>;
790 pinctrl-names = "default";
791 pinctrl-0 = <&pinctrl_i2c13_default>;
796 #address-cells = <1>;
798 #interrupt-cells = <1>;
801 compatible = "aspeed,ast2500-i2c-bus";
802 clocks = <&syscon ASPEED_CLK_APB>;
803 resets = <&syscon ASPEED_RESET_I2C>;
804 bus-frequency = <100000>;
806 interrupt-parent = <&i2c_ic>;
807 pinctrl-names = "default";
808 pinctrl-0 = <&pinctrl_i2c14_default>;
814 pinctrl_acpi_default: acpi_default {
819 pinctrl_adc0_default: adc0_default {
824 pinctrl_adc1_default: adc1_default {
829 pinctrl_adc10_default: adc10_default {
834 pinctrl_adc11_default: adc11_default {
839 pinctrl_adc12_default: adc12_default {
844 pinctrl_adc13_default: adc13_default {
849 pinctrl_adc14_default: adc14_default {
854 pinctrl_adc15_default: adc15_default {
859 pinctrl_adc2_default: adc2_default {
864 pinctrl_adc3_default: adc3_default {
869 pinctrl_adc4_default: adc4_default {
874 pinctrl_adc5_default: adc5_default {
879 pinctrl_adc6_default: adc6_default {
884 pinctrl_adc7_default: adc7_default {
889 pinctrl_adc8_default: adc8_default {
894 pinctrl_adc9_default: adc9_default {
899 pinctrl_bmcint_default: bmcint_default {
904 pinctrl_ddcclk_default: ddcclk_default {
909 pinctrl_ddcdat_default: ddcdat_default {
914 pinctrl_espi_default: espi_default {
919 pinctrl_fwspics1_default: fwspics1_default {
920 function = "FWSPICS1";
924 pinctrl_fwspics2_default: fwspics2_default {
925 function = "FWSPICS2";
929 pinctrl_gpid0_default: gpid0_default {
934 pinctrl_gpid2_default: gpid2_default {
939 pinctrl_gpid4_default: gpid4_default {
944 pinctrl_gpid6_default: gpid6_default {
949 pinctrl_gpie0_default: gpie0_default {
954 pinctrl_gpie2_default: gpie2_default {
959 pinctrl_gpie4_default: gpie4_default {
964 pinctrl_gpie6_default: gpie6_default {
969 pinctrl_i2c10_default: i2c10_default {
974 pinctrl_i2c11_default: i2c11_default {
979 pinctrl_i2c12_default: i2c12_default {
984 pinctrl_i2c13_default: i2c13_default {
989 pinctrl_i2c14_default: i2c14_default {
994 pinctrl_i2c3_default: i2c3_default {
999 pinctrl_i2c4_default: i2c4_default {
1004 pinctrl_i2c5_default: i2c5_default {
1009 pinctrl_i2c6_default: i2c6_default {
1014 pinctrl_i2c7_default: i2c7_default {
1019 pinctrl_i2c8_default: i2c8_default {
1024 pinctrl_i2c9_default: i2c9_default {
1029 pinctrl_lad0_default: lad0_default {
1034 pinctrl_lad1_default: lad1_default {
1039 pinctrl_lad2_default: lad2_default {
1044 pinctrl_lad3_default: lad3_default {
1049 pinctrl_lclk_default: lclk_default {
1054 pinctrl_lframe_default: lframe_default {
1055 function = "LFRAME";
1059 pinctrl_lpchc_default: lpchc_default {
1064 pinctrl_lpcpd_default: lpcpd_default {
1069 pinctrl_lpcplus_default: lpcplus_default {
1070 function = "LPCPLUS";
1074 pinctrl_lpcpme_default: lpcpme_default {
1075 function = "LPCPME";
1079 pinctrl_lpcrst_default: lpcrst_default {
1080 function = "LPCRST";
1084 pinctrl_lpcsmi_default: lpcsmi_default {
1085 function = "LPCSMI";
1089 pinctrl_lsirq_default: lsirq_default {
1094 pinctrl_mac1link_default: mac1link_default {
1095 function = "MAC1LINK";
1096 groups = "MAC1LINK";
1099 pinctrl_mac2link_default: mac2link_default {
1100 function = "MAC2LINK";
1101 groups = "MAC2LINK";
1104 pinctrl_mdio1_default: mdio1_default {
1109 pinctrl_mdio2_default: mdio2_default {
1114 pinctrl_ncts1_default: ncts1_default {
1119 pinctrl_ncts2_default: ncts2_default {
1124 pinctrl_ncts3_default: ncts3_default {
1129 pinctrl_ncts4_default: ncts4_default {
1134 pinctrl_ndcd1_default: ndcd1_default {
1139 pinctrl_ndcd2_default: ndcd2_default {
1144 pinctrl_ndcd3_default: ndcd3_default {
1149 pinctrl_ndcd4_default: ndcd4_default {
1154 pinctrl_ndsr1_default: ndsr1_default {
1159 pinctrl_ndsr2_default: ndsr2_default {
1164 pinctrl_ndsr3_default: ndsr3_default {
1169 pinctrl_ndsr4_default: ndsr4_default {
1174 pinctrl_ndtr1_default: ndtr1_default {
1179 pinctrl_ndtr2_default: ndtr2_default {
1184 pinctrl_ndtr3_default: ndtr3_default {
1189 pinctrl_ndtr4_default: ndtr4_default {
1194 pinctrl_nri1_default: nri1_default {
1199 pinctrl_nri2_default: nri2_default {
1204 pinctrl_nri3_default: nri3_default {
1209 pinctrl_nri4_default: nri4_default {
1214 pinctrl_nrts1_default: nrts1_default {
1219 pinctrl_nrts2_default: nrts2_default {
1224 pinctrl_nrts3_default: nrts3_default {
1229 pinctrl_nrts4_default: nrts4_default {
1234 pinctrl_oscclk_default: oscclk_default {
1235 function = "OSCCLK";
1239 pinctrl_pewake_default: pewake_default {
1240 function = "PEWAKE";
1244 pinctrl_pnor_default: pnor_default {
1249 pinctrl_pwm0_default: pwm0_default {
1254 pinctrl_pwm1_default: pwm1_default {
1259 pinctrl_pwm2_default: pwm2_default {
1264 pinctrl_pwm3_default: pwm3_default {
1269 pinctrl_pwm4_default: pwm4_default {
1274 pinctrl_pwm5_default: pwm5_default {
1279 pinctrl_pwm6_default: pwm6_default {
1284 pinctrl_pwm7_default: pwm7_default {
1289 pinctrl_rgmii1_default: rgmii1_default {
1290 function = "RGMII1";
1294 pinctrl_rgmii2_default: rgmii2_default {
1295 function = "RGMII2";
1299 pinctrl_rmii1_default: rmii1_default {
1304 pinctrl_rmii2_default: rmii2_default {
1309 pinctrl_rxd1_default: rxd1_default {
1314 pinctrl_rxd2_default: rxd2_default {
1319 pinctrl_rxd3_default: rxd3_default {
1324 pinctrl_rxd4_default: rxd4_default {
1329 pinctrl_salt1_default: salt1_default {
1334 pinctrl_salt10_default: salt10_default {
1335 function = "SALT10";
1339 pinctrl_salt11_default: salt11_default {
1340 function = "SALT11";
1344 pinctrl_salt12_default: salt12_default {
1345 function = "SALT12";
1349 pinctrl_salt13_default: salt13_default {
1350 function = "SALT13";
1354 pinctrl_salt14_default: salt14_default {
1355 function = "SALT14";
1359 pinctrl_salt2_default: salt2_default {
1364 pinctrl_salt3_default: salt3_default {
1369 pinctrl_salt4_default: salt4_default {
1374 pinctrl_salt5_default: salt5_default {
1379 pinctrl_salt6_default: salt6_default {
1384 pinctrl_salt7_default: salt7_default {
1389 pinctrl_salt8_default: salt8_default {
1394 pinctrl_salt9_default: salt9_default {
1399 pinctrl_scl1_default: scl1_default {
1404 pinctrl_scl2_default: scl2_default {
1409 pinctrl_sd1_default: sd1_default {
1414 pinctrl_sd2_default: sd2_default {
1419 pinctrl_sda1_default: sda1_default {
1424 pinctrl_sda2_default: sda2_default {
1429 pinctrl_sgpm_default: sgpm_default {
1434 pinctrl_sgps1_default: sgps1_default {
1439 pinctrl_sgps2_default: sgps2_default {
1444 pinctrl_sioonctrl_default: sioonctrl_default {
1445 function = "SIOONCTRL";
1446 groups = "SIOONCTRL";
1449 pinctrl_siopbi_default: siopbi_default {
1450 function = "SIOPBI";
1454 pinctrl_siopbo_default: siopbo_default {
1455 function = "SIOPBO";
1459 pinctrl_siopwreq_default: siopwreq_default {
1460 function = "SIOPWREQ";
1461 groups = "SIOPWREQ";
1464 pinctrl_siopwrgd_default: siopwrgd_default {
1465 function = "SIOPWRGD";
1466 groups = "SIOPWRGD";
1469 pinctrl_sios3_default: sios3_default {
1474 pinctrl_sios5_default: sios5_default {
1479 pinctrl_siosci_default: siosci_default {
1480 function = "SIOSCI";
1484 pinctrl_spi1_default: spi1_default {
1489 pinctrl_spi1cs1_default: spi1cs1_default {
1490 function = "SPI1CS1";
1494 pinctrl_spi1debug_default: spi1debug_default {
1495 function = "SPI1DEBUG";
1496 groups = "SPI1DEBUG";
1499 pinctrl_spi1passthru_default: spi1passthru_default {
1500 function = "SPI1PASSTHRU";
1501 groups = "SPI1PASSTHRU";
1504 pinctrl_spi2ck_default: spi2ck_default {
1505 function = "SPI2CK";
1509 pinctrl_spi2cs0_default: spi2cs0_default {
1510 function = "SPI2CS0";
1514 pinctrl_spi2cs1_default: spi2cs1_default {
1515 function = "SPI2CS1";
1519 pinctrl_spi2miso_default: spi2miso_default {
1520 function = "SPI2MISO";
1521 groups = "SPI2MISO";
1524 pinctrl_spi2mosi_default: spi2mosi_default {
1525 function = "SPI2MOSI";
1526 groups = "SPI2MOSI";
1529 pinctrl_timer3_default: timer3_default {
1530 function = "TIMER3";
1534 pinctrl_timer4_default: timer4_default {
1535 function = "TIMER4";
1539 pinctrl_timer5_default: timer5_default {
1540 function = "TIMER5";
1544 pinctrl_timer6_default: timer6_default {
1545 function = "TIMER6";
1549 pinctrl_timer7_default: timer7_default {
1550 function = "TIMER7";
1554 pinctrl_timer8_default: timer8_default {
1555 function = "TIMER8";
1559 pinctrl_txd1_default: txd1_default {
1564 pinctrl_txd2_default: txd2_default {
1569 pinctrl_txd3_default: txd3_default {
1574 pinctrl_txd4_default: txd4_default {
1579 pinctrl_uart6_default: uart6_default {
1584 pinctrl_usbcki_default: usbcki_default {
1585 function = "USBCKI";
1589 pinctrl_usb2ah_default: usb2ah_default {
1590 function = "USB2AH";
1594 pinctrl_usb2ad_default: usb2ad_default {
1595 function = "USB2AD";
1599 pinctrl_usb11bhid_default: usb11bhid_default {
1600 function = "USB11BHID";
1601 groups = "USB11BHID";
1604 pinctrl_usb2bh_default: usb2bh_default {
1605 function = "USB2BH";
1609 pinctrl_vgabiosrom_default: vgabiosrom_default {
1610 function = "VGABIOSROM";
1611 groups = "VGABIOSROM";
1614 pinctrl_vgahs_default: vgahs_default {
1619 pinctrl_vgavs_default: vgavs_default {
1624 pinctrl_vpi24_default: vpi24_default {
1629 pinctrl_vpo_default: vpo_default {
1634 pinctrl_wdtrst1_default: wdtrst1_default {
1635 function = "WDTRST1";
1639 pinctrl_wdtrst2_default: wdtrst2_default {
1640 function = "WDTRST2";