arch/arm/boot/dts/aspeed-g4.dtsi

   1 #include "skeleton.dtsi"
   2
   3 / {
   4         model = "Aspeed BMC";
   5         compatible = "aspeed,ast2400";
   6         #address-cells = <1>;
   7         #size-cells = <1>;
   8         interrupt-parent = <&vic>;
   9
  10         aliases {
  11                 i2c0 = &i2c0;
  12                 i2c1 = &i2c1;
  13                 i2c2 = &i2c2;
  14                 i2c3 = &i2c3;
  15                 i2c4 = &i2c4;
  16                 i2c5 = &i2c5;
  17                 i2c6 = &i2c6;
  18                 i2c7 = &i2c7;
  19                 i2c8 = &i2c8;
  20                 i2c9 = &i2c9;
  21                 i2c10 = &i2c10;
  22                 i2c11 = &i2c11;
  23                 i2c12 = &i2c12;
  24                 i2c13 = &i2c13;
  25                 serial0 = &uart1;
  26                 serial1 = &uart2;
  27                 serial2 = &uart3;
  28                 serial3 = &uart4;
  29                 serial4 = &uart5;
  30                 serial5 = &vuart;
  31         };
  32
  33         cpus {
  34                 #address-cells = <1>;
  35                 #size-cells = <0>;
  36
  37                 cpu@0 {
  38                         compatible = "arm,arm926ej-s";
  39                         device_type = "cpu";
  40                         reg = <0>;
  41                 };
  42         };
  43
  44         ahb {
  45                 compatible = "simple-bus";
  46                 #address-cells = <1>;
  47                 #size-cells = <1>;
  48                 ranges;
  49
  50                 fmc: flash-controller@1e620000 {
  51                         reg = < 0x1e620000 0x94
  52                                 0x20000000 0x10000000 >;
  53                         #address-cells = <1>;
  54                         #size-cells = <0>;
  55                         compatible = "aspeed,ast2400-fmc";
  56                         status = "disabled";
  57                         interrupts = <19>;
  58                         flash@0 {
  59                                 reg = < 0 >;
  60                                 compatible = "jedec,spi-nor";
  61                                 status = "disabled";
  62                         };
  63                 };
  64
  65                 spi: flash-controller@1e630000 {
  66                         reg = < 0x1e630000 0x18
  67                                 0x30000000 0x10000000 >;
  68                         #address-cells = <1>;
  69                         #size-cells = <0>;
  70                         compatible = "aspeed,ast2400-spi";
  71                         status = "disabled";
  72                         flash@0 {
  73                                 reg = < 0 >;
  74                                 compatible = "jedec,spi-nor";
  75                                 status = "disabled";
  76                         };
  77                 };
  78
  79                 vic: interrupt-controller@1e6c0080 {
  80                         compatible = "aspeed,ast2400-vic";
  81                         interrupt-controller;
  82                         #interrupt-cells = <1>;
  83                         valid-sources = <0xffffffff 0x0007ffff>;
  84                         reg = <0x1e6c0080 0x80>;
  85                 };
  86
  87                 mac0: ethernet@1e660000 {
  88                         compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
  89                         reg = <0x1e660000 0x180>;
  90                         interrupts = <2>;
  91                         status = "disabled";
  92                 };
  93
  94                 mac1: ethernet@1e680000 {
  95                         compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
  96                         reg = <0x1e680000 0x180>;
  97                         interrupts = <3>;
  98                         status = "disabled";
  99                 };
 100
 101                 apb {
 102                         compatible = "simple-bus";
 103                         #address-cells = <1>;
 104                         #size-cells = <1>;
 105                         ranges;
 106
 107                         syscon: syscon@1e6e2000 {
 108                                 compatible = "aspeed,g4-scu", "syscon", "simple-mfd";
 109                                 reg = <0x1e6e2000 0x1a8>;
 110                                 #address-cells = <1>;
 111                                 #size-cells = <0>;
 112
 113                                 clk_clkin: clk_clkin {
 114                                         #clock-cells = <0>;
 115                                         compatible = "fixed-clock";
 116                                         clock-frequency = <48000000>;
 117                                 };
 118
 119                                 clk_hpll: clk_hpll@70 {
 120                                         #clock-cells = <0>;
 121                                         compatible = "aspeed,g4-hpll-clock", "fixed-clock";
 122                                         reg = <0x70>;
 123                                         clocks = <&clk_clkin>;
 124                                         clock-frequency = <384000000>;
 125                                 };
 126
 127                                 clk_ahb: clk_ahb@70 {
 128                                         #clock-cells = <0>;
 129                                         compatible = "aspeed,g4-ahb-clock", "fixed-clock";
 130                                         reg = <0x70>;
 131                                         clocks = <&clk_hpll>;
 132                                         clock-frequency = <192000000>;
 133                                 };
 134
 135                                 clk_apb: clk_apb@8 {
 136                                         #clock-cells = <0>;
 137                                         compatible = "aspeed,g4-apb-clock", "fixed-clock";
 138                                         reg = <0x08>;
 139                                         clocks = <&clk_hpll>;
 140                                         clock-frequency = <48000000>;
 141                                 };
 142
 143                                 clk_uart: clk_uart@2c{
 144                                         #clock-cells = <0>;
 145                                         compatible = "aspeed,g4-uart-clock", "fixed-clock";
 146                                         reg = <0x2c>;
 147                                         clock-frequency = <24000000>;
 148                                 };
 149
 150                                 pinctrl: pinctrl {
 151                                         compatible = "aspeed,g4-pinctrl";
 152                                 };
 153                         };
 154
 155                         adc: adc@1e6e9000 {
 156                                 compatible = "aspeed,ast2400-adc";
 157                                 reg = <0x1e6e9000 0xb0>;
 158                                 clocks = <&clk_apb>;
 159                                 #io-channel-cells = <1>;
 160                                 status = "disabled";
 161                         };
 162
 163                         sram@1e720000 {
 164                                 compatible = "mmio-sram";
 165                                 reg = <0x1e720000 0x8000>;      // 32K
 166                         };
 167
 168                         gpio: gpio@1e780000 {
 169                                 #gpio-cells = <2>;
 170                                 gpio-controller;
 171                                 compatible = "aspeed,ast2400-gpio";
 172                                 reg = <0x1e780000 0x1000>;
 173                                 interrupts = <20>;
 174                                 gpio-ranges = <&pinctrl 0 0 220>;
 175                                 interrupt-controller;
 176                         };
 177
 178                         timer: timer@1e782000 {
 179                                 /* This timer is a Faraday FTTMR010 derivative */
 180                                 compatible = "aspeed,ast2400-timer";
 181                                 reg = <0x1e782000 0x90>;
 182                                 interrupts = <16 17 18 35 36 37 38 39>;
 183                                 clocks = <&clk_apb>;
 184                                 clock-names = "PCLK";
 185                         };
 186
 187                         uart1: serial@1e783000 {
 188                                 compatible = "ns16550a";
 189                                 reg = <0x1e783000 0x20>;
 190                                 reg-shift = <2>;
 191                                 interrupts = <9>;
 192                                 clocks = <&clk_uart>;
 193                                 no-loopback-test;
 194                                 status = "disabled";
 195                         };
 196
 197                         uart5: serial@1e784000 {
 198                                 compatible = "ns16550a";
 199                                 reg = <0x1e784000 0x20>;
 200                                 reg-shift = <2>;
 201                                 interrupts = <10>;
 202                                 clocks = <&clk_uart>;
 203                                 no-loopback-test;
 204                                 status = "disabled";
 205                         };
 206
 207                         wdt1: watchdog@1e785000 {
 208                                 compatible = "aspeed,ast2400-wdt";
 209                                 reg = <0x1e785000 0x1c>;
 210                         };
 211
 212                         wdt2: watchdog@1e785020 {
 213                                 compatible = "aspeed,ast2400-wdt";
 214                                 reg = <0x1e785020 0x1c>;
 215                         };
 216
 217                         vuart: serial@1e787000 {
 218                                 compatible = "aspeed,ast2400-vuart";
 219                                 reg = <0x1e787000 0x40>;
 220                                 reg-shift = <2>;
 221                                 interrupts = <10>;
 222                                 clocks = <&clk_uart>;
 223                                 no-loopback-test;
 224                                 status = "disabled";
 225                         };
 226
 227                         uart2: serial@1e78d000 {
 228                                 compatible = "ns16550a";
 229                                 reg = <0x1e78d000 0x20>;
 230                                 reg-shift = <2>;
 231                                 interrupts = <32>;
 232                                 clocks = <&clk_uart>;
 233                                 no-loopback-test;
 234                                 status = "disabled";
 235                         };
 236
 237                         uart3: serial@1e78e000 {
 238                                 compatible = "ns16550a";
 239                                 reg = <0x1e78e000 0x20>;
 240                                 reg-shift = <2>;
 241                                 interrupts = <33>;
 242                                 clocks = <&clk_uart>;
 243                                 no-loopback-test;
 244                                 status = "disabled";
 245                         };
 246
 247                         uart4: serial@1e78f000 {
 248                                 compatible = "ns16550a";
 249                                 reg = <0x1e78f000 0x20>;
 250                                 reg-shift = <2>;
 251                                 interrupts = <34>;
 252                                 clocks = <&clk_uart>;
 253                                 no-loopback-test;
 254                                 status = "disabled";
 255                         };
 256
 257                         i2c: i2c@1e78a000 {
 258                                 compatible = "simple-bus";
 259                                 #address-cells = <1>;
 260                                 #size-cells = <1>;
 261                                 ranges = <0 0x1e78a000 0x1000>;
 262                         };
 263                 };
 264         };
 265 };
 266
 267 &i2c {
 268         i2c_ic: interrupt-controller@0 {
 269                 #interrupt-cells = <1>;
 270                 compatible = "aspeed,ast2400-i2c-ic";
 271                 reg = <0x0 0x40>;
 272                 interrupts = <12>;
 273                 interrupt-controller;
 274         };
 275
 276         i2c0: i2c-bus@40 {
 277                 #address-cells = <1>;
 278                 #size-cells = <0>;
 279                 #interrupt-cells = <1>;
 280
 281                 reg = <0x40 0x40>;
 282                 compatible = "aspeed,ast2400-i2c-bus";
 283                 clocks = <&clk_apb>;
 284                 bus-frequency = <100000>;
 285                 interrupts = <0>;
 286                 interrupt-parent = <&i2c_ic>;
 287                 status = "disabled";
 288                 /* Does not need pinctrl properties */
 289         };
 290
 291         i2c1: i2c-bus@80 {
 292                 #address-cells = <1>;
 293                 #size-cells = <0>;
 294                 #interrupt-cells = <1>;
 295
 296                 reg = <0x80 0x40>;
 297                 compatible = "aspeed,ast2400-i2c-bus";
 298                 clocks = <&clk_apb>;
 299                 bus-frequency = <100000>;
 300                 interrupts = <1>;
 301                 interrupt-parent = <&i2c_ic>;
 302                 status = "disabled";
 303                 /* Does not need pinctrl properties */
 304         };
 305
 306         i2c2: i2c-bus@c0 {
 307                 #address-cells = <1>;
 308                 #size-cells = <0>;
 309                 #interrupt-cells = <1>;
 310
 311                 reg = <0xc0 0x40>;
 312                 compatible = "aspeed,ast2400-i2c-bus";
 313                 clocks = <&clk_apb>;
 314                 bus-frequency = <100000>;
 315                 interrupts = <2>;
 316                 interrupt-parent = <&i2c_ic>;
 317                 pinctrl-names = "default";
 318                 pinctrl-0 = <&pinctrl_i2c3_default>;
 319                 status = "disabled";
 320         };
 321
 322         i2c3: i2c-bus@100 {
 323                 #address-cells = <1>;
 324                 #size-cells = <0>;
 325                 #interrupt-cells = <1>;
 326
 327                 reg = <0x100 0x40>;
 328                 compatible = "aspeed,ast2400-i2c-bus";
 329                 clocks = <&clk_apb>;
 330                 bus-frequency = <100000>;
 331                 interrupts = <3>;
 332                 interrupt-parent = <&i2c_ic>;
 333                 pinctrl-names = "default";
 334                 pinctrl-0 = <&pinctrl_i2c4_default>;
 335                 status = "disabled";
 336         };
 337
 338         i2c4: i2c-bus@140 {
 339                 #address-cells = <1>;
 340                 #size-cells = <0>;
 341                 #interrupt-cells = <1>;
 342
 343                 reg = <0x140 0x40>;
 344                 compatible = "aspeed,ast2400-i2c-bus";
 345                 clocks = <&clk_apb>;
 346                 bus-frequency = <100000>;
 347                 interrupts = <4>;
 348                 interrupt-parent = <&i2c_ic>;
 349                 pinctrl-names = "default";
 350                 pinctrl-0 = <&pinctrl_i2c5_default>;
 351                 status = "disabled";
 352         };
 353
 354         i2c5: i2c-bus@180 {
 355                 #address-cells = <1>;
 356                 #size-cells = <0>;
 357                 #interrupt-cells = <1>;
 358
 359                 reg = <0x180 0x40>;
 360                 compatible = "aspeed,ast2400-i2c-bus";
 361                 clocks = <&clk_apb>;
 362                 bus-frequency = <100000>;
 363                 interrupts = <5>;
 364                 interrupt-parent = <&i2c_ic>;
 365                 pinctrl-names = "default";
 366                 pinctrl-0 = <&pinctrl_i2c6_default>;
 367                 status = "disabled";
 368         };
 369
 370         i2c6: i2c-bus@1c0 {
 371                 #address-cells = <1>;
 372                 #size-cells = <0>;
 373                 #interrupt-cells = <1>;
 374
 375                 reg = <0x1c0 0x40>;
 376                 compatible = "aspeed,ast2400-i2c-bus";
 377                 clocks = <&clk_apb>;
 378                 bus-frequency = <100000>;
 379                 interrupts = <6>;
 380                 interrupt-parent = <&i2c_ic>;
 381                 pinctrl-names = "default";
 382                 pinctrl-0 = <&pinctrl_i2c7_default>;
 383                 status = "disabled";
 384         };
 385
 386         i2c7: i2c-bus@300 {
 387                 #address-cells = <1>;
 388                 #size-cells = <0>;
 389                 #interrupt-cells = <1>;
 390
 391                 reg = <0x300 0x40>;
 392                 compatible = "aspeed,ast2400-i2c-bus";
 393                 clocks = <&clk_apb>;
 394                 bus-frequency = <100000>;
 395                 interrupts = <7>;
 396                 interrupt-parent = <&i2c_ic>;
 397                 pinctrl-names = "default";
 398                 pinctrl-0 = <&pinctrl_i2c8_default>;
 399                 status = "disabled";
 400         };
 401
 402         i2c8: i2c-bus@340 {
 403                 #address-cells = <1>;
 404                 #size-cells = <0>;
 405                 #interrupt-cells = <1>;
 406
 407                 reg = <0x340 0x40>;
 408                 compatible = "aspeed,ast2400-i2c-bus";
 409                 clocks = <&clk_apb>;
 410                 bus-frequency = <100000>;
 411                 interrupts = <8>;
 412                 interrupt-parent = <&i2c_ic>;
 413                 pinctrl-names = "default";
 414                 pinctrl-0 = <&pinctrl_i2c9_default>;
 415                 status = "disabled";
 416         };
 417
 418         i2c9: i2c-bus@380 {
 419                 #address-cells = <1>;
 420                 #size-cells = <0>;
 421                 #interrupt-cells = <1>;
 422
 423                 reg = <0x380 0x40>;
 424                 compatible = "aspeed,ast2400-i2c-bus";
 425                 clocks = <&clk_apb>;
 426                 bus-frequency = <100000>;
 427                 interrupts = <9>;
 428                 interrupt-parent = <&i2c_ic>;
 429                 pinctrl-names = "default";
 430                 pinctrl-0 = <&pinctrl_i2c10_default>;
 431                 status = "disabled";
 432         };
 433
 434         i2c10: i2c-bus@3c0 {
 435                 #address-cells = <1>;
 436                 #size-cells = <0>;
 437                 #interrupt-cells = <1>;
 438
 439                 reg = <0x3c0 0x40>;
 440                 compatible = "aspeed,ast2400-i2c-bus";
 441                 clocks = <&clk_apb>;
 442                 bus-frequency = <100000>;
 443                 interrupts = <10>;
 444                 interrupt-parent = <&i2c_ic>;
 445                 pinctrl-names = "default";
 446                 pinctrl-0 = <&pinctrl_i2c11_default>;
 447                 status = "disabled";
 448         };
 449
 450         i2c11: i2c-bus@400 {
 451                 #address-cells = <1>;
 452                 #size-cells = <0>;
 453                 #interrupt-cells = <1>;
 454
 455                 reg = <0x400 0x40>;
 456                 compatible = "aspeed,ast2400-i2c-bus";
 457                 clocks = <&clk_apb>;
 458                 bus-frequency = <100000>;
 459                 interrupts = <11>;
 460                 interrupt-parent = <&i2c_ic>;
 461                 pinctrl-names = "default";
 462                 pinctrl-0 = <&pinctrl_i2c12_default>;
 463                 status = "disabled";
 464         };
 465
 466         i2c12: i2c-bus@440 {
 467                 #address-cells = <1>;
 468                 #size-cells = <0>;
 469                 #interrupt-cells = <1>;
 470
 471                 reg = <0x440 0x40>;
 472                 compatible = "aspeed,ast2400-i2c-bus";
 473                 clocks = <&clk_apb>;
 474                 bus-frequency = <100000>;
 475                 interrupts = <12>;
 476                 interrupt-parent = <&i2c_ic>;
 477                 pinctrl-names = "default";
 478                 pinctrl-0 = <&pinctrl_i2c13_default>;
 479                 status = "disabled";
 480         };
 481
 482         i2c13: i2c-bus@480 {
 483                 #address-cells = <1>;
 484                 #size-cells = <0>;
 485                 #interrupt-cells = <1>;
 486
 487                 reg = <0x480 0x40>;
 488                 compatible = "aspeed,ast2400-i2c-bus";
 489                 clocks = <&clk_apb>;
 490                 bus-frequency = <100000>;
 491                 interrupts = <13>;
 492                 interrupt-parent = <&i2c_ic>;
 493                 pinctrl-names = "default";
 494                 pinctrl-0 = <&pinctrl_i2c14_default>;
 495                 status = "disabled";
 496         };
 497 };
 498
 499 &pinctrl {
 500         pinctrl_acpi_default: acpi_default {
 501                 function = "ACPI";
 502                 groups = "ACPI";
 503         };
 504
 505         pinctrl_adc0_default: adc0_default {
 506                 function = "ADC0";
 507                 groups = "ADC0";
 508         };
 509
 510         pinctrl_adc1_default: adc1_default {
 511                 function = "ADC1";
 512                 groups = "ADC1";
 513         };
 514
 515         pinctrl_adc10_default: adc10_default {
 516                 function = "ADC10";
 517                 groups = "ADC10";
 518         };
 519
 520         pinctrl_adc11_default: adc11_default {
 521                 function = "ADC11";
 522                 groups = "ADC11";
 523         };
 524
 525         pinctrl_adc12_default: adc12_default {
 526                 function = "ADC12";
 527                 groups = "ADC12";
 528         };
 529
 530         pinctrl_adc13_default: adc13_default {
 531                 function = "ADC13";
 532                 groups = "ADC13";
 533         };
 534
 535         pinctrl_adc14_default: adc14_default {
 536                 function = "ADC14";
 537                 groups = "ADC14";
 538         };
 539
 540         pinctrl_adc15_default: adc15_default {
 541                 function = "ADC15";
 542                 groups = "ADC15";
 543         };
 544
 545         pinctrl_adc2_default: adc2_default {
 546                 function = "ADC2";
 547                 groups = "ADC2";
 548         };
 549
 550         pinctrl_adc3_default: adc3_default {
 551                 function = "ADC3";
 552                 groups = "ADC3";
 553         };
 554
 555         pinctrl_adc4_default: adc4_default {
 556                 function = "ADC4";
 557                 groups = "ADC4";
 558         };
 559
 560         pinctrl_adc5_default: adc5_default {
 561                 function = "ADC5";
 562                 groups = "ADC5";
 563         };
 564
 565         pinctrl_adc6_default: adc6_default {
 566                 function = "ADC6";
 567                 groups = "ADC6";
 568         };
 569
 570         pinctrl_adc7_default: adc7_default {
 571                 function = "ADC7";
 572                 groups = "ADC7";
 573         };
 574
 575         pinctrl_adc8_default: adc8_default {
 576                 function = "ADC8";
 577                 groups = "ADC8";
 578         };
 579
 580         pinctrl_adc9_default: adc9_default {
 581                 function = "ADC9";
 582                 groups = "ADC9";
 583         };
 584
 585         pinctrl_bmcint_default: bmcint_default {
 586                 function = "BMCINT";
 587                 groups = "BMCINT";
 588         };
 589
 590         pinctrl_ddcclk_default: ddcclk_default {
 591                 function = "DDCCLK";
 592                 groups = "DDCCLK";
 593         };
 594
 595         pinctrl_ddcdat_default: ddcdat_default {
 596                 function = "DDCDAT";
 597                 groups = "DDCDAT";
 598         };
 599
 600         pinctrl_extrst_default: extrst_default {
 601                 function = "EXTRST";
 602                 groups = "EXTRST";
 603         };
 604
 605         pinctrl_flack_default: flack_default {
 606                 function = "FLACK";
 607                 groups = "FLACK";
 608         };
 609
 610         pinctrl_flbusy_default: flbusy_default {
 611                 function = "FLBUSY";
 612                 groups = "FLBUSY";
 613         };
 614
 615         pinctrl_flwp_default: flwp_default {
 616                 function = "FLWP";
 617                 groups = "FLWP";
 618         };
 619
 620         pinctrl_gpid_default: gpid_default {
 621                 function = "GPID";
 622                 groups = "GPID";
 623         };
 624
 625         pinctrl_gpid0_default: gpid0_default {
 626                 function = "GPID0";
 627                 groups = "GPID0";
 628         };
 629
 630         pinctrl_gpid2_default: gpid2_default {
 631                 function = "GPID2";
 632                 groups = "GPID2";
 633         };
 634
 635         pinctrl_gpid4_default: gpid4_default {
 636                 function = "GPID4";
 637                 groups = "GPID4";
 638         };
 639
 640         pinctrl_gpid6_default: gpid6_default {
 641                 function = "GPID6";
 642                 groups = "GPID6";
 643         };
 644
 645         pinctrl_gpie0_default: gpie0_default {
 646                 function = "GPIE0";
 647                 groups = "GPIE0";
 648         };
 649
 650         pinctrl_gpie2_default: gpie2_default {
 651                 function = "GPIE2";
 652                 groups = "GPIE2";
 653         };
 654
 655         pinctrl_gpie4_default: gpie4_default {
 656                 function = "GPIE4";
 657                 groups = "GPIE4";
 658         };
 659
 660         pinctrl_gpie6_default: gpie6_default {
 661                 function = "GPIE6";
 662                 groups = "GPIE6";
 663         };
 664
 665         pinctrl_i2c10_default: i2c10_default {
 666                 function = "I2C10";
 667                 groups = "I2C10";
 668         };
 669
 670         pinctrl_i2c11_default: i2c11_default {
 671                 function = "I2C11";
 672                 groups = "I2C11";
 673         };
 674
 675         pinctrl_i2c12_default: i2c12_default {
 676                 function = "I2C12";
 677                 groups = "I2C12";
 678         };
 679
 680         pinctrl_i2c13_default: i2c13_default {
 681                 function = "I2C13";
 682                 groups = "I2C13";
 683         };
 684
 685         pinctrl_i2c14_default: i2c14_default {
 686                 function = "I2C14";
 687                 groups = "I2C14";
 688         };
 689
 690         pinctrl_i2c3_default: i2c3_default {
 691                 function = "I2C3";
 692                 groups = "I2C3";
 693         };
 694
 695         pinctrl_i2c4_default: i2c4_default {
 696                 function = "I2C4";
 697                 groups = "I2C4";
 698         };
 699
 700         pinctrl_i2c5_default: i2c5_default {
 701                 function = "I2C5";
 702                 groups = "I2C5";
 703         };
 704
 705         pinctrl_i2c6_default: i2c6_default {
 706                 function = "I2C6";
 707                 groups = "I2C6";
 708         };
 709
 710         pinctrl_i2c7_default: i2c7_default {
 711                 function = "I2C7";
 712                 groups = "I2C7";
 713         };
 714
 715         pinctrl_i2c8_default: i2c8_default {
 716                 function = "I2C8";
 717                 groups = "I2C8";
 718         };
 719
 720         pinctrl_i2c9_default: i2c9_default {
 721                 function = "I2C9";
 722                 groups = "I2C9";
 723         };
 724
 725         pinctrl_lpcpd_default: lpcpd_default {
 726                 function = "LPCPD";
 727                 groups = "LPCPD";
 728         };
 729
 730         pinctrl_lpcpme_default: lpcpme_default {
 731                 function = "LPCPME";
 732                 groups = "LPCPME";
 733         };
 734
 735         pinctrl_lpcrst_default: lpcrst_default {
 736                 function = "LPCRST";
 737                 groups = "LPCRST";
 738         };
 739
 740         pinctrl_lpcsmi_default: lpcsmi_default {
 741                 function = "LPCSMI";
 742                 groups = "LPCSMI";
 743         };
 744
 745         pinctrl_mac1link_default: mac1link_default {
 746                 function = "MAC1LINK";
 747                 groups = "MAC1LINK";
 748         };
 749
 750         pinctrl_mac2link_default: mac2link_default {
 751                 function = "MAC2LINK";
 752                 groups = "MAC2LINK";
 753         };
 754
 755         pinctrl_mdio1_default: mdio1_default {
 756                 function = "MDIO1";
 757                 groups = "MDIO1";
 758         };
 759
 760         pinctrl_mdio2_default: mdio2_default {
 761                 function = "MDIO2";
 762                 groups = "MDIO2";
 763         };
 764
 765         pinctrl_ncts1_default: ncts1_default {
 766                 function = "NCTS1";
 767                 groups = "NCTS1";
 768         };
 769
 770         pinctrl_ncts2_default: ncts2_default {
 771                 function = "NCTS2";
 772                 groups = "NCTS2";
 773         };
 774
 775         pinctrl_ncts3_default: ncts3_default {
 776                 function = "NCTS3";
 777                 groups = "NCTS3";
 778         };
 779
 780         pinctrl_ncts4_default: ncts4_default {
 781                 function = "NCTS4";
 782                 groups = "NCTS4";
 783         };
 784
 785         pinctrl_ndcd1_default: ndcd1_default {
 786                 function = "NDCD1";
 787                 groups = "NDCD1";
 788         };
 789
 790         pinctrl_ndcd2_default: ndcd2_default {
 791                 function = "NDCD2";
 792                 groups = "NDCD2";
 793         };
 794
 795         pinctrl_ndcd3_default: ndcd3_default {
 796                 function = "NDCD3";
 797                 groups = "NDCD3";
 798         };
 799
 800         pinctrl_ndcd4_default: ndcd4_default {
 801                 function = "NDCD4";
 802                 groups = "NDCD4";
 803         };
 804
 805         pinctrl_ndsr1_default: ndsr1_default {
 806                 function = "NDSR1";
 807                 groups = "NDSR1";
 808         };
 809
 810         pinctrl_ndsr2_default: ndsr2_default {
 811                 function = "NDSR2";
 812                 groups = "NDSR2";
 813         };
 814
 815         pinctrl_ndsr3_default: ndsr3_default {
 816                 function = "NDSR3";
 817                 groups = "NDSR3";
 818         };
 819
 820         pinctrl_ndsr4_default: ndsr4_default {
 821                 function = "NDSR4";
 822                 groups = "NDSR4";
 823         };
 824
 825         pinctrl_ndtr1_default: ndtr1_default {
 826                 function = "NDTR1";
 827                 groups = "NDTR1";
 828         };
 829
 830         pinctrl_ndtr2_default: ndtr2_default {
 831                 function = "NDTR2";
 832                 groups = "NDTR2";
 833         };
 834
 835         pinctrl_ndtr3_default: ndtr3_default {
 836                 function = "NDTR3";
 837                 groups = "NDTR3";
 838         };
 839
 840         pinctrl_ndtr4_default: ndtr4_default {
 841                 function = "NDTR4";
 842                 groups = "NDTR4";
 843         };
 844
 845         pinctrl_ndts4_default: ndts4_default {
 846                 function = "NDTS4";
 847                 groups = "NDTS4";
 848         };
 849
 850         pinctrl_nri1_default: nri1_default {
 851                 function = "NRI1";
 852                 groups = "NRI1";
 853         };
 854
 855         pinctrl_nri2_default: nri2_default {
 856                 function = "NRI2";
 857                 groups = "NRI2";
 858         };
 859
 860         pinctrl_nri3_default: nri3_default {
 861                 function = "NRI3";
 862                 groups = "NRI3";
 863         };
 864
 865         pinctrl_nri4_default: nri4_default {
 866                 function = "NRI4";
 867                 groups = "NRI4";
 868         };
 869
 870         pinctrl_nrts1_default: nrts1_default {
 871                 function = "NRTS1";
 872                 groups = "NRTS1";
 873         };
 874
 875         pinctrl_nrts2_default: nrts2_default {
 876                 function = "NRTS2";
 877                 groups = "NRTS2";
 878         };
 879
 880         pinctrl_nrts3_default: nrts3_default {
 881                 function = "NRTS3";
 882                 groups = "NRTS3";
 883         };
 884
 885         pinctrl_oscclk_default: oscclk_default {
 886                 function = "OSCCLK";
 887                 groups = "OSCCLK";
 888         };
 889
 890         pinctrl_pwm0_default: pwm0_default {
 891                 function = "PWM0";
 892                 groups = "PWM0";
 893         };
 894
 895         pinctrl_pwm1_default: pwm1_default {
 896                 function = "PWM1";
 897                 groups = "PWM1";
 898         };
 899
 900         pinctrl_pwm2_default: pwm2_default {
 901                 function = "PWM2";
 902                 groups = "PWM2";
 903         };
 904
 905         pinctrl_pwm3_default: pwm3_default {
 906                 function = "PWM3";
 907                 groups = "PWM3";
 908         };
 909
 910         pinctrl_pwm4_default: pwm4_default {
 911                 function = "PWM4";
 912                 groups = "PWM4";
 913         };
 914
 915         pinctrl_pwm5_default: pwm5_default {
 916                 function = "PWM5";
 917                 groups = "PWM5";
 918         };
 919
 920         pinctrl_pwm6_default: pwm6_default {
 921                 function = "PWM6";
 922                 groups = "PWM6";
 923         };
 924
 925         pinctrl_pwm7_default: pwm7_default {
 926                 function = "PWM7";
 927                 groups = "PWM7";
 928         };
 929
 930         pinctrl_rgmii1_default: rgmii1_default {
 931                 function = "RGMII1";
 932                 groups = "RGMII1";
 933         };
 934
 935         pinctrl_rgmii2_default: rgmii2_default {
 936                 function = "RGMII2";
 937                 groups = "RGMII2";
 938         };
 939
 940         pinctrl_rmii1_default: rmii1_default {
 941                 function = "RMII1";
 942                 groups = "RMII1";
 943         };
 944
 945         pinctrl_rmii2_default: rmii2_default {
 946                 function = "RMII2";
 947                 groups = "RMII2";
 948         };
 949
 950         pinctrl_rom16_default: rom16_default {
 951                 function = "ROM16";
 952                 groups = "ROM16";
 953         };
 954
 955         pinctrl_rom8_default: rom8_default {
 956                 function = "ROM8";
 957                 groups = "ROM8";
 958         };
 959
 960         pinctrl_romcs1_default: romcs1_default {
 961                 function = "ROMCS1";
 962                 groups = "ROMCS1";
 963         };
 964
 965         pinctrl_romcs2_default: romcs2_default {
 966                 function = "ROMCS2";
 967                 groups = "ROMCS2";
 968         };
 969
 970         pinctrl_romcs3_default: romcs3_default {
 971                 function = "ROMCS3";
 972                 groups = "ROMCS3";
 973         };
 974
 975         pinctrl_romcs4_default: romcs4_default {
 976                 function = "ROMCS4";
 977                 groups = "ROMCS4";
 978         };
 979
 980         pinctrl_rxd1_default: rxd1_default {
 981                 function = "RXD1";
 982                 groups = "RXD1";
 983         };
 984
 985         pinctrl_rxd2_default: rxd2_default {
 986                 function = "RXD2";
 987                 groups = "RXD2";
 988         };
 989
 990         pinctrl_rxd3_default: rxd3_default {
 991                 function = "RXD3";
 992                 groups = "RXD3";
 993         };
 994
 995         pinctrl_rxd4_default: rxd4_default {
 996                 function = "RXD4";
 997                 groups = "RXD4";
 998         };
 999
1000         pinctrl_salt1_default: salt1_default {
1001                 function = "SALT1";
1002                 groups = "SALT1";
1003         };
1004
1005         pinctrl_salt2_default: salt2_default {
1006                 function = "SALT2";
1007                 groups = "SALT2";
1008         };
1009
1010         pinctrl_salt3_default: salt3_default {
1011                 function = "SALT3";
1012                 groups = "SALT3";
1013         };
1014
1015         pinctrl_salt4_default: salt4_default {
1016                 function = "SALT4";
1017                 groups = "SALT4";
1018         };
1019
1020         pinctrl_sd1_default: sd1_default {
1021                 function = "SD1";
1022                 groups = "SD1";
1023         };
1024
1025         pinctrl_sd2_default: sd2_default {
1026                 function = "SD2";
1027                 groups = "SD2";
1028         };
1029
1030         pinctrl_sgpmck_default: sgpmck_default {
1031                 function = "SGPMCK";
1032                 groups = "SGPMCK";
1033         };
1034
1035         pinctrl_sgpmi_default: sgpmi_default {
1036                 function = "SGPMI";
1037                 groups = "SGPMI";
1038         };
1039
1040         pinctrl_sgpmld_default: sgpmld_default {
1041                 function = "SGPMLD";
1042                 groups = "SGPMLD";
1043         };
1044
1045         pinctrl_sgpmo_default: sgpmo_default {
1046                 function = "SGPMO";
1047                 groups = "SGPMO";
1048         };
1049
1050         pinctrl_sgpsck_default: sgpsck_default {
1051                 function = "SGPSCK";
1052                 groups = "SGPSCK";
1053         };
1054
1055         pinctrl_sgpsi0_default: sgpsi0_default {
1056                 function = "SGPSI0";
1057                 groups = "SGPSI0";
1058         };
1059
1060         pinctrl_sgpsi1_default: sgpsi1_default {
1061                 function = "SGPSI1";
1062                 groups = "SGPSI1";
1063         };
1064
1065         pinctrl_sgpsld_default: sgpsld_default {
1066                 function = "SGPSLD";
1067                 groups = "SGPSLD";
1068         };
1069
1070         pinctrl_sioonctrl_default: sioonctrl_default {
1071                 function = "SIOONCTRL";
1072                 groups = "SIOONCTRL";
1073         };
1074
1075         pinctrl_siopbi_default: siopbi_default {
1076                 function = "SIOPBI";
1077                 groups = "SIOPBI";
1078         };
1079
1080         pinctrl_siopbo_default: siopbo_default {
1081                 function = "SIOPBO";
1082                 groups = "SIOPBO";
1083         };
1084
1085         pinctrl_siopwreq_default: siopwreq_default {
1086                 function = "SIOPWREQ";
1087                 groups = "SIOPWREQ";
1088         };
1089
1090         pinctrl_siopwrgd_default: siopwrgd_default {
1091                 function = "SIOPWRGD";
1092                 groups = "SIOPWRGD";
1093         };
1094
1095         pinctrl_sios3_default: sios3_default {
1096                 function = "SIOS3";
1097                 groups = "SIOS3";
1098         };
1099
1100         pinctrl_sios5_default: sios5_default {
1101                 function = "SIOS5";
1102                 groups = "SIOS5";
1103         };
1104
1105         pinctrl_siosci_default: siosci_default {
1106                 function = "SIOSCI";
1107                 groups = "SIOSCI";
1108         };
1109
1110         pinctrl_spi1_default: spi1_default {
1111                 function = "SPI1";
1112                 groups = "SPI1";
1113         };
1114
1115         pinctrl_spi1debug_default: spi1debug_default {
1116                 function = "SPI1DEBUG";
1117                 groups = "SPI1DEBUG";
1118         };
1119
1120         pinctrl_spi1passthru_default: spi1passthru_default {
1121                 function = "SPI1PASSTHRU";
1122                 groups = "SPI1PASSTHRU";
1123         };
1124
1125         pinctrl_spics1_default: spics1_default {
1126                 function = "SPICS1";
1127                 groups = "SPICS1";
1128         };
1129
1130         pinctrl_timer3_default: timer3_default {
1131                 function = "TIMER3";
1132                 groups = "TIMER3";
1133         };
1134
1135         pinctrl_timer4_default: timer4_default {
1136                 function = "TIMER4";
1137                 groups = "TIMER4";
1138         };
1139
1140         pinctrl_timer5_default: timer5_default {
1141                 function = "TIMER5";
1142                 groups = "TIMER5";
1143         };
1144
1145         pinctrl_timer6_default: timer6_default {
1146                 function = "TIMER6";
1147                 groups = "TIMER6";
1148         };
1149
1150         pinctrl_timer7_default: timer7_default {
1151                 function = "TIMER7";
1152                 groups = "TIMER7";
1153         };
1154
1155         pinctrl_timer8_default: timer8_default {
1156                 function = "TIMER8";
1157                 groups = "TIMER8";
1158         };
1159
1160         pinctrl_txd1_default: txd1_default {
1161                 function = "TXD1";
1162                 groups = "TXD1";
1163         };
1164
1165         pinctrl_txd2_default: txd2_default {
1166                 function = "TXD2";
1167                 groups = "TXD2";
1168         };
1169
1170         pinctrl_txd3_default: txd3_default {
1171                 function = "TXD3";
1172                 groups = "TXD3";
1173         };
1174
1175         pinctrl_txd4_default: txd4_default {
1176                 function = "TXD4";
1177                 groups = "TXD4";
1178         };
1179
1180         pinctrl_uart6_default: uart6_default {
1181                 function = "UART6";
1182                 groups = "UART6";
1183         };
1184
1185         pinctrl_usbcki_default: usbcki_default {
1186                 function = "USBCKI";
1187                 groups = "USBCKI";
1188         };
1189
1190         pinctrl_vgabios_rom_default: vgabios_rom_default {
1191                 function = "VGABIOS_ROM";
1192                 groups = "VGABIOS_ROM";
1193         };
1194
1195         pinctrl_vgahs_default: vgahs_default {
1196                 function = "VGAHS";
1197                 groups = "VGAHS";
1198         };
1199
1200         pinctrl_vgavs_default: vgavs_default {
1201                 function = "VGAVS";
1202                 groups = "VGAVS";
1203         };
1204
1205         pinctrl_vpi18_default: vpi18_default {
1206                 function = "VPI18";
1207                 groups = "VPI18";
1208         };
1209
1210         pinctrl_vpi24_default: vpi24_default {
1211                 function = "VPI24";
1212                 groups = "VPI24";
1213         };
1214
1215         pinctrl_vpi30_default: vpi30_default {
1216                 function = "VPI30";
1217                 groups = "VPI30";
1218         };
1219
1220         pinctrl_vpo12_default: vpo12_default {
1221                 function = "VPO12";
1222                 groups = "VPO12";
1223         };
1224
1225         pinctrl_vpo24_default: vpo24_default {
1226                 function = "VPO24";
1227                 groups = "VPO24";
1228         };
1229
1230         pinctrl_wdtrst1_default: wdtrst1_default {
1231                 function = "WDTRST1";
1232                 groups = "WDTRST1";
1233         };
1234
1235         pinctrl_wdtrst2_default: wdtrst2_default {
1236                 function = "WDTRST2";
1237                 groups = "WDTRST2";
1238         };
1239 };