1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2400";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm926ej-s";
46 device_type = "memory";
51 compatible = "simple-bus";
57 reg = < 0x1e620000 0x94
58 0x20000000 0x10000000 >;
61 compatible = "aspeed,ast2400-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
72 compatible = "jedec,spi-nor";
77 compatible = "jedec,spi-nor";
82 compatible = "jedec,spi-nor";
87 compatible = "jedec,spi-nor";
93 reg = < 0x1e630000 0x18
94 0x30000000 0x10000000 >;
97 compatible = "aspeed,ast2400-spi";
98 clocks = <&syscon ASPEED_CLK_AHB>;
102 compatible = "jedec,spi-nor";
107 vic: interrupt-controller@1e6c0080 {
108 compatible = "aspeed,ast2400-vic";
109 interrupt-controller;
110 #interrupt-cells = <1>;
111 valid-sources = <0xffffffff 0x0007ffff>;
112 reg = <0x1e6c0080 0x80>;
115 cvic: copro-interrupt-controller@1e6c2000 {
116 compatible = "aspeed,ast2400-cvic", "aspeed-cvic";
117 valid-sources = <0x7fffffff>;
118 reg = <0x1e6c2000 0x80>;
121 mac0: ethernet@1e660000 {
122 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
123 reg = <0x1e660000 0x180>;
125 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
129 mac1: ethernet@1e680000 {
130 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
131 reg = <0x1e680000 0x180>;
133 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
137 ehci0: usb@1e6a1000 {
138 compatible = "aspeed,ast2400-ehci", "generic-ehci";
139 reg = <0x1e6a1000 0x100>;
141 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_usb2h_default>;
148 compatible = "aspeed,ast2400-uhci", "generic-uhci";
149 reg = <0x1e6b0000 0x100>;
152 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
155 * No default pinmux, it will follow EHCI, use an explicit pinmux
156 * override if you don't enable EHCI
160 vhub: usb-vhub@1e6a0000 {
161 compatible = "aspeed,ast2400-usb-vhub";
162 reg = <0x1e6a0000 0x300>;
164 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usb2d_default>;
171 compatible = "simple-bus";
172 #address-cells = <1>;
176 syscon: syscon@1e6e2000 {
177 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
178 reg = <0x1e6e2000 0x1a8>;
179 #address-cells = <1>;
185 compatible = "aspeed,g4-pinctrl";
189 compatible = "aspeed,ast2400-p2a-ctrl";
194 rng: hwrng@1e6e2078 {
195 compatible = "timeriomem_rng";
196 reg = <0x1e6e2078 0x4>;
202 compatible = "aspeed,ast2400-adc";
203 reg = <0x1e6e9000 0xb0>;
204 clocks = <&syscon ASPEED_CLK_APB>;
205 resets = <&syscon ASPEED_RESET_ADC>;
206 #io-channel-cells = <1>;
210 sram: sram@1e720000 {
211 compatible = "mmio-sram";
212 reg = <0x1e720000 0x8000>; // 32K
215 sdmmc: sd-controller@1e740000 {
216 compatible = "aspeed,ast2400-sd-controller";
217 reg = <0x1e740000 0x100>;
218 #address-cells = <1>;
220 ranges = <0 0x1e740000 0x10000>;
221 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
225 compatible = "aspeed,ast2400-sdhci";
229 clocks = <&syscon ASPEED_CLK_SDIO>;
234 compatible = "aspeed,ast2400-sdhci";
238 clocks = <&syscon ASPEED_CLK_SDIO>;
243 gpio: gpio@1e780000 {
246 compatible = "aspeed,ast2400-gpio";
247 reg = <0x1e780000 0x1000>;
249 gpio-ranges = <&pinctrl 0 0 220>;
250 clocks = <&syscon ASPEED_CLK_APB>;
251 interrupt-controller;
252 #interrupt-cells = <2>;
255 timer: timer@1e782000 {
256 /* This timer is a Faraday FTTMR010 derivative */
257 compatible = "aspeed,ast2400-timer";
258 reg = <0x1e782000 0x90>;
259 interrupts = <16 17 18 35 36 37 38 39>;
260 clocks = <&syscon ASPEED_CLK_APB>;
261 clock-names = "PCLK";
265 compatible = "aspeed,ast2400-rtc";
266 reg = <0x1e781000 0x18>;
270 uart1: serial@1e783000 {
271 compatible = "ns16550a";
272 reg = <0x1e783000 0x20>;
275 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
276 resets = <&lpc_reset 4>;
281 uart5: serial@1e784000 {
282 compatible = "ns16550a";
283 reg = <0x1e784000 0x20>;
286 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
291 wdt1: watchdog@1e785000 {
292 compatible = "aspeed,ast2400-wdt";
293 reg = <0x1e785000 0x1c>;
294 clocks = <&syscon ASPEED_CLK_APB>;
297 wdt2: watchdog@1e785020 {
298 compatible = "aspeed,ast2400-wdt";
299 reg = <0x1e785020 0x1c>;
300 clocks = <&syscon ASPEED_CLK_APB>;
303 pwm_tacho: pwm-tacho-controller@1e786000 {
304 compatible = "aspeed,ast2400-pwm-tacho";
305 #address-cells = <1>;
307 reg = <0x1e786000 0x1000>;
308 clocks = <&syscon ASPEED_CLK_24M>;
309 resets = <&syscon ASPEED_RESET_PWM>;
313 vuart: serial@1e787000 {
314 compatible = "aspeed,ast2400-vuart";
315 reg = <0x1e787000 0x40>;
318 clocks = <&syscon ASPEED_CLK_APB>;
324 compatible = "aspeed,ast2400-lpc", "simple-mfd";
325 reg = <0x1e789000 0x1000>;
327 #address-cells = <1>;
329 ranges = <0x0 0x1e789000 0x1000>;
332 compatible = "aspeed,ast2400-lpc-bmc";
336 lpc_host: lpc-host@80 {
337 compatible = "aspeed,ast2400-lpc-host", "simple-mfd", "syscon";
341 #address-cells = <1>;
343 ranges = <0x0 0x80 0x1e0>;
345 lpc_ctrl: lpc-ctrl@0 {
346 compatible = "aspeed,ast2400-lpc-ctrl";
348 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
352 lpc_snoop: lpc-snoop@0 {
353 compatible = "aspeed,ast2400-lpc-snoop";
360 compatible = "aspeed,ast2400-lhc";
361 reg = <0x20 0x24 0x48 0x8>;
364 lpc_reset: reset-controller@18 {
365 compatible = "aspeed,ast2400-lpc-reset";
371 compatible = "aspeed,ast2400-ibt-bmc";
379 uart2: serial@1e78d000 {
380 compatible = "ns16550a";
381 reg = <0x1e78d000 0x20>;
384 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
385 resets = <&lpc_reset 5>;
390 uart3: serial@1e78e000 {
391 compatible = "ns16550a";
392 reg = <0x1e78e000 0x20>;
395 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
396 resets = <&lpc_reset 6>;
401 uart4: serial@1e78f000 {
402 compatible = "ns16550a";
403 reg = <0x1e78f000 0x20>;
406 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
407 resets = <&lpc_reset 7>;
413 compatible = "simple-bus";
414 #address-cells = <1>;
416 ranges = <0 0x1e78a000 0x1000>;
423 i2c_ic: interrupt-controller@0 {
424 #interrupt-cells = <1>;
425 compatible = "aspeed,ast2400-i2c-ic";
428 interrupt-controller;
432 #address-cells = <1>;
434 #interrupt-cells = <1>;
437 compatible = "aspeed,ast2400-i2c-bus";
438 clocks = <&syscon ASPEED_CLK_APB>;
439 resets = <&syscon ASPEED_RESET_I2C>;
440 bus-frequency = <100000>;
442 interrupt-parent = <&i2c_ic>;
444 /* Does not need pinctrl properties */
448 #address-cells = <1>;
450 #interrupt-cells = <1>;
453 compatible = "aspeed,ast2400-i2c-bus";
454 clocks = <&syscon ASPEED_CLK_APB>;
455 resets = <&syscon ASPEED_RESET_I2C>;
456 bus-frequency = <100000>;
458 interrupt-parent = <&i2c_ic>;
460 /* Does not need pinctrl properties */
464 #address-cells = <1>;
466 #interrupt-cells = <1>;
469 compatible = "aspeed,ast2400-i2c-bus";
470 clocks = <&syscon ASPEED_CLK_APB>;
471 resets = <&syscon ASPEED_RESET_I2C>;
472 bus-frequency = <100000>;
474 interrupt-parent = <&i2c_ic>;
475 pinctrl-names = "default";
476 pinctrl-0 = <&pinctrl_i2c3_default>;
481 #address-cells = <1>;
483 #interrupt-cells = <1>;
486 compatible = "aspeed,ast2400-i2c-bus";
487 clocks = <&syscon ASPEED_CLK_APB>;
488 resets = <&syscon ASPEED_RESET_I2C>;
489 bus-frequency = <100000>;
491 interrupt-parent = <&i2c_ic>;
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_i2c4_default>;
498 #address-cells = <1>;
500 #interrupt-cells = <1>;
503 compatible = "aspeed,ast2400-i2c-bus";
504 clocks = <&syscon ASPEED_CLK_APB>;
505 resets = <&syscon ASPEED_RESET_I2C>;
506 bus-frequency = <100000>;
508 interrupt-parent = <&i2c_ic>;
509 pinctrl-names = "default";
510 pinctrl-0 = <&pinctrl_i2c5_default>;
515 #address-cells = <1>;
517 #interrupt-cells = <1>;
520 compatible = "aspeed,ast2400-i2c-bus";
521 clocks = <&syscon ASPEED_CLK_APB>;
522 resets = <&syscon ASPEED_RESET_I2C>;
523 bus-frequency = <100000>;
525 interrupt-parent = <&i2c_ic>;
526 pinctrl-names = "default";
527 pinctrl-0 = <&pinctrl_i2c6_default>;
532 #address-cells = <1>;
534 #interrupt-cells = <1>;
537 compatible = "aspeed,ast2400-i2c-bus";
538 clocks = <&syscon ASPEED_CLK_APB>;
539 resets = <&syscon ASPEED_RESET_I2C>;
540 bus-frequency = <100000>;
542 interrupt-parent = <&i2c_ic>;
543 pinctrl-names = "default";
544 pinctrl-0 = <&pinctrl_i2c7_default>;
549 #address-cells = <1>;
551 #interrupt-cells = <1>;
554 compatible = "aspeed,ast2400-i2c-bus";
555 clocks = <&syscon ASPEED_CLK_APB>;
556 resets = <&syscon ASPEED_RESET_I2C>;
557 bus-frequency = <100000>;
559 interrupt-parent = <&i2c_ic>;
560 pinctrl-names = "default";
561 pinctrl-0 = <&pinctrl_i2c8_default>;
566 #address-cells = <1>;
568 #interrupt-cells = <1>;
571 compatible = "aspeed,ast2400-i2c-bus";
572 clocks = <&syscon ASPEED_CLK_APB>;
573 resets = <&syscon ASPEED_RESET_I2C>;
574 bus-frequency = <100000>;
576 interrupt-parent = <&i2c_ic>;
577 pinctrl-names = "default";
578 pinctrl-0 = <&pinctrl_i2c9_default>;
583 #address-cells = <1>;
585 #interrupt-cells = <1>;
588 compatible = "aspeed,ast2400-i2c-bus";
589 clocks = <&syscon ASPEED_CLK_APB>;
590 resets = <&syscon ASPEED_RESET_I2C>;
591 bus-frequency = <100000>;
593 interrupt-parent = <&i2c_ic>;
594 pinctrl-names = "default";
595 pinctrl-0 = <&pinctrl_i2c10_default>;
600 #address-cells = <1>;
602 #interrupt-cells = <1>;
605 compatible = "aspeed,ast2400-i2c-bus";
606 clocks = <&syscon ASPEED_CLK_APB>;
607 resets = <&syscon ASPEED_RESET_I2C>;
608 bus-frequency = <100000>;
610 interrupt-parent = <&i2c_ic>;
611 pinctrl-names = "default";
612 pinctrl-0 = <&pinctrl_i2c11_default>;
617 #address-cells = <1>;
619 #interrupt-cells = <1>;
622 compatible = "aspeed,ast2400-i2c-bus";
623 clocks = <&syscon ASPEED_CLK_APB>;
624 resets = <&syscon ASPEED_RESET_I2C>;
625 bus-frequency = <100000>;
627 interrupt-parent = <&i2c_ic>;
628 pinctrl-names = "default";
629 pinctrl-0 = <&pinctrl_i2c12_default>;
634 #address-cells = <1>;
636 #interrupt-cells = <1>;
639 compatible = "aspeed,ast2400-i2c-bus";
640 clocks = <&syscon ASPEED_CLK_APB>;
641 resets = <&syscon ASPEED_RESET_I2C>;
642 bus-frequency = <100000>;
644 interrupt-parent = <&i2c_ic>;
645 pinctrl-names = "default";
646 pinctrl-0 = <&pinctrl_i2c13_default>;
651 #address-cells = <1>;
653 #interrupt-cells = <1>;
656 compatible = "aspeed,ast2400-i2c-bus";
657 clocks = <&syscon ASPEED_CLK_APB>;
658 resets = <&syscon ASPEED_RESET_I2C>;
659 bus-frequency = <100000>;
661 interrupt-parent = <&i2c_ic>;
662 pinctrl-names = "default";
663 pinctrl-0 = <&pinctrl_i2c14_default>;
669 pinctrl_acpi_default: acpi_default {
674 pinctrl_adc0_default: adc0_default {
679 pinctrl_adc1_default: adc1_default {
684 pinctrl_adc10_default: adc10_default {
689 pinctrl_adc11_default: adc11_default {
694 pinctrl_adc12_default: adc12_default {
699 pinctrl_adc13_default: adc13_default {
704 pinctrl_adc14_default: adc14_default {
709 pinctrl_adc15_default: adc15_default {
714 pinctrl_adc2_default: adc2_default {
719 pinctrl_adc3_default: adc3_default {
724 pinctrl_adc4_default: adc4_default {
729 pinctrl_adc5_default: adc5_default {
734 pinctrl_adc6_default: adc6_default {
739 pinctrl_adc7_default: adc7_default {
744 pinctrl_adc8_default: adc8_default {
749 pinctrl_adc9_default: adc9_default {
754 pinctrl_bmcint_default: bmcint_default {
759 pinctrl_ddcclk_default: ddcclk_default {
764 pinctrl_ddcdat_default: ddcdat_default {
769 pinctrl_extrst_default: extrst_default {
774 pinctrl_flack_default: flack_default {
779 pinctrl_flbusy_default: flbusy_default {
784 pinctrl_flwp_default: flwp_default {
789 pinctrl_gpid_default: gpid_default {
794 pinctrl_gpid0_default: gpid0_default {
799 pinctrl_gpid2_default: gpid2_default {
804 pinctrl_gpid4_default: gpid4_default {
809 pinctrl_gpid6_default: gpid6_default {
814 pinctrl_gpie0_default: gpie0_default {
819 pinctrl_gpie2_default: gpie2_default {
824 pinctrl_gpie4_default: gpie4_default {
829 pinctrl_gpie6_default: gpie6_default {
834 pinctrl_i2c10_default: i2c10_default {
839 pinctrl_i2c11_default: i2c11_default {
844 pinctrl_i2c12_default: i2c12_default {
849 pinctrl_i2c13_default: i2c13_default {
854 pinctrl_i2c14_default: i2c14_default {
859 pinctrl_i2c3_default: i2c3_default {
864 pinctrl_i2c4_default: i2c4_default {
869 pinctrl_i2c5_default: i2c5_default {
874 pinctrl_i2c6_default: i2c6_default {
879 pinctrl_i2c7_default: i2c7_default {
884 pinctrl_i2c8_default: i2c8_default {
889 pinctrl_i2c9_default: i2c9_default {
894 pinctrl_lpcpd_default: lpcpd_default {
899 pinctrl_lpcpme_default: lpcpme_default {
904 pinctrl_lpcrst_default: lpcrst_default {
909 pinctrl_lpcsmi_default: lpcsmi_default {
914 pinctrl_mac1link_default: mac1link_default {
915 function = "MAC1LINK";
919 pinctrl_mac2link_default: mac2link_default {
920 function = "MAC2LINK";
924 pinctrl_mdio1_default: mdio1_default {
929 pinctrl_mdio2_default: mdio2_default {
934 pinctrl_ncts1_default: ncts1_default {
939 pinctrl_ncts2_default: ncts2_default {
944 pinctrl_ncts3_default: ncts3_default {
949 pinctrl_ncts4_default: ncts4_default {
954 pinctrl_ndcd1_default: ndcd1_default {
959 pinctrl_ndcd2_default: ndcd2_default {
964 pinctrl_ndcd3_default: ndcd3_default {
969 pinctrl_ndcd4_default: ndcd4_default {
974 pinctrl_ndsr1_default: ndsr1_default {
979 pinctrl_ndsr2_default: ndsr2_default {
984 pinctrl_ndsr3_default: ndsr3_default {
989 pinctrl_ndsr4_default: ndsr4_default {
994 pinctrl_ndtr1_default: ndtr1_default {
999 pinctrl_ndtr2_default: ndtr2_default {
1004 pinctrl_ndtr3_default: ndtr3_default {
1009 pinctrl_ndtr4_default: ndtr4_default {
1014 pinctrl_ndts4_default: ndts4_default {
1019 pinctrl_nri1_default: nri1_default {
1024 pinctrl_nri2_default: nri2_default {
1029 pinctrl_nri3_default: nri3_default {
1034 pinctrl_nri4_default: nri4_default {
1039 pinctrl_nrts1_default: nrts1_default {
1044 pinctrl_nrts2_default: nrts2_default {
1049 pinctrl_nrts3_default: nrts3_default {
1054 pinctrl_oscclk_default: oscclk_default {
1055 function = "OSCCLK";
1059 pinctrl_pwm0_default: pwm0_default {
1064 pinctrl_pwm1_default: pwm1_default {
1069 pinctrl_pwm2_default: pwm2_default {
1074 pinctrl_pwm3_default: pwm3_default {
1079 pinctrl_pwm4_default: pwm4_default {
1084 pinctrl_pwm5_default: pwm5_default {
1089 pinctrl_pwm6_default: pwm6_default {
1094 pinctrl_pwm7_default: pwm7_default {
1099 pinctrl_rgmii1_default: rgmii1_default {
1100 function = "RGMII1";
1104 pinctrl_rgmii2_default: rgmii2_default {
1105 function = "RGMII2";
1109 pinctrl_rmii1_default: rmii1_default {
1114 pinctrl_rmii2_default: rmii2_default {
1119 pinctrl_rom16_default: rom16_default {
1124 pinctrl_rom8_default: rom8_default {
1129 pinctrl_romcs1_default: romcs1_default {
1130 function = "ROMCS1";
1134 pinctrl_romcs2_default: romcs2_default {
1135 function = "ROMCS2";
1139 pinctrl_romcs3_default: romcs3_default {
1140 function = "ROMCS3";
1144 pinctrl_romcs4_default: romcs4_default {
1145 function = "ROMCS4";
1149 pinctrl_rxd1_default: rxd1_default {
1154 pinctrl_rxd2_default: rxd2_default {
1159 pinctrl_rxd3_default: rxd3_default {
1164 pinctrl_rxd4_default: rxd4_default {
1169 pinctrl_salt1_default: salt1_default {
1174 pinctrl_salt2_default: salt2_default {
1179 pinctrl_salt3_default: salt3_default {
1184 pinctrl_salt4_default: salt4_default {
1189 pinctrl_sd1_default: sd1_default {
1194 pinctrl_sd2_default: sd2_default {
1199 pinctrl_sgpmck_default: sgpmck_default {
1200 function = "SGPMCK";
1204 pinctrl_sgpmi_default: sgpmi_default {
1209 pinctrl_sgpmld_default: sgpmld_default {
1210 function = "SGPMLD";
1214 pinctrl_sgpmo_default: sgpmo_default {
1219 pinctrl_sgpsck_default: sgpsck_default {
1220 function = "SGPSCK";
1224 pinctrl_sgpsi0_default: sgpsi0_default {
1225 function = "SGPSI0";
1229 pinctrl_sgpsi1_default: sgpsi1_default {
1230 function = "SGPSI1";
1234 pinctrl_sgpsld_default: sgpsld_default {
1235 function = "SGPSLD";
1239 pinctrl_sioonctrl_default: sioonctrl_default {
1240 function = "SIOONCTRL";
1241 groups = "SIOONCTRL";
1244 pinctrl_siopbi_default: siopbi_default {
1245 function = "SIOPBI";
1249 pinctrl_siopbo_default: siopbo_default {
1250 function = "SIOPBO";
1254 pinctrl_siopwreq_default: siopwreq_default {
1255 function = "SIOPWREQ";
1256 groups = "SIOPWREQ";
1259 pinctrl_siopwrgd_default: siopwrgd_default {
1260 function = "SIOPWRGD";
1261 groups = "SIOPWRGD";
1264 pinctrl_sios3_default: sios3_default {
1269 pinctrl_sios5_default: sios5_default {
1274 pinctrl_siosci_default: siosci_default {
1275 function = "SIOSCI";
1279 pinctrl_spi1_default: spi1_default {
1284 pinctrl_spi1debug_default: spi1debug_default {
1285 function = "SPI1DEBUG";
1286 groups = "SPI1DEBUG";
1289 pinctrl_spi1passthru_default: spi1passthru_default {
1290 function = "SPI1PASSTHRU";
1291 groups = "SPI1PASSTHRU";
1294 pinctrl_spics1_default: spics1_default {
1295 function = "SPICS1";
1299 pinctrl_timer3_default: timer3_default {
1300 function = "TIMER3";
1304 pinctrl_timer4_default: timer4_default {
1305 function = "TIMER4";
1309 pinctrl_timer5_default: timer5_default {
1310 function = "TIMER5";
1314 pinctrl_timer6_default: timer6_default {
1315 function = "TIMER6";
1319 pinctrl_timer7_default: timer7_default {
1320 function = "TIMER7";
1324 pinctrl_timer8_default: timer8_default {
1325 function = "TIMER8";
1329 pinctrl_txd1_default: txd1_default {
1334 pinctrl_txd2_default: txd2_default {
1339 pinctrl_txd3_default: txd3_default {
1344 pinctrl_txd4_default: txd4_default {
1349 pinctrl_uart6_default: uart6_default {
1354 pinctrl_usbcki_default: usbcki_default {
1355 function = "USBCKI";
1359 pinctrl_usb2h_default: usb2h_default {
1360 function = "USB2H1";
1364 pinctrl_usb2d_default: usb2d_default {
1365 function = "USB2D1";
1369 pinctrl_vgabios_rom_default: vgabios_rom_default {
1370 function = "VGABIOS_ROM";
1371 groups = "VGABIOS_ROM";
1374 pinctrl_vgahs_default: vgahs_default {
1379 pinctrl_vgavs_default: vgavs_default {
1384 pinctrl_vpi18_default: vpi18_default {
1389 pinctrl_vpi24_default: vpi24_default {
1394 pinctrl_vpi30_default: vpi30_default {
1399 pinctrl_vpo12_default: vpo12_default {
1404 pinctrl_vpo24_default: vpo24_default {
1409 pinctrl_wdtrst1_default: wdtrst1_default {
1410 function = "WDTRST1";
1414 pinctrl_wdtrst2_default: wdtrst2_default {
1415 function = "WDTRST2";