Merge tag 'pwm/for-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / aspeed-bmc-lenovo-hr630.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Device Tree file for Lenovo Hr630 platform
4  *
5  * Copyright (C) 2019-present Lenovo
6  */
7
8 /dts-v1/;
9
10 #include "aspeed-g5.dtsi"
11 #include <dt-bindings/gpio/aspeed-gpio.h>
12
13 / {
14         model = "HR630 BMC";
15         compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
16
17         aliases {
18                 i2c14 = &i2c_rbp;
19                 i2c15 = &i2c_fbp1;
20                 i2c16 = &i2c_fbp2;
21                 i2c17 = &i2c_fbp3;
22                 i2c18 = &i2c_riser2;
23                 i2c19 = &i2c_pcie4;
24                 i2c20 = &i2c_riser1;
25                 i2c21 = &i2c_ocp;
26         };
27
28         chosen {
29                 stdout-path = &uart5;
30                 bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
31         };
32
33         memory@80000000 {
34                 device_type = "memory";
35                 reg = <0x80000000 0x20000000>;
36         };
37
38         reserved-memory {
39                 #address-cells = <1>;
40                 #size-cells = <1>;
41                 ranges;
42
43                 flash_memory: region@98000000 {
44                         no-map;
45                         reg = <0x98000000 0x00100000>; /* 1M */
46                 };
47
48                 gfx_memory: framebuffer {
49                         size = <0x01000000>;
50                         alignment = <0x01000000>;
51                         compatible = "shared-dma-pool";
52                         reusable;
53                 };
54         };
55
56         leds {
57                 compatible = "gpio-leds";
58
59                 heartbeat {
60                         gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
61                 };
62
63                 fault {
64                         gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
65                 };
66         };
67
68         iio-hwmon {
69                 compatible = "iio-hwmon";
70                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
71                 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
72                 <&adc 8>, <&adc 9>, <&adc 10>,
73                 <&adc 12>, <&adc 13>, <&adc 14>;
74         };
75
76 };
77
78 &fmc {
79         status = "okay";
80         flash@0 {
81                 status = "okay";
82                 m25p,fast-read;
83                 label = "bmc";
84                 spi-max-frequency = <50000000>;
85 #include "openbmc-flash-layout.dtsi"
86         };
87 };
88
89 &lpc_ctrl {
90         status = "okay";
91         memory-region = <&flash_memory>;
92         flash = <&spi1>;
93 };
94
95 &uart1 {
96         status = "okay";
97         pinctrl-names = "default";
98         pinctrl-0 = <&pinctrl_txd1_default
99                         &pinctrl_rxd1_default>;
100 };
101
102 &uart2 {
103         /* Rear RS-232 connector */
104         status = "okay";
105         pinctrl-names = "default";
106         pinctrl-0 = <&pinctrl_txd2_default
107                         &pinctrl_rxd2_default
108                         &pinctrl_nrts2_default
109                         &pinctrl_ndtr2_default
110                         &pinctrl_ndsr2_default
111                         &pinctrl_ncts2_default
112                         &pinctrl_ndcd2_default
113                         &pinctrl_nri2_default>;
114 };
115
116 &uart3 {
117         status = "okay";
118         pinctrl-names = "default";
119         pinctrl-0 = <&pinctrl_txd3_default
120                         &pinctrl_rxd3_default>;
121 };
122
123 &uart5 {
124         status = "okay";
125 };
126
127 &ibt {
128         status = "okay";
129 };
130
131 &mac0 {
132         status = "okay";
133
134         pinctrl-names = "default";
135         pinctrl-0 = <&pinctrl_rmii1_default>;
136         use-ncsi;
137 };
138
139 &mac1 {
140         status = "okay";
141
142         pinctrl-names = "default";
143         pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
144 };
145
146 &adc {
147         status = "okay";
148
149         pinctrl-names = "default";
150         pinctrl-0 = <&pinctrl_adc0_default
151                         &pinctrl_adc1_default
152                         &pinctrl_adc2_default
153                         &pinctrl_adc3_default
154                         &pinctrl_adc4_default
155                         &pinctrl_adc5_default
156                         &pinctrl_adc6_default
157                         &pinctrl_adc7_default
158                         &pinctrl_adc8_default
159                         &pinctrl_adc9_default
160                         &pinctrl_adc10_default
161                         &pinctrl_adc12_default
162                         &pinctrl_adc13_default
163                         &pinctrl_adc14_default>;
164 };
165
166 &i2c0 {
167         status = "okay";
168         /* temp1 inlet */
169         tmp75@4e {
170                 compatible = "national,lm75";
171                 reg = <0x4e>;
172         };
173 };
174
175 &i2c1 {
176         status = "okay";
177         /* temp2 outlet */
178         tmp75@4d {
179                 compatible = "national,lm75";
180                 reg = <0x4d>;
181         };
182 };
183
184 &i2c2 {
185         status = "okay";
186 };
187
188 &i2c3 {
189         status = "okay";
190 };
191
192 &i2c4 {
193         status = "okay";
194 };
195
196 &i2c5 {
197         status = "okay";
198 };
199
200 &i2c6 {
201         status = "okay";
202         /*      Slot 0,
203          *      Slot 1,
204          *      Slot 2,
205          *      Slot 3
206          */
207
208         i2c-switch@70 {
209                 compatible = "nxp,pca9545";
210                 reg = <0x70>;
211                 #address-cells = <1>;
212                 #size-cells = <0>;
213                 i2c-mux-idle-disconnect;        /* may use mux@70 next. */
214
215                 i2c_rbp: i2c@0 {
216                         #address-cells = <1>;
217                         #size-cells = <0>;
218                         reg = <0>;
219                 };
220
221                 i2c_fbp1: i2c@1 {
222                         #address-cells = <1>;
223                         #size-cells = <0>;
224                         reg = <1>;
225                 };
226
227                 i2c_fbp2: i2c@2 {
228                         #address-cells = <1>;
229                         #size-cells = <0>;
230                         reg = <2>;
231                 };
232
233                 i2c_fbp3: i2c@3 {
234                         #address-cells = <1>;
235                         #size-cells = <0>;
236                         reg = <3>;
237                 };
238         };
239 };
240
241 &i2c7 {
242         status = "okay";
243
244         /*      Slot 0,
245          *      Slot 1,
246          *      Slot 2,
247          *      Slot 3
248          */
249         i2c-switch@76 {
250                 compatible = "nxp,pca9546";
251                 reg = <0x76>;
252                 #address-cells = <1>;
253                 #size-cells = <0>;
254                 i2c-mux-idle-disconnect;  /* may use mux@76 next. */
255
256                 i2c_riser2: i2c@0 {
257                         #address-cells = <1>;
258                         #size-cells = <0>;
259                         reg = <0>;
260                 };
261
262                 i2c_pcie4: i2c@1 {
263                         #address-cells = <1>;
264                         #size-cells = <0>;
265                         reg = <1>;
266                 };
267
268                 i2c_riser1: i2c@2 {
269                         #address-cells = <1>;
270                         #size-cells = <0>;
271                         reg = <2>;
272                 };
273
274                 i2c_ocp: i2c@3 {
275                         #address-cells = <1>;
276                         #size-cells = <0>;
277                         reg = <3>;
278                 };
279         };
280 };
281
282 &i2c8 {
283         status = "okay";
284
285         eeprom@57 {
286                 compatible = "atmel,24c256";
287                 reg = <0x57>;
288                 pagesize = <16>;
289         };
290 };
291
292 &i2c9 {
293         status = "okay";
294 };
295
296 &i2c10 {
297         status = "okay";
298 };
299
300 &i2c11 {
301         status = "okay";
302 };
303
304 &i2c12 {
305         status = "okay";
306 };
307
308 &ehci1 {
309         status = "okay";
310 };
311
312 &uhci {
313         status = "okay";
314 };
315
316 &gfx {
317         status = "okay";
318         memory-region = <&gfx_memory>;
319 };
320
321 &pwm_tacho {
322         status = "okay";
323         pinctrl-names = "default";
324         pinctrl-0 = <&pinctrl_pwm0_default
325         &pinctrl_pwm1_default
326         &pinctrl_pwm2_default
327         &pinctrl_pwm3_default
328         &pinctrl_pwm4_default
329         &pinctrl_pwm5_default
330         &pinctrl_pwm6_default>;
331
332         fan@0 {
333                 reg = <0x00>;
334                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
335         };
336
337         fan@1 {
338                 reg = <0x00>;
339                 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
340         };
341
342         fan@2 {
343                 reg = <0x01>;
344                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
345         };
346
347         fan@3 {
348                 reg = <0x01>;
349                 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
350         };
351
352         fan@4 {
353                 reg = <0x02>;
354                 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
355         };
356
357         fan@5 {
358                 reg = <0x02>;
359                 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
360         };
361
362         fan@6 {
363                 reg = <0x03>;
364                 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
365         };
366
367         fan@7 {
368                 reg = <0x03>;
369                 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
370         };
371
372         fan@8 {
373                 reg = <0x04>;
374                 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
375         };
376
377         fan@9 {
378                 reg = <0x04>;
379                 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
380         };
381
382         fan@10 {
383                 reg = <0x05>;
384                 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
385         };
386
387         fan@11 {
388                 reg = <0x05>;
389                 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
390         };
391
392         fan@12 {
393                 reg = <0x06>;
394                 aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
395         };
396
397         fan@13 {
398                 reg = <0x06>;
399                 aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
400         };
401 };
402
403 &gpio {
404
405         pin_gpio_b5 {
406                 gpio-hog;
407                 gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
408                 output-high;
409                 line-name = "IRQ_BMC_PCH_SMI_LPC_N";
410         };
411
412         pin_gpio_f0 {
413                 gpio-hog;
414                 gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
415                 output-low;
416                 line-name = "IRQ_BMC_PCH_NMI_R";
417         };
418
419         pin_gpio_f3 {
420                 gpio-hog;
421                 gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
422                 output-high;
423                 line-name = "I2C_BUS0_RST_OUT_N";
424         };
425
426         pin_gpio_f4 {
427                 gpio-hog;
428                 gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
429                 output-low;
430                 line-name = "FM_SKT0_FAULT_LED";
431         };
432
433         pin_gpio_f5 {
434                 gpio-hog;
435                 gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
436                 output-low;
437                 line-name = "FM_SKT1_FAULT_LED";
438         };
439
440         pin_gpio_g4 {
441                 gpio-hog;
442                 gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
443                 output-high;
444                 line-name = "FAN_PWR_CTL_N";
445         };
446
447         pin_gpio_g7 {
448                 gpio-hog;
449                 gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
450                 output-high;
451                 line-name = "RST_BMC_PCIE_I2CMUX_N";
452         };
453
454         pin_gpio_h2 {
455                 gpio-hog;
456                 gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
457                 output-high;
458                 line-name = "PSU1_FFS_N_R";
459         };
460
461         pin_gpio_h3 {
462                 gpio-hog;
463                 gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
464                 output-high;
465                 line-name = "PSU2_FFS_N_R";
466         };
467
468         pin_gpio_i3 {
469                 gpio-hog;
470                 gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
471                 output-high;
472                 line-name = "BMC_INTRUDED_COVER";
473         };
474
475         pin_gpio_j2 {
476                 gpio-hog;
477                 gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
478                 output-high;
479                 line-name = "BMC_BIOS_UPDATE_N";
480         };
481
482         pin_gpio_j3 {
483                 gpio-hog;
484                 gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
485                 output-high;
486                 line-name = "RST_BMC_HDD_I2CMUX_N";
487         };
488
489         pin_gpio_s2 {
490                 gpio-hog;
491                 gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
492                 output-high;
493                 line-name = "BMC_VGA_SW";
494         };
495
496         pin_gpio_s4 {
497                 gpio-hog;
498                 gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
499                 output;
500                 line-name = "VBAT_EN_N";
501         };
502
503         pin_gpio_s6 {
504                 gpio-hog;
505                 gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
506                 output-high;
507                 line-name = "PU_BMC_GPIOS6";
508         };
509
510         pin_gpio_y0 {
511                 gpio-hog;
512                 gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
513                 output-low;
514                 line-name = "BMC_NCSI_MUX_CTL_S0";
515         };
516
517         pin_gpio_y1 {
518                 gpio-hog;
519                 gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
520                 output-low;
521                 line-name = "BMC_NCSI_MUX_CTL_S1";
522         };
523
524         pin_gpio_z0 {
525                 gpio-hog;
526                 gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
527                 output-high;
528                 line-name = "I2C_RISER2_INT_N";
529         };
530
531         pin_gpio_z2 {
532                 gpio-hog;
533                 gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
534                 output-high;
535                 line-name = "I2C_RISER2_RESET_N";
536         };
537
538         pin_gpio_z3 {
539                 gpio-hog;
540                 gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
541                 output-high;
542                 line-name = "FM_BMC_PCH_SCI_LPC_N";
543         };
544
545         pin_gpio_z7 {
546                 gpio-hog;
547                 gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
548                 output-low;
549                 line-name = "BMC_POST_CMPLT_N";
550         };
551
552         pin_gpio_aa0 {
553                 gpio-hog;
554                 gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
555                 output-low;
556                 line-name = "HOST_BMC_USB_SEL";
557         };
558
559         pin_gpio_aa5 {
560                 gpio-hog;
561                 gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
562                 output-high;
563                 line-name = "I2C_BUS1_RST_OUT_N";
564         };
565
566 };