1 // SPDX-License-Identifier: GPL-2.0+
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
7 model = "Ampere Mt. Jade BMC";
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 bootargs = "console=ttyS4,115200 earlycon";
16 reg = <0x80000000 0x20000000>;
24 vga_memory: framebuffer@9f000000 {
26 reg = <0x9f000000 0x01000000>; /* 16M */
29 gfx_memory: framebuffer {
31 alignment = <0x01000000>;
32 compatible = "shared-dma-pool";
36 video_engine_memory: jpegbuffer {
37 size = <0x02000000>; /* 32M */
38 alignment = <0x01000000>;
39 compatible = "shared-dma-pool";
45 compatible = "gpio-leds";
48 gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
52 gpios = <&gpio ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>;
57 compatible = "gpio-keys";
60 label = "SHUTDOWN_ACK";
61 gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
62 linux,code = <ASPEED_GPIO(G, 2)>;
67 gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
68 linux,code = <ASPEED_GPIO(J, 3)>;
72 label = "S0_OVERTEMP";
73 gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
74 linux,code = <ASPEED_GPIO(G, 3)>;
78 label = "S0_HIGHTEMP";
79 gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
80 linux,code = <ASPEED_GPIO(J, 0)>;
84 label = "S0_CPU_FAULT";
85 gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
86 linux,code = <ASPEED_GPIO(J, 1)>;
90 label = "S1_OVERTEMP";
91 gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
92 linux,code = <ASPEED_GPIO(Z, 6)>;
96 label = "S1_HIGHTEMP";
97 gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
98 linux,code = <ASPEED_GPIO(AB, 0)>;
102 label = "S1_CPU_FAULT";
103 gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
104 linux,code = <ASPEED_GPIO(Z, 1)>;
109 gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
110 linux,code = <ASPEED_GPIO(Q, 5)>;
115 gpioA0mux: mux-controller {
116 compatible = "gpio-mux";
117 #mux-control-cells = <0>;
118 mux-gpios = <&gpio ASPEED_GPIO(A, 0) GPIO_ACTIVE_LOW>;
122 compatible = "io-channel-mux";
123 io-channels = <&adc 0>;
124 #io-channel-cells = <1>;
125 io-channel-names = "parent";
126 mux-controls = <&gpioA0mux>;
127 channels = "s0", "s1";
131 compatible = "io-channel-mux";
132 io-channels = <&adc 1>;
133 #io-channel-cells = <1>;
134 io-channel-names = "parent";
135 mux-controls = <&gpioA0mux>;
136 channels = "s0", "s1";
140 compatible = "io-channel-mux";
141 io-channels = <&adc 2>;
142 #io-channel-cells = <1>;
143 io-channel-names = "parent";
144 mux-controls = <&gpioA0mux>;
145 channels = "s0", "s1";
149 compatible = "io-channel-mux";
150 io-channels = <&adc 3>;
151 #io-channel-cells = <1>;
152 io-channel-names = "parent";
153 mux-controls = <&gpioA0mux>;
154 channels = "s0", "s1";
158 compatible = "io-channel-mux";
159 io-channels = <&adc 4>;
160 #io-channel-cells = <1>;
161 io-channel-names = "parent";
162 mux-controls = <&gpioA0mux>;
163 channels = "s0", "s1";
167 compatible = "io-channel-mux";
168 io-channels = <&adc 5>;
169 #io-channel-cells = <1>;
170 io-channel-names = "parent";
171 mux-controls = <&gpioA0mux>;
172 channels = "s0", "s1";
176 compatible = "io-channel-mux";
177 io-channels = <&adc 6>;
178 #io-channel-cells = <1>;
179 io-channel-names = "parent";
180 mux-controls = <&gpioA0mux>;
181 channels = "s0", "s1";
185 compatible = "io-channel-mux";
186 io-channels = <&adc 7>;
187 #io-channel-cells = <1>;
188 io-channel-names = "parent";
189 mux-controls = <&gpioA0mux>;
190 channels = "s0", "s1";
194 compatible = "io-channel-mux";
195 io-channels = <&adc 8>;
196 #io-channel-cells = <1>;
197 io-channel-names = "parent";
198 mux-controls = <&gpioA0mux>;
199 channels = "s0", "s1";
203 compatible = "io-channel-mux";
204 io-channels = <&adc 9>;
205 #io-channel-cells = <1>;
206 io-channel-names = "parent";
207 mux-controls = <&gpioA0mux>;
208 channels = "s0", "s1";
212 compatible = "io-channel-mux";
213 io-channels = <&adc 10>;
214 #io-channel-cells = <1>;
215 io-channel-names = "parent";
216 mux-controls = <&gpioA0mux>;
217 channels = "s0", "s1";
221 compatible = "io-channel-mux";
222 io-channels = <&adc 11>;
223 #io-channel-cells = <1>;
224 io-channel-names = "parent";
225 mux-controls = <&gpioA0mux>;
226 channels = "s0", "s1";
230 compatible = "io-channel-mux";
231 io-channels = <&adc 12>;
232 #io-channel-cells = <1>;
233 io-channel-names = "parent";
234 mux-controls = <&gpioA0mux>;
235 channels = "s0", "s1";
239 compatible = "io-channel-mux";
240 io-channels = <&adc 13>;
241 #io-channel-cells = <1>;
242 io-channel-names = "parent";
243 mux-controls = <&gpioA0mux>;
244 channels = "s0", "s1";
248 compatible = "iio-hwmon";
249 io-channels = <&adc0mux 0>, <&adc0mux 1>,
250 <&adc1mux 0>, <&adc1mux 1>,
251 <&adc2mux 0>, <&adc2mux 1>,
252 <&adc3mux 0>, <&adc3mux 1>,
253 <&adc4mux 0>, <&adc4mux 1>,
254 <&adc5mux 0>, <&adc5mux 1>,
255 <&adc6mux 0>, <&adc6mux 1>,
256 <&adc7mux 0>, <&adc7mux 1>,
257 <&adc8mux 0>, <&adc8mux 1>,
258 <&adc9mux 0>, <&adc9mux 1>,
259 <&adc10mux 0>, <&adc10mux 1>,
260 <&adc11mux 0>, <&adc11mux 1>,
261 <&adc12mux 0>, <&adc12mux 1>,
262 <&adc13mux 0>, <&adc13mux 1>;
266 compatible = "iio-hwmon";
267 io-channels = <&adc 14>;
271 compatible = "iio-hwmon";
272 io-channels = <&adc 15>;
282 /* spi-max-frequency = <50000000>; */
283 #include "openbmc-flash-layout.dtsi"
289 pinctrl-names = "default";
290 pinctrl-0 = <&pinctrl_spi1_default>;
296 /* spi-max-frequency = <100000000>; */
302 pinctrl-names = "default";
303 pinctrl-0 = <&pinctrl_txd1_default
304 &pinctrl_rxd1_default
305 &pinctrl_ncts1_default
306 &pinctrl_nrts1_default>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&pinctrl_txd2_default
313 &pinctrl_rxd2_default>;
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_txd3_default
320 &pinctrl_rxd3_default>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_txd4_default
327 &pinctrl_rxd4_default>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
356 compatible = "microchip,24c64", "atmel,24c64";
361 inlet_mem2: tmp175@28 {
362 compatible = "ti,tmp175";
366 inlet_cpu: tmp175@29 {
367 compatible = "ti,tmp175";
371 inlet_mem1: tmp175@2a {
372 compatible = "ti,tmp175";
376 outlet_cpu: tmp175@2b {
377 compatible = "ti,tmp175";
382 compatible = "ti,tmp175";
387 compatible = "ti,tmp175";
395 compatible = "nxp,pcf85063a";
407 compatible = "pmbus";
412 compatible = "pmbus";
431 memory-region = <&gfx_memory>;
435 aspeed,external-nodes = <&gfx &lhc>;
440 pinctrl-names = "default";
441 pinctrl-0 = <&pinctrl_pwm2_default &pinctrl_pwm3_default
442 &pinctrl_pwm4_default &pinctrl_pwm5_default
443 &pinctrl_pwm6_default &pinctrl_pwm7_default>;
447 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
452 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
457 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
462 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
467 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
472 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
477 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
482 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
487 aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
492 aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
497 aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
502 aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
517 memory-region = <&video_engine_memory>;
522 /*A0-A7*/ "","","","S0_BMC_SPECIAL_BOOT","","","","",
523 /*B0-B7*/ "BMC_SELECT_EEPROM","","","",
524 "POWER_BUTTON","","","",
525 /*C0-C7*/ "","","","","","","","",
526 /*D0-D7*/ "","","","","","","","",
527 /*E0-E7*/ "","","","","","","","",
528 /*F0-F7*/ "","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
530 /*G0-G7*/ "S0_FW_BOOT_OK","SHD_REQ_L","","S0_OVERTEMP_L","","",
532 /*H0-H7*/ "","","","","","","","",
533 /*I0-I7*/ "","","S1_BMC_SPECIAL_BOOT","","","","","",
534 /*J0-J7*/ "S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
536 /*K0-K7*/ "","","","","","","","",
537 /*L0-L7*/ "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
538 /*M0-M7*/ "","","","","","","","",
539 /*N0-N7*/ "","","","","","","","",
540 /*O0-O7*/ "","","","","","","","",
541 /*P0-P7*/ "","","","","","","","",
542 /*Q0-Q7*/ "","","","","","UID_BUTTON","","",
543 /*R0-R7*/ "","","BMC_EXT_HIGHTEMP_L","","","RESET_BUTTON","","",
544 /*S0-S7*/ "","","","","","","","",
545 /*T0-T7*/ "","","","","","","","",
546 /*U0-U7*/ "","","","","","","","",
547 /*V0-V7*/ "","","","","","","","",
548 /*W0-W7*/ "","","","","","","","",
549 /*X0-X7*/ "","","","","","","","",
550 /*Y0-Y7*/ "","","","","","","","",
551 /*Z0-Z7*/ "S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
552 "S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
553 /*AA0-AA7*/ "","","","","","","","",
554 /*AB0-AB7*/ "S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
555 "S1_BMC_DDR_ADR","","","","",
556 /*AC0-AC7*/ "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",