1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Marvell Armada 398 Development Board
5 * Copyright (C) 2015 Marvell
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include "armada-398.dtsi"
14 model = "Marvell Armada 398 Development Board";
15 compatible = "marvell,a398-db", "marvell,armada398", "marvell,armada390";
18 stdout-path = "serial0:115200n8";
22 device_type = "memory";
23 reg = <0x00000000 0x80000000>; /* 2 GB */
27 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
28 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
32 pinctrl-0 = <&i2c0_pins>;
33 pinctrl-names = "default";
35 clock-frequency = <100000>;
39 pinctrl-0 = <&uart0_pins>;
40 pinctrl-names = "default";
45 pinctrl-0 = <&uart1_pins>;
46 pinctrl-names = "default";
56 pinctrl-0 = <&nand_pins>;
57 pinctrl-names = "default";
59 marvell,nand-keep-config;
60 marvell,nand-enable-arbiter;
62 nand-ecc-strength = <8>;
63 nand-ecc-step-size = <512>;
71 reg = <0x800000 0x800000>;
75 reg = <0x1000000 0x3f000000>;
104 pinctrl-0 = <&spi1_pins>;
105 pinctrl-names = "default";
108 #address-cells = <1>;
110 compatible = "n25q128a13", "jedec,spi-nor";
112 spi-max-frequency = <108000000>;
120 label = "Filesystem";
121 reg = <0x400000 0x1000000>;