Merge tag 'iio-fixes-for-5.6a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23...
[linux-2.6-microblaze.git] / arch / arm / boot / dts / armada-38x.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Device Tree Include file for Marvell Armada 38x family of SoCs.
4  *
5  * Copyright (C) 2014 Marvell
6  *
7  * Lior Amsalem <alior@marvell.com>
8  * Gregory CLEMENT <gregory.clement@free-electrons.com>
9  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10  */
11
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14
15 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
16
17 / {
18         #address-cells = <1>;
19         #size-cells = <1>;
20
21         model = "Marvell Armada 38x family SoC";
22         compatible = "marvell,armada380";
23
24         aliases {
25                 gpio0 = &gpio0;
26                 gpio1 = &gpio1;
27                 serial0 = &uart0;
28                 serial1 = &uart1;
29         };
30
31         pmu {
32                 compatible = "arm,cortex-a9-pmu";
33                 interrupts-extended = <&mpic 3>;
34         };
35
36         soc {
37                 compatible = "marvell,armada380-mbus", "simple-bus";
38                 #address-cells = <2>;
39                 #size-cells = <1>;
40                 controller = <&mbusc>;
41                 interrupt-parent = <&gic>;
42                 pcie-mem-aperture = <0xe0000000 0x8000000>;
43                 pcie-io-aperture  = <0xe8000000 0x100000>;
44
45                 bootrom {
46                         compatible = "marvell,bootrom";
47                         reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
48                 };
49
50                 devbus_bootcs: devbus-bootcs {
51                         compatible = "marvell,mvebu-devbus";
52                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
53                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
54                         #address-cells = <1>;
55                         #size-cells = <1>;
56                         clocks = <&coreclk 0>;
57                         status = "disabled";
58                 };
59
60                 devbus_cs0: devbus-cs0 {
61                         compatible = "marvell,mvebu-devbus";
62                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
63                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
64                         #address-cells = <1>;
65                         #size-cells = <1>;
66                         clocks = <&coreclk 0>;
67                         status = "disabled";
68                 };
69
70                 devbus_cs1: devbus-cs1 {
71                         compatible = "marvell,mvebu-devbus";
72                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
73                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
74                         #address-cells = <1>;
75                         #size-cells = <1>;
76                         clocks = <&coreclk 0>;
77                         status = "disabled";
78                 };
79
80                 devbus_cs2: devbus-cs2 {
81                         compatible = "marvell,mvebu-devbus";
82                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
83                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
84                         #address-cells = <1>;
85                         #size-cells = <1>;
86                         clocks = <&coreclk 0>;
87                         status = "disabled";
88                 };
89
90                 devbus_cs3: devbus-cs3 {
91                         compatible = "marvell,mvebu-devbus";
92                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
93                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
94                         #address-cells = <1>;
95                         #size-cells = <1>;
96                         clocks = <&coreclk 0>;
97                         status = "disabled";
98                 };
99
100                 internal-regs {
101                         compatible = "simple-bus";
102                         #address-cells = <1>;
103                         #size-cells = <1>;
104                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
105
106                         sdramc: sdramc@1400 {
107                                 compatible = "marvell,armada-xp-sdram-controller";
108                                 reg = <0x1400 0x500>;
109                         };
110
111                         L2: cache-controller@8000 {
112                                 compatible = "arm,pl310-cache";
113                                 reg = <0x8000 0x1000>;
114                                 cache-unified;
115                                 cache-level = <2>;
116                                 arm,double-linefill-incr = <0>;
117                                 arm,double-linefill-wrap = <0>;
118                                 arm,double-linefill = <0>;
119                                 prefetch-data = <1>;
120                         };
121
122                         scu@c000 {
123                                 compatible = "arm,cortex-a9-scu";
124                                 reg = <0xc000 0x58>;
125                         };
126
127                         timer@c200 {
128                                 compatible = "arm,cortex-a9-global-timer";
129                                 reg = <0xc200 0x20>;
130                                 interrupts = <GIC_PPI 11 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
131                                 clocks = <&coreclk 2>;
132                         };
133
134                         timer@c600 {
135                                 compatible = "arm,cortex-a9-twd-timer";
136                                 reg = <0xc600 0x20>;
137                                 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
138                                 clocks = <&coreclk 2>;
139                         };
140
141                         gic: interrupt-controller@d000 {
142                                 compatible = "arm,cortex-a9-gic";
143                                 #interrupt-cells = <3>;
144                                 #size-cells = <0>;
145                                 interrupt-controller;
146                                 reg = <0xd000 0x1000>,
147                                       <0xc100 0x100>;
148                         };
149
150                         i2c0: i2c@11000 {
151                                 compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c";
152                                 reg = <0x11000 0x20>;
153                                 #address-cells = <1>;
154                                 #size-cells = <0>;
155                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
156                                 timeout-ms = <1000>;
157                                 clocks = <&coreclk 0>;
158                                 status = "disabled";
159                         };
160
161                         i2c1: i2c@11100 {
162                                 compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c";
163                                 reg = <0x11100 0x20>;
164                                 #address-cells = <1>;
165                                 #size-cells = <0>;
166                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
167                                 timeout-ms = <1000>;
168                                 clocks = <&coreclk 0>;
169                                 status = "disabled";
170                         };
171
172                         uart0: serial@12000 {
173                                 compatible = "marvell,armada-38x-uart";
174                                 reg = <0x12000 0x100>;
175                                 reg-shift = <2>;
176                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
177                                 reg-io-width = <1>;
178                                 clocks = <&coreclk 0>;
179                                 status = "disabled";
180                         };
181
182                         uart1: serial@12100 {
183                                 compatible = "marvell,armada-38x-uart";
184                                 reg = <0x12100 0x100>;
185                                 reg-shift = <2>;
186                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
187                                 reg-io-width = <1>;
188                                 clocks = <&coreclk 0>;
189                                 status = "disabled";
190                         };
191
192                         pinctrl: pinctrl@18000 {
193                                 reg = <0x18000 0x20>;
194
195                                 ge0_rgmii_pins: ge-rgmii-pins-0 {
196                                         marvell,pins = "mpp6", "mpp7", "mpp8",
197                                                        "mpp9", "mpp10", "mpp11",
198                                                        "mpp12", "mpp13", "mpp14",
199                                                        "mpp15", "mpp16", "mpp17";
200                                         marvell,function = "ge0";
201                                 };
202
203                                 ge1_rgmii_pins: ge-rgmii-pins-1 {
204                                         marvell,pins = "mpp21", "mpp27", "mpp28",
205                                                        "mpp29", "mpp30", "mpp31",
206                                                        "mpp32", "mpp37", "mpp38",
207                                                        "mpp39", "mpp40", "mpp41";
208                                         marvell,function = "ge1";
209                                 };
210
211                                 i2c0_pins: i2c-pins-0 {
212                                         marvell,pins = "mpp2", "mpp3";
213                                         marvell,function = "i2c0";
214                                 };
215
216                                 mdio_pins: mdio-pins {
217                                         marvell,pins = "mpp4", "mpp5";
218                                         marvell,function = "ge";
219                                 };
220
221                                 ref_clk0_pins: ref-clk-pins-0 {
222                                         marvell,pins = "mpp45";
223                                         marvell,function = "ref";
224                                 };
225
226                                 ref_clk1_pins: ref-clk-pins-1 {
227                                         marvell,pins = "mpp46";
228                                         marvell,function = "ref";
229                                 };
230
231                                 spi0_pins: spi-pins-0 {
232                                         marvell,pins = "mpp22", "mpp23", "mpp24",
233                                                        "mpp25";
234                                         marvell,function = "spi0";
235                                 };
236
237                                 spi1_pins: spi-pins-1 {
238                                         marvell,pins = "mpp56", "mpp57", "mpp58",
239                                                        "mpp59";
240                                         marvell,function = "spi1";
241                                 };
242
243                                 nand_pins: nand-pins {
244                                         marvell,pins = "mpp22", "mpp34", "mpp23",
245                                                        "mpp33", "mpp38", "mpp28",
246                                                        "mpp40", "mpp42", "mpp35",
247                                                        "mpp36", "mpp25", "mpp30",
248                                                        "mpp32";
249                                         marvell,function = "dev";
250                                 };
251
252                                 nand_rb: nand-rb {
253                                         marvell,pins = "mpp41";
254                                         marvell,function = "nand";
255                                 };
256
257                                 uart0_pins: uart-pins-0 {
258                                         marvell,pins = "mpp0", "mpp1";
259                                         marvell,function = "ua0";
260                                 };
261
262                                 uart1_pins: uart-pins-1 {
263                                         marvell,pins = "mpp19", "mpp20";
264                                         marvell,function = "ua1";
265                                 };
266
267                                 sdhci_pins: sdhci-pins {
268                                         marvell,pins = "mpp48", "mpp49", "mpp50",
269                                                        "mpp52", "mpp53", "mpp54",
270                                                        "mpp55", "mpp57", "mpp58",
271                                                        "mpp59";
272                                         marvell,function = "sd0";
273                                 };
274
275                                 sata0_pins: sata-pins-0 {
276                                         marvell,pins = "mpp20";
277                                         marvell,function = "sata0";
278                                 };
279
280                                 sata1_pins: sata-pins-1 {
281                                         marvell,pins = "mpp19";
282                                         marvell,function = "sata1";
283                                 };
284
285                                 sata2_pins: sata-pins-2 {
286                                         marvell,pins = "mpp47";
287                                         marvell,function = "sata2";
288                                 };
289
290                                 sata3_pins: sata-pins-3 {
291                                         marvell,pins = "mpp44";
292                                         marvell,function = "sata3";
293                                 };
294                         };
295
296                         gpio0: gpio@18100 {
297                                 compatible = "marvell,armada-370-gpio",
298                                              "marvell,orion-gpio";
299                                 reg = <0x18100 0x40>, <0x181c0 0x08>;
300                                 reg-names = "gpio", "pwm";
301                                 ngpios = <32>;
302                                 gpio-controller;
303                                 #gpio-cells = <2>;
304                                 #pwm-cells = <2>;
305                                 interrupt-controller;
306                                 #interrupt-cells = <2>;
307                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
308                                              <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
309                                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
310                                              <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
311                                 clocks = <&coreclk 0>;
312                         };
313
314                         gpio1: gpio@18140 {
315                                 compatible = "marvell,armada-370-gpio",
316                                              "marvell,orion-gpio";
317                                 reg = <0x18140 0x40>, <0x181c8 0x08>;
318                                 reg-names = "gpio", "pwm";
319                                 ngpios = <28>;
320                                 gpio-controller;
321                                 #gpio-cells = <2>;
322                                 #pwm-cells = <2>;
323                                 interrupt-controller;
324                                 #interrupt-cells = <2>;
325                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
326                                              <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
327                                              <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
328                                              <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
329                                 clocks = <&coreclk 0>;
330                         };
331
332                         systemc: system-controller@18200 {
333                                 compatible = "marvell,armada-380-system-controller",
334                                              "marvell,armada-370-xp-system-controller";
335                                 reg = <0x18200 0x100>;
336                         };
337
338                         gateclk: clock-gating-control@18220 {
339                                 compatible = "marvell,armada-380-gating-clock";
340                                 reg = <0x18220 0x4>;
341                                 clocks = <&coreclk 0>;
342                                 #clock-cells = <1>;
343                         };
344
345                         comphy: phy@18300 {
346                                 compatible = "marvell,armada-380-comphy";
347                                 reg = <0x18300 0x100>;
348                                 #address-cells = <1>;
349                                 #size-cells = <0>;
350
351                                 comphy0: phy@0 {
352                                         reg = <0>;
353                                         #phy-cells = <1>;
354                                 };
355
356                                 comphy1: phy@1 {
357                                         reg = <1>;
358                                         #phy-cells = <1>;
359                                 };
360
361                                 comphy2: phy@2 {
362                                         reg = <2>;
363                                         #phy-cells = <1>;
364                                 };
365
366                                 comphy3: phy@3 {
367                                         reg = <3>;
368                                         #phy-cells = <1>;
369                                 };
370
371                                 comphy4: phy@4 {
372                                         reg = <4>;
373                                         #phy-cells = <1>;
374                                 };
375
376                                 comphy5: phy@5 {
377                                         reg = <5>;
378                                         #phy-cells = <1>;
379                                 };
380                         };
381
382                         coreclk: mvebu-sar@18600 {
383                                 compatible = "marvell,armada-380-core-clock";
384                                 reg = <0x18600 0x04>;
385                                 #clock-cells = <1>;
386                         };
387
388                         mbusc: mbus-controller@20000 {
389                                 compatible = "marvell,mbus-controller";
390                                 reg = <0x20000 0x100>, <0x20180 0x20>,
391                                       <0x20250 0x8>;
392                         };
393
394                         mpic: interrupt-controller@20a00 {
395                                 compatible = "marvell,mpic";
396                                 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
397                                 #interrupt-cells = <1>;
398                                 #size-cells = <1>;
399                                 interrupt-controller;
400                                 msi-controller;
401                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
402                         };
403
404                         timer: timer@20300 {
405                                 compatible = "marvell,armada-380-timer",
406                                              "marvell,armada-xp-timer";
407                                 reg = <0x20300 0x30>, <0x21040 0x30>;
408                                 interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
409                                                       <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
410                                                       <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
411                                                       <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
412                                                       <&mpic 5>,
413                                                       <&mpic 6>;
414                                 clocks = <&coreclk 2>, <&refclk>;
415                                 clock-names = "nbclk", "fixed";
416                         };
417
418                         watchdog: watchdog@20300 {
419                                 compatible = "marvell,armada-380-wdt";
420                                 reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
421                                 clocks = <&coreclk 2>, <&refclk>;
422                                 clock-names = "nbclk", "fixed";
423                                 interrupts-extended = <&gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
424                                                       <&gic GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>;
425                         };
426
427                         cpurst: cpurst@20800 {
428                                 compatible = "marvell,armada-370-cpu-reset";
429                                 reg = <0x20800 0x10>;
430                         };
431
432                         mpcore-soc-ctrl@20d20 {
433                                 compatible = "marvell,armada-380-mpcore-soc-ctrl";
434                                 reg = <0x20d20 0x6c>;
435                         };
436
437                         coherencyfab: coherency-fabric@21010 {
438                                 compatible = "marvell,armada-380-coherency-fabric";
439                                 reg = <0x21010 0x1c>;
440                         };
441
442                         pmsu: pmsu@22000 {
443                                 compatible = "marvell,armada-380-pmsu";
444                                 reg = <0x22000 0x1000>;
445                         };
446
447                         /*
448                          * As a special exception to the "order by
449                          * register address" rule, the eth0 node is
450                          * placed here to ensure that it gets
451                          * registered as the first interface, since
452                          * the network subsystem doesn't allow naming
453                          * interfaces using DT aliases. Without this,
454                          * the ordering of interfaces is different
455                          * from the one used in U-Boot and the
456                          * labeling of interfaces on the boards, which
457                          * is very confusing for users.
458                          */
459                         eth0: ethernet@70000 {
460                                 compatible = "marvell,armada-370-neta";
461                                 reg = <0x70000 0x4000>;
462                                 interrupts-extended = <&mpic 8>;
463                                 clocks = <&gateclk 4>;
464                                 tx-csum-limit = <9800>;
465                                 status = "disabled";
466                         };
467
468                         eth1: ethernet@30000 {
469                                 compatible = "marvell,armada-370-neta";
470                                 reg = <0x30000 0x4000>;
471                                 interrupts-extended = <&mpic 10>;
472                                 clocks = <&gateclk 3>;
473                                 status = "disabled";
474                         };
475
476                         eth2: ethernet@34000 {
477                                 compatible = "marvell,armada-370-neta";
478                                 reg = <0x34000 0x4000>;
479                                 interrupts-extended = <&mpic 12>;
480                                 clocks = <&gateclk 2>;
481                                 status = "disabled";
482                         };
483
484                         usb0: usb@58000 {
485                                 compatible = "marvell,orion-ehci";
486                                 reg = <0x58000 0x500>;
487                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
488                                 clocks = <&gateclk 18>;
489                                 status = "disabled";
490                         };
491
492                         xor0: xor@60800 {
493                                 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
494                                 reg = <0x60800 0x100
495                                        0x60a00 0x100>;
496                                 clocks = <&gateclk 22>;
497                                 status = "okay";
498
499                                 xor00 {
500                                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
501                                         dmacap,memcpy;
502                                         dmacap,xor;
503                                 };
504                                 xor01 {
505                                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
506                                         dmacap,memcpy;
507                                         dmacap,xor;
508                                         dmacap,memset;
509                                 };
510                         };
511
512                         xor1: xor@60900 {
513                                 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
514                                 reg = <0x60900 0x100
515                                        0x60b00 0x100>;
516                                 clocks = <&gateclk 28>;
517                                 status = "okay";
518
519                                 xor10 {
520                                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
521                                         dmacap,memcpy;
522                                         dmacap,xor;
523                                 };
524                                 xor11 {
525                                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
526                                         dmacap,memcpy;
527                                         dmacap,xor;
528                                         dmacap,memset;
529                                 };
530                         };
531
532                         mdio: mdio@72004 {
533                                 #address-cells = <1>;
534                                 #size-cells = <0>;
535                                 compatible = "marvell,orion-mdio";
536                                 reg = <0x72004 0x4>;
537                                 clocks = <&gateclk 4>;
538                         };
539
540                         cesa: crypto@90000 {
541                                 compatible = "marvell,armada-38x-crypto";
542                                 reg = <0x90000 0x10000>;
543                                 reg-names = "regs";
544                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
545                                              <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
546                                 clocks = <&gateclk 23>, <&gateclk 21>,
547                                          <&gateclk 14>, <&gateclk 16>;
548                                 clock-names = "cesa0", "cesa1",
549                                               "cesaz0", "cesaz1";
550                                 marvell,crypto-srams = <&crypto_sram0>,
551                                                        <&crypto_sram1>;
552                                 marvell,crypto-sram-size = <0x800>;
553                         };
554
555                         rtc: rtc@a3800 {
556                                 compatible = "marvell,armada-380-rtc";
557                                 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
558                                 reg-names = "rtc", "rtc-soc";
559                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
560                         };
561
562                         ahci0: sata@a8000 {
563                                 compatible = "marvell,armada-380-ahci";
564                                 reg = <0xa8000 0x2000>;
565                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
566                                 clocks = <&gateclk 15>;
567                                 status = "disabled";
568                         };
569
570                         bm: bm@c8000 {
571                                 compatible = "marvell,armada-380-neta-bm";
572                                 reg = <0xc8000 0xac>;
573                                 clocks = <&gateclk 13>;
574                                 internal-mem = <&bm_bppi>;
575                                 status = "disabled";
576                         };
577
578                         ahci1: sata@e0000 {
579                                 compatible = "marvell,armada-380-ahci";
580                                 reg = <0xe0000 0x2000>;
581                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
582                                 clocks = <&gateclk 30>;
583                                 status = "disabled";
584                         };
585
586                         coredivclk: clock@e4250 {
587                                 compatible = "marvell,armada-380-corediv-clock";
588                                 reg = <0xe4250 0xc>;
589                                 #clock-cells = <1>;
590                                 clocks = <&mainpll>;
591                                 clock-output-names = "nand";
592                         };
593
594                         thermal: thermal@e8078 {
595                                 compatible = "marvell,armada380-thermal";
596                                 reg = <0xe4078 0x4>, <0xe4070 0x8>;
597                                 status = "okay";
598                         };
599
600                         nand_controller: nand-controller@d0000 {
601                                 compatible = "marvell,armada370-nand-controller";
602                                 reg = <0xd0000 0x54>;
603                                 #address-cells = <1>;
604                                 #size-cells = <0>;
605                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
606                                 clocks = <&coredivclk 0>;
607                                 status = "disabled";
608                         };
609
610                         sdhci: sdhci@d8000 {
611                                 compatible = "marvell,armada-380-sdhci";
612                                 reg-names = "sdhci", "mbus", "conf-sdio3";
613                                 reg = <0xd8000 0x1000>,
614                                         <0xdc000 0x100>,
615                                         <0x18454 0x4>;
616                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
617                                 clocks = <&gateclk 17>;
618                                 mrvl,clk-delay-cycles = <0x1F>;
619                                 status = "disabled";
620                         };
621
622                         usb3_0: usb3@f0000 {
623                                 compatible = "marvell,armada-380-xhci";
624                                 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
625                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
626                                 clocks = <&gateclk 9>;
627                                 status = "disabled";
628                         };
629
630                         usb3_1: usb3@f8000 {
631                                 compatible = "marvell,armada-380-xhci";
632                                 reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
633                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
634                                 clocks = <&gateclk 10>;
635                                 status = "disabled";
636                         };
637                 };
638
639                 crypto_sram0: sa-sram0 {
640                         compatible = "mmio-sram";
641                         reg = <MBUS_ID(0x09, 0x19) 0 0x800>;
642                         clocks = <&gateclk 23>;
643                         #address-cells = <1>;
644                         #size-cells = <1>;
645                         ranges = <0 MBUS_ID(0x09, 0x19) 0 0x800>;
646                 };
647
648                 crypto_sram1: sa-sram1 {
649                         compatible = "mmio-sram";
650                         reg = <MBUS_ID(0x09, 0x15) 0 0x800>;
651                         clocks = <&gateclk 21>;
652                         #address-cells = <1>;
653                         #size-cells = <1>;
654                         ranges = <0 MBUS_ID(0x09, 0x15) 0 0x800>;
655                 };
656
657                 bm_bppi: bm-bppi {
658                         compatible = "mmio-sram";
659                         reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
660                         ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
661                         #address-cells = <1>;
662                         #size-cells = <1>;
663                         clocks = <&gateclk 13>;
664                         no-memory-wc;
665                         status = "disabled";
666                 };
667
668                 spi0: spi@10600 {
669                         compatible = "marvell,armada-380-spi",
670                                         "marvell,orion-spi";
671                         reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
672                         #address-cells = <1>;
673                         #size-cells = <0>;
674                         cell-index = <0>;
675                         interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
676                         clocks = <&coreclk 0>;
677                         status = "disabled";
678                 };
679
680                 spi1: spi@10680 {
681                         compatible = "marvell,armada-380-spi",
682                                         "marvell,orion-spi";
683                         reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
684                         #address-cells = <1>;
685                         #size-cells = <0>;
686                         cell-index = <1>;
687                         interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
688                         clocks = <&coreclk 0>;
689                         status = "disabled";
690                 };
691         };
692
693         clocks {
694                 /* 1 GHz fixed main PLL */
695                 mainpll: mainpll {
696                         compatible = "fixed-clock";
697                         #clock-cells = <0>;
698                         clock-frequency = <1000000000>;
699                 };
700
701                 /* 25 MHz reference crystal */
702                 refclk: oscillator {
703                         compatible = "fixed-clock";
704                         #clock-cells = <0>;
705                         clock-frequency = <25000000>;
706                 };
707         };
708 };