2 * Copyright 2016 Linaro Ltd
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
29 compatible = "arm,realview-eb";
42 device_type = "memory";
43 /* 128 MiB memory @ 0x0 */
44 reg = <0x00000000 0x08000000>;
47 /* The voltage to the MMC card is hardwired at 3.3V */
48 vmmc: fixedregulator@0 {
49 compatible = "regulator-fixed";
50 regulator-name = "vmmc";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
56 xtal24mhz: xtal24mhz@24M {
58 compatible = "fixed-clock";
59 clock-frequency = <24000000>;
64 compatible = "fixed-factor-clock";
67 clocks = <&xtal24mhz>;
72 compatible = "fixed-factor-clock";
75 clocks = <&xtal24mhz>;
80 compatible = "fixed-factor-clock";
83 clocks = <&xtal24mhz>;
88 compatible = "fixed-factor-clock";
91 clocks = <&xtal24mhz>;
94 uartclk: uartclk@24M {
96 compatible = "fixed-factor-clock";
99 clocks = <&xtal24mhz>;
102 wdogclk: wdogclk@24M {
104 compatible = "fixed-factor-clock";
107 clocks = <&xtal24mhz>;
110 /* FIXME: this actually hangs off the PLL clocks */
113 compatible = "fixed-clock";
114 clock-frequency = <0>;
118 /* 2 * 32MiB NOR Flash memory */
119 compatible = "arm,versatile-flash", "cfi-flash";
120 reg = <0x40000000 0x04000000>;
123 compatible = "arm,arm-firmware-suite";
128 /* 2 * 32MiB NOR Flash memory */
129 compatible = "arm,versatile-flash", "cfi-flash";
130 reg = <0x44000000 0x04000000>;
133 compatible = "arm,arm-firmware-suite";
137 /* SMSC LAN91C111 ethernet with PHY and EEPROM */
138 ethernet: ethernet@4e000000 {
139 compatible = "smsc,lan91c111";
140 reg = <0x4e000000 0x10000>;
142 * This means the adapter can be accessed with 8, 16 or
143 * 32 bit reads/writes.
149 compatible = "nxp,usb-isp1761";
150 reg = <0x4f000000 0x20000>;
151 dr_mode = "peripheral";
155 compatible = "ti,ths8134a", "ti,ths8134";
156 #address-cells = <1>;
160 #address-cells = <1>;
166 vga_bridge_in: endpoint {
167 remote-endpoint = <&clcd_pads>;
174 vga_bridge_out: endpoint {
175 remote-endpoint = <&vga_con_in>;
182 compatible = "vga-connector";
185 vga_con_in: endpoint {
186 remote-endpoint = <&vga_bridge_out>;
191 /* These peripherals are inside the FPGA */
193 #address-cells = <1>;
195 compatible = "simple-bus";
198 syscon: syscon@10000000 {
199 compatible = "arm,realview-eb-syscon", "syscon", "simple-mfd";
200 reg = <0x10000000 0x1000>;
203 compatible = "register-bit-led";
206 label = "versatile:0";
207 linux,default-trigger = "heartbeat";
208 default-state = "on";
211 compatible = "register-bit-led";
214 label = "versatile:1";
215 linux,default-trigger = "mmc0";
216 default-state = "off";
219 compatible = "register-bit-led";
222 label = "versatile:2";
223 linux,default-trigger = "cpu0";
224 default-state = "off";
227 compatible = "register-bit-led";
230 label = "versatile:3";
231 default-state = "off";
234 compatible = "register-bit-led";
237 label = "versatile:4";
238 default-state = "off";
241 compatible = "register-bit-led";
244 label = "versatile:5";
245 default-state = "off";
248 compatible = "register-bit-led";
251 label = "versatile:6";
252 default-state = "off";
255 compatible = "register-bit-led";
258 label = "versatile:7";
259 default-state = "off";
262 compatible = "arm,syscon-icst307";
264 lock-offset = <0x20>;
266 clocks = <&xtal24mhz>;
269 compatible = "arm,syscon-icst307";
271 lock-offset = <0x20>;
273 clocks = <&xtal24mhz>;
276 compatible = "arm,syscon-icst307";
278 lock-offset = <0x20>;
280 clocks = <&xtal24mhz>;
283 compatible = "arm,syscon-icst307";
285 lock-offset = <0x20>;
287 clocks = <&xtal24mhz>;
290 compatible = "arm,syscon-icst307";
292 lock-offset = <0x20>;
294 clocks = <&xtal24mhz>;
299 #address-cells = <1>;
301 compatible = "arm,versatile-i2c";
302 reg = <0x10002000 0x1000>;
305 compatible = "dallas,ds1338";
310 aaci: aaci@10004000 {
311 compatible = "arm,pl041", "arm,primecell";
312 reg = <0x10004000 0x1000>;
314 clock-names = "apb_pclk";
317 mmc: mmcsd@10005000 {
318 compatible = "arm,pl18x", "arm,primecell";
319 reg = <0x10005000 0x1000>;
321 /* Due to frequent FIFO overruns, use just 500 kHz */
322 max-frequency = <500000>;
326 clocks = <&mclk>, <&pclk>;
327 clock-names = "mclk", "apb_pclk";
328 vmmc-supply = <&vmmc>;
329 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
330 wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
334 compatible = "arm,pl050", "arm,primecell";
335 reg = <0x10006000 0x1000>;
336 clocks = <&kmiclk>, <&pclk>;
337 clock-names = "KMIREFCLK", "apb_pclk";
341 compatible = "arm,pl050", "arm,primecell";
342 reg = <0x10007000 0x1000>;
343 clocks = <&kmiclk>, <&pclk>;
344 clock-names = "KMIREFCLK", "apb_pclk";
347 charlcd: fpga_charlcd: charlcd@10008000 {
348 compatible = "arm,versatile-lcd";
349 reg = <0x10008000 0x1000>;
351 clock-names = "apb_pclk";
354 serial0: serial@10009000 {
355 compatible = "arm,pl011", "arm,primecell";
356 reg = <0x10009000 0x1000>;
357 clocks = <&uartclk>, <&pclk>;
358 clock-names = "uartclk", "apb_pclk";
361 serial1: serial@1000a000 {
362 compatible = "arm,pl011", "arm,primecell";
363 reg = <0x1000a000 0x1000>;
364 clocks = <&uartclk>, <&pclk>;
365 clock-names = "uartclk", "apb_pclk";
368 serial2: serial@1000b000 {
369 compatible = "arm,pl011", "arm,primecell";
370 reg = <0x1000b000 0x1000>;
371 clocks = <&uartclk>, <&pclk>;
372 clock-names = "uartclk", "apb_pclk";
375 serial3: serial@1000c000 {
376 compatible = "arm,pl011", "arm,primecell";
377 reg = <0x1000c000 0x1000>;
378 clocks = <&uartclk>, <&pclk>;
379 clock-names = "uartclk", "apb_pclk";
383 compatible = "arm,pl022", "arm,primecell";
384 reg = <0x1000d000 0x1000>;
385 clocks = <&sspclk>, <&pclk>;
386 clock-names = "SSPCLK", "apb_pclk";
389 wdog: watchdog@10010000 {
390 compatible = "arm,sp805", "arm,primecell";
391 reg = <0x10010000 0x1000>;
392 clocks = <&wdogclk>, <&pclk>;
393 clock-names = "wdog_clk", "apb_pclk";
397 timer01: timer@10011000 {
398 compatible = "arm,sp804", "arm,primecell";
399 reg = <0x10011000 0x1000>;
400 clocks = <&timclk>, <&timclk>, <&pclk>;
401 clock-names = "timer1", "timer2", "apb_pclk";
404 timer23: timer@10012000 {
405 compatible = "arm,sp804", "arm,primecell";
406 reg = <0x10012000 0x1000>;
407 clocks = <&timclk>, <&timclk>, <&pclk>;
408 clock-names = "timer1", "timer2", "apb_pclk";
411 gpio0: gpio@10013000 {
412 compatible = "arm,pl061", "arm,primecell";
413 reg = <0x10013000 0x1000>;
416 interrupt-controller;
417 #interrupt-cells = <2>;
419 clock-names = "apb_pclk";
422 gpio1: gpio@10014000 {
423 compatible = "arm,pl061", "arm,primecell";
424 reg = <0x10014000 0x1000>;
427 interrupt-controller;
428 #interrupt-cells = <2>;
430 clock-names = "apb_pclk";
433 gpio2: gpio@10015000 {
434 compatible = "arm,pl061", "arm,primecell";
435 reg = <0x10015000 0x1000>;
438 interrupt-controller;
439 #interrupt-cells = <2>;
441 clock-names = "apb_pclk";
445 compatible = "arm,pl031", "arm,primecell";
446 reg = <0x10017000 0x1000>;
448 clock-names = "apb_pclk";
451 clcd: clcd@10020000 {
452 compatible = "arm,pl111", "arm,primecell";
453 reg = <0x10020000 0x1000>;
454 interrupt-names = "combined";
455 clocks = <&oscclk0>, <&pclk>;
456 clock-names = "clcdclk", "apb_pclk";
457 /* 1024x768 16bpp @65MHz works fine */
458 max-memory-bandwidth = <95000000>;
461 clcd_pads: endpoint {
462 remote-endpoint = <&vga_bridge_in>;
463 arm,pl11x,tft-r0g0b0-pads = <0 8 16>;