2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
13 #include "am4372.dtsi"
14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pwm/pwm.h>
17 #include <dt-bindings/sound/tlv320aic31xx-micbias.h>
20 model = "TI AM43x EPOS EVM";
21 compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43";
31 vmmcsd_fixed: fixedregulator-sd {
32 compatible = "regulator-fixed";
33 regulator-name = "vmmcsd_fixed";
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
39 vbat: fixedregulator0 {
40 compatible = "regulator-fixed";
41 regulator-name = "vbat";
42 regulator-min-microvolt = <5000000>;
43 regulator-max-microvolt = <5000000>;
48 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
52 clock-frequency = <33000000>;
64 pixelclk-active = <1>;
69 remote-endpoint = <&dpi_out>;
74 matrix_keypad: matrix_keypad0 {
75 compatible = "gpio-matrix-keypad";
76 debounce-delay-ms = <5>;
77 col-scan-delay-us = <2>;
78 pinctrl-names = "default", "sleep";
79 pinctrl-0 = <&matrix_keypad_default>;
80 pinctrl-1 = <&matrix_keypad_sleep>;
82 row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
83 &gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
84 &gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */
85 &gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */
87 col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */
88 &gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */
89 &gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */
90 &gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */
92 linux,keymap = <0x00000201 /* P1 */
95 0x0300020a /* NUMERIC_STAR */
103 0x0302020b /* NUMERIC_POUND */
105 0x0103006a /* RIGHT */
106 0x0203006c /* DOWN */
107 0x03030069>; /* LEFT */
111 compatible = "pwm-backlight";
112 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
113 brightness-levels = <0 51 53 56 62 75 101 152 255>;
114 default-brightness-level = <8>;
118 compatible = "simple-audio-card";
119 simple-audio-card,name = "AM43-EPOS-EVM";
120 simple-audio-card,widgets =
121 "Microphone", "Microphone Jack",
122 "Headphone", "Headphone Jack",
123 "Speaker", "Speaker";
124 simple-audio-card,routing =
125 "MIC1LP", "Microphone Jack",
126 "MIC1RP", "Microphone Jack",
129 "Headphone Jack", "HPL",
130 "Headphone Jack", "HPR",
133 simple-audio-card,format = "dsp_b";
134 simple-audio-card,bitclock-master = <&sound0_master>;
135 simple-audio-card,frame-master = <&sound0_master>;
136 simple-audio-card,bitclock-inversion;
138 simple-audio-card,cpu {
139 sound-dai = <&mcasp1>;
140 system-clock-frequency = <12000000>;
143 sound0_master: simple-audio-card,codec {
144 sound-dai = <&tlv320aic3111>;
145 system-clock-frequency = <12000000>;
151 pinctrl-names = "default";
152 pinctrl-0 = <&unused_pins>;
154 unused_pins: unused_pins {
155 pinctrl-single,pins = <
156 AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
157 AM4372_IOPAD(0x850, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
158 AM4372_IOPAD(0x858, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
159 AM4372_IOPAD(0x860, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
160 AM4372_IOPAD(0x864, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
161 AM4372_IOPAD(0x868, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
162 AM4372_IOPAD(0x86c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
163 AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
164 AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
165 AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
166 AM4372_IOPAD(0x920, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
167 AM4372_IOPAD(0x9e0, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
168 AM4372_IOPAD(0xA0c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
169 AM4372_IOPAD(0xA38, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
170 AM4372_IOPAD(0xA3c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
171 AM4372_IOPAD(0xA40, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
172 AM4372_IOPAD(0xA44, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
173 AM4372_IOPAD(0xA48, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
174 AM4372_IOPAD(0xA4c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
175 AM4372_IOPAD(0xA50, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
176 AM4372_IOPAD(0xA54, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
177 AM4372_IOPAD(0xA58, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
178 AM4372_IOPAD(0xA5c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
179 AM4372_IOPAD(0xA60, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
180 AM4372_IOPAD(0xA64, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
181 AM4372_IOPAD(0xA68, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
182 AM4372_IOPAD(0xA6C, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
183 AM4372_IOPAD(0xA74, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
184 AM4372_IOPAD(0xA78, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
188 cpsw_default: cpsw_default {
189 pinctrl-single,pins = <
191 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
192 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
193 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
194 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */
195 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
196 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
197 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
198 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
199 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
203 cpsw_sleep: cpsw_sleep {
204 pinctrl-single,pins = <
205 /* Slave 1 reset value */
206 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
207 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
208 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
209 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
210 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
211 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
212 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
213 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
214 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
218 davinci_mdio_default: davinci_mdio_default {
219 pinctrl-single,pins = <
221 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
222 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
226 davinci_mdio_sleep: davinci_mdio_sleep {
227 pinctrl-single,pins = <
228 /* MDIO reset value */
229 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
230 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
234 i2c0_pins: pinmux_i2c0_pins {
235 pinctrl-single,pins = <
236 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
237 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
241 nand_flash_x8_default: nand_flash_x8_default {
242 pinctrl-single,pins = <
243 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
244 AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
245 AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
246 AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
247 AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
248 AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
249 AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
250 AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
251 AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
252 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
253 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
254 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
255 AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
256 AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
257 AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
258 AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
262 nand_flash_x8_sleep: nand_flash_x8_sleep {
263 pinctrl-single,pins = <
264 AM4372_IOPAD(0x840, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
265 AM4372_IOPAD(0x800, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
266 AM4372_IOPAD(0x804, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
267 AM4372_IOPAD(0x808, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
268 AM4372_IOPAD(0x80c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
269 AM4372_IOPAD(0x810, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
270 AM4372_IOPAD(0x814, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
271 AM4372_IOPAD(0x818, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
272 AM4372_IOPAD(0x81c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
273 AM4372_IOPAD(0x870, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
274 AM4372_IOPAD(0x874, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
275 AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
276 AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
277 AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
278 AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
279 AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
283 ecap0_pins_default: backlight_pins_default {
284 pinctrl-single,pins = <
285 AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
289 ecap0_pins_sleep: backlight_pins_sleep {
290 pinctrl-single,pins = <
291 AM4372_IOPAD(0x964, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
295 i2c2_pins: pinmux_i2c2_pins {
296 pinctrl-single,pins = <
297 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
298 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl.i2c2_scl */
302 spi0_pins_default: pinmux_spi0_pins_default {
303 pinctrl-single,pins = <
304 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
305 AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
306 AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
307 AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
311 spi0_pins_sleep: pinmux_spi0_pins_sleep {
312 pinctrl-single,pins = <
313 AM4372_IOPAD(0x950, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
314 AM4372_IOPAD(0x954, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
315 AM4372_IOPAD(0x958, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
316 AM4372_IOPAD(0x95c, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
320 spi1_pins_default: pinmux_spi1_pins_default {
321 pinctrl-single,pins = <
322 AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
323 AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
324 AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
325 AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
329 spi1_pins_sleep: pinmux_spi1_pins_sleep {
330 pinctrl-single,pins = <
331 AM4372_IOPAD(0x990, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
332 AM4372_IOPAD(0x994, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
333 AM4372_IOPAD(0x998, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
334 AM4372_IOPAD(0x99c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
338 mmc1_pins_default: pinmux_mmc1_pins_default {
339 pinctrl-single,pins = <
340 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
344 mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
345 pinctrl-single,pins = <
346 AM4372_IOPAD(0x960, DS0_PIN_OUTPUT_PULLUP | PIN_INPUT | MUX_MODE7)
350 matrix_keypad_default: matrix_keypad_default {
351 pinctrl-single,pins = <
352 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* mii1_tx_clk.gpio3_9 */
353 AM4372_IOPAD(0x930, PIN_OUTPUT | MUX_MODE7) /* mii1_rx_clk.gpio3_10 */
354 AM4372_IOPAD(0x934, PIN_OUTPUT | MUX_MODE7) /* mii1_rxd3.gpio2_18 */
355 AM4372_IOPAD(0x938, PIN_OUTPUT | MUX_MODE7) /* mii1_rxd2.gpio2_19 */
356 AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
357 AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
358 AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.gpio0_14 */
359 AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.gpio0_15 */
363 matrix_keypad_sleep: matrix_keypad_sleep {
364 pinctrl-single,pins = <
365 AM4372_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE7)
366 AM4372_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE7)
367 AM4372_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE7)
368 AM4372_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE7)
369 AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)
370 AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7)
371 AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7)
372 AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7)
376 qspi1_pins_default: qspi1_pins_default {
377 pinctrl-single,pins = <
378 AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
379 AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
380 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
381 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
382 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
383 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
387 qspi1_pins_sleep: qspi1_pins_sleep {
388 pinctrl-single,pins = <
389 AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
390 AM4372_IOPAD(0x888, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
391 AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
392 AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
393 AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
394 AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
398 pixcir_ts_pins_default: pixcir_ts_pins_default {
399 pinctrl-single,pins = <
400 AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
404 pixcir_ts_pins_sleep: pixcir_ts_pins_sleep {
405 pinctrl-single,pins = <
406 AM4372_IOPAD(0x844, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
410 hdq_pins: pinmux_hdq_pins {
411 pinctrl-single,pins = <
412 AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
417 pinctrl-single,pins = <
418 AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
419 AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
420 AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
421 AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
422 AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
423 AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
424 AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
425 AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
426 AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
427 AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
428 AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
429 AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
430 AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
431 AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
432 AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
433 AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
434 AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
435 AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
436 AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
437 AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
438 AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
439 AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
440 AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
441 AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
442 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
443 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
444 AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
445 AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
449 display_mux_pins: display_mux_pins {
450 pinctrl-single,pins = <
451 /* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
452 AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
456 vpfe1_pins_default: vpfe1_pins_default {
457 pinctrl-single,pins = <
458 AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0 */
459 AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0 */
460 AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0 */
461 AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0 */
462 AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0 */
463 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0 */
464 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0 */
465 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0 */
466 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0 */
467 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0 */
468 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0 */
469 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0 */
470 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0 */
474 vpfe1_pins_sleep: vpfe1_pins_sleep {
475 pinctrl-single,pins = <
476 AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
477 AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
478 AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
479 AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
480 AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
481 AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
482 AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
483 AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
484 AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
485 AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
486 AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
487 AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
488 AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
492 uart0_pins_default: uart0_pins_default {
493 pinctrl-single,pins = <
494 AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
495 AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
496 AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
497 AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
501 uart0_pins_sleep: uart0_pins_sleep {
502 pinctrl-single,pins = <
503 AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
504 AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
505 AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
506 AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
510 usb2_phy1_default: usb2_phy1_default {
511 pinctrl-single,pins = <
512 AM4372_IOPAD(0xac0, PIN_INPUT_PULLDOWN | MUX_MODE0)
516 usb2_phy1_sleep: usb2_phy1_sleep {
517 pinctrl-single,pins = <
518 AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
522 usb2_phy2_default: usb2_phy2_default {
523 pinctrl-single,pins = <
524 AM4372_IOPAD(0xac4, PIN_INPUT_PULLDOWN | MUX_MODE0)
528 usb2_phy2_sleep: usb2_phy2_sleep {
529 pinctrl-single,pins = <
530 AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
534 mcasp1_pins: mcasp1_pins {
535 pinctrl-single,pins = <
536 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
537 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
538 AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
539 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
543 mcasp1_sleep_pins: mcasp1_sleep_pins {
544 pinctrl-single,pins = <
545 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
546 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
547 AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
548 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
555 vmmc-supply = <&vmmcsd_fixed>;
557 pinctrl-names = "default", "sleep";
558 pinctrl-0 = <&mmc1_pins_default>;
559 pinctrl-1 = <&mmc1_pins_sleep>;
560 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
564 pinctrl-names = "default", "sleep";
565 pinctrl-0 = <&cpsw_default>;
566 pinctrl-1 = <&cpsw_sleep>;
572 pinctrl-names = "default", "sleep";
573 pinctrl-0 = <&davinci_mdio_default>;
574 pinctrl-1 = <&davinci_mdio_sleep>;
579 phy_id = <&davinci_mdio>, <16>;
589 pinctrl-names = "default";
590 pinctrl-0 = <&i2c0_pins>;
591 clock-frequency = <400000>;
593 tps65218: tps65218@24 {
595 compatible = "ti,tps65218";
596 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
597 interrupt-controller;
598 #interrupt-cells = <2>;
600 dcdc1: regulator-dcdc1 {
601 regulator-name = "vdd_core";
602 regulator-min-microvolt = <912000>;
603 regulator-max-microvolt = <1144000>;
608 dcdc2: regulator-dcdc2 {
609 regulator-name = "vdd_mpu";
610 regulator-min-microvolt = <912000>;
611 regulator-max-microvolt = <1378000>;
616 dcdc3: regulator-dcdc3 {
617 regulator-name = "vdcdc3";
622 dcdc4: regulator-dcdc4 {
623 regulator-name = "vdcdc4";
624 regulator-min-microvolt = <3300000>;
625 regulator-max-microvolt = <3300000>;
630 dcdc5: regulator-dcdc5 {
631 regulator-name = "v1_0bat";
632 regulator-min-microvolt = <1000000>;
633 regulator-max-microvolt = <1000000>;
636 dcdc6: regulator-dcdc6 {
637 regulator-name = "v1_8bat";
638 regulator-min-microvolt = <1800000>;
639 regulator-max-microvolt = <1800000>;
642 ldo1: regulator-ldo1 {
643 regulator-min-microvolt = <1800000>;
644 regulator-max-microvolt = <1800000>;
651 compatible = "atmel,24c256";
657 compatible = "pixcir,pixcir_tangoc";
658 pinctrl-names = "default", "sleep";
659 pinctrl-0 = <&pixcir_ts_pins_default>;
660 pinctrl-1 = <&pixcir_ts_pins_sleep>;
663 interrupt-parent = <&gpio1>;
664 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
666 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
668 touchscreen-size-x = <1024>;
669 touchscreen-size-y = <600>;
672 tlv320aic3111: tlv320aic3111@18 {
673 #sound-dai-cells = <0>;
674 compatible = "ti,tlv320aic3111";
678 ai31xx-micbias-vg = <MICBIAS_2_0V>;
681 HPVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
682 SPRVDD-supply = <&vbat>; /* vbat */
683 SPLVDD-supply = <&vbat>; /* vbat */
684 AVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
685 IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
686 DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
691 pinctrl-names = "default";
692 pinctrl-0 = <&i2c2_pins>;
705 pinctrl-names = "default";
706 pinctrl-0 = <&display_mux_pins>;
711 * SelLCDorHDMI selects between display and audio paths:
712 * Low: HDMI display with audio via HDMI
713 * High: LCD display with analog audio via aic3111 codec
716 gpios = <1 GPIO_ACTIVE_HIGH>;
718 line-name = "SelLCDorHDMI";
731 status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
732 pinctrl-names = "default", "sleep";
733 pinctrl-0 = <&nand_flash_x8_default>;
734 pinctrl-1 = <&nand_flash_x8_sleep>;
735 ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
737 compatible = "ti,omap2-nand";
738 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
739 interrupt-parent = <&gpmc>;
740 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
741 <1 IRQ_TYPE_NONE>; /* termcount */
742 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
743 ti,nand-xfer-type = "prefetch-dma";
744 ti,nand-ecc-opt = "bch16";
746 nand-bus-width = <8>;
747 gpmc,device-width = <1>;
748 gpmc,sync-clk-ps = <0>;
750 gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
751 gpmc,cs-wr-off-ns = <40>;
752 gpmc,adv-on-ns = <0>; /* cs-on-ns */
753 gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
754 gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
755 gpmc,we-on-ns = <0>; /* cs-on-ns */
756 gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
757 gpmc,oe-on-ns = <3>; /* cs-on-ns + tRR + 2 */
758 gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
759 gpmc,access-ns = <30>; /* tCEA + 4*/
760 gpmc,rd-cycle-ns = <40>;
761 gpmc,wr-cycle-ns = <40>;
762 gpmc,bus-turnaround-ns = <0>;
763 gpmc,cycle2cycle-delay-ns = <0>;
764 gpmc,clk-activation-ns = <0>;
765 gpmc,wr-access-ns = <40>;
766 gpmc,wr-data-mux-bus-ns = <0>;
767 /* MTD partition table */
768 /* All SPL-* partitions are sized to minimal length
769 * which can be independently programmable. For
770 * NAND flash this is equal to size of erase-block */
771 #address-cells = <1>;
775 reg = <0x00000000 0x00040000>;
778 label = "NAND.SPL.backup1";
779 reg = <0x00040000 0x00040000>;
782 label = "NAND.SPL.backup2";
783 reg = <0x00080000 0x00040000>;
786 label = "NAND.SPL.backup3";
787 reg = <0x000C0000 0x00040000>;
790 label = "NAND.u-boot-spl-os";
791 reg = <0x00100000 0x00080000>;
794 label = "NAND.u-boot";
795 reg = <0x00180000 0x00100000>;
798 label = "NAND.u-boot-env";
799 reg = <0x00280000 0x00040000>;
802 label = "NAND.u-boot-env.backup1";
803 reg = <0x002C0000 0x00040000>;
806 label = "NAND.kernel";
807 reg = <0x00300000 0x00700000>;
810 label = "NAND.file-system";
811 reg = <0x00a00000 0x1f600000>;
824 ti,adc-channels = <0 1 2 3 4 5 6 7>;
830 pinctrl-names = "default", "sleep";
831 pinctrl-0 = <&ecap0_pins_default>;
832 pinctrl-1 = <&ecap0_pins_sleep>;
837 pinctrl-names = "default", "sleep";
838 pinctrl-0 = <&spi0_pins_default>;
839 pinctrl-1 = <&spi0_pins_sleep>;
844 pinctrl-names = "default", "sleep";
845 pinctrl-0 = <&spi1_pins_default>;
846 pinctrl-1 = <&spi1_pins_sleep>;
851 pinctrl-names = "default", "sleep";
852 pinctrl-0 = <&usb2_phy1_default>;
853 pinctrl-1 = <&usb2_phy1_sleep>;
857 dr_mode = "peripheral";
863 pinctrl-names = "default", "sleep";
864 pinctrl-0 = <&usb2_phy2_default>;
865 pinctrl-1 = <&usb2_phy2_sleep>;
874 status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */
875 pinctrl-names = "default", "sleep";
876 pinctrl-0 = <&qspi1_pins_default>;
877 pinctrl-1 = <&qspi1_pins_sleep>;
879 spi-max-frequency = <48000000>;
881 compatible = "mx66l51235l";
882 spi-max-frequency = <48000000>;
886 spi-tx-bus-width = <1>;
887 spi-rx-bus-width = <4>;
888 #address-cells = <1>;
891 /* MTD partition table.
892 * The ROM checks the first 512KiB
893 * for a valid file to boot(XIP).
896 label = "QSPI.U_BOOT";
897 reg = <0x00000000 0x000080000>;
900 label = "QSPI.U_BOOT.backup";
901 reg = <0x00080000 0x00080000>;
904 label = "QSPI.U-BOOT-SPL_OS";
905 reg = <0x00100000 0x00010000>;
908 label = "QSPI.U_BOOT_ENV";
909 reg = <0x00110000 0x00010000>;
912 label = "QSPI.U-BOOT-ENV.backup";
913 reg = <0x00120000 0x00010000>;
916 label = "QSPI.KERNEL";
917 reg = <0x00130000 0x0800000>;
920 label = "QSPI.FILESYSTEM";
921 reg = <0x00930000 0x36D0000>;
928 pinctrl-names = "default";
929 pinctrl-0 = <&hdq_pins>;
935 pinctrl-names = "default";
936 pinctrl-0 = <&dss_pins>;
940 remote-endpoint = <&lcd_in>;
948 pinctrl-names = "default", "sleep";
949 pinctrl-0 = <&vpfe1_pins_default>;
950 pinctrl-1 = <&vpfe1_pins_sleep>;
954 /* remote-endpoint = <&sensor>; add once we have it */
955 ti,am437x-vpfe-interface = <0>;
965 pinctrl-names = "default", "sleep";
966 pinctrl-0 = <&uart0_pins_default>;
967 pinctrl-1 = <&uart0_pins_sleep>;
971 #sound-dai-cells = <0>;
972 pinctrl-names = "default", "sleep";
973 pinctrl-0 = <&mcasp1_pins>;
974 pinctrl-1 = <&mcasp1_sleep_pins>;
978 op-mode = <0>; /* MCASP_IIS_MODE */
981 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
989 assigned-clocks = <&mux_synctimer32k_ck>;
990 assigned-clock-parents = <&clkdiv32k_ick>;