2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am4372", "ti,am43";
18 interrupt-parent = <&wakeupgen>;
31 ethernet0 = &cpsw_emac0;
32 ethernet1 = &cpsw_emac1;
39 compatible = "arm,cortex-a9";
43 clocks = <&dpll_mpu_ck>;
46 clock-latency = <300000>; /* From omap-cpufreq driver */
50 gic: interrupt-controller@48241000 {
51 compatible = "arm,cortex-a9-gic";
53 #interrupt-cells = <3>;
54 reg = <0x48241000 0x1000>,
56 interrupt-parent = <&gic>;
59 wakeupgen: interrupt-controller@48281000 {
60 compatible = "ti,omap4-wugen-mpu";
62 #interrupt-cells = <3>;
63 reg = <0x48281000 0x1000>;
64 interrupt-parent = <&gic>;
68 compatible = "arm,cortex-a9-scu";
69 reg = <0x48240000 0x100>;
72 global_timer: timer@48240200 {
73 compatible = "arm,cortex-a9-global-timer";
74 reg = <0x48240200 0x100>;
75 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
76 interrupt-parent = <&gic>;
77 clocks = <&dpll_mpu_m2_ck>;
80 local_timer: timer@48240600 {
81 compatible = "arm,cortex-a9-twd-timer";
82 reg = <0x48240600 0x100>;
83 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
84 interrupt-parent = <&gic>;
85 clocks = <&dpll_mpu_m2_ck>;
88 l2-cache-controller@48242000 {
89 compatible = "arm,pl310-cache";
90 reg = <0x48242000 0x1000>;
96 compatible = "ti,am4372-l3-noc", "simple-bus";
100 ti,hwmods = "l3_main";
101 reg = <0x44000000 0x400000
102 0x44800000 0x400000>;
103 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
104 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
106 l4_wkup: l4_wkup@44c00000 {
107 compatible = "ti,am4-l4-wkup", "simple-bus";
108 #address-cells = <1>;
110 ranges = <0 0x44c00000 0x287000>;
112 wkup_m3: wkup_m3@100000 {
113 compatible = "ti,am4372-wkup-m3";
114 reg = <0x100000 0x4000>,
116 reg-names = "umem", "dmem";
117 ti,hwmods = "wkup_m3";
118 ti,pm-firmware = "am335x-pm-firmware.elf";
122 compatible = "ti,am4-prcm";
123 reg = <0x1f0000 0x11000>;
125 prcm_clocks: clocks {
126 #address-cells = <1>;
130 prcm_clockdomains: clockdomains {
135 compatible = "ti,am4-scm", "simple-bus";
136 reg = <0x210000 0x4000>;
137 #address-cells = <1>;
139 ranges = <0 0x210000 0x4000>;
141 am43xx_pinmux: pinmux@800 {
142 compatible = "ti,am437-padconf",
145 #address-cells = <1>;
147 #interrupt-cells = <1>;
148 interrupt-controller;
149 pinctrl-single,register-width = <32>;
150 pinctrl-single,function-mask = <0xffffffff>;
153 scm_conf: scm_conf@0 {
154 compatible = "syscon";
156 #address-cells = <1>;
160 #address-cells = <1>;
165 wkup_m3_ipc: wkup_m3_ipc@1324 {
166 compatible = "ti,am4372-wkup-m3-ipc";
168 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
169 ti,rproc = <&wkup_m3>;
170 mboxes = <&mailbox &mbox_wkupm3>;
173 scm_clockdomains: clockdomains {
178 emif: emif@4c000000 {
179 compatible = "ti,emif-am4372";
180 reg = <0x4c000000 0x1000000>;
184 edma: edma@49000000 {
185 compatible = "ti,edma3";
186 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
187 reg = <0x49000000 0x10000>,
189 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
190 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
191 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
195 uart0: serial@44e09000 {
196 compatible = "ti,am4372-uart","ti,omap2-uart";
197 reg = <0x44e09000 0x2000>;
198 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
202 uart1: serial@48022000 {
203 compatible = "ti,am4372-uart","ti,omap2-uart";
204 reg = <0x48022000 0x2000>;
205 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
210 uart2: serial@48024000 {
211 compatible = "ti,am4372-uart","ti,omap2-uart";
212 reg = <0x48024000 0x2000>;
213 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
218 uart3: serial@481a6000 {
219 compatible = "ti,am4372-uart","ti,omap2-uart";
220 reg = <0x481a6000 0x2000>;
221 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
226 uart4: serial@481a8000 {
227 compatible = "ti,am4372-uart","ti,omap2-uart";
228 reg = <0x481a8000 0x2000>;
229 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
234 uart5: serial@481aa000 {
235 compatible = "ti,am4372-uart","ti,omap2-uart";
236 reg = <0x481aa000 0x2000>;
237 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
242 mailbox: mailbox@480C8000 {
243 compatible = "ti,omap4-mailbox";
244 reg = <0x480C8000 0x200>;
245 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
246 ti,hwmods = "mailbox";
248 ti,mbox-num-users = <4>;
249 ti,mbox-num-fifos = <8>;
250 mbox_wkupm3: wkup_m3 {
251 ti,mbox-tx = <0 0 0>;
252 ti,mbox-rx = <0 0 3>;
256 timer1: timer@44e31000 {
257 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
258 reg = <0x44e31000 0x400>;
259 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
261 ti,hwmods = "timer1";
264 timer2: timer@48040000 {
265 compatible = "ti,am4372-timer","ti,am335x-timer";
266 reg = <0x48040000 0x400>;
267 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
268 ti,hwmods = "timer2";
271 timer3: timer@48042000 {
272 compatible = "ti,am4372-timer","ti,am335x-timer";
273 reg = <0x48042000 0x400>;
274 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
275 ti,hwmods = "timer3";
279 timer4: timer@48044000 {
280 compatible = "ti,am4372-timer","ti,am335x-timer";
281 reg = <0x48044000 0x400>;
282 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
284 ti,hwmods = "timer4";
288 timer5: timer@48046000 {
289 compatible = "ti,am4372-timer","ti,am335x-timer";
290 reg = <0x48046000 0x400>;
291 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
293 ti,hwmods = "timer5";
297 timer6: timer@48048000 {
298 compatible = "ti,am4372-timer","ti,am335x-timer";
299 reg = <0x48048000 0x400>;
300 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
302 ti,hwmods = "timer6";
306 timer7: timer@4804a000 {
307 compatible = "ti,am4372-timer","ti,am335x-timer";
308 reg = <0x4804a000 0x400>;
309 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
311 ti,hwmods = "timer7";
315 timer8: timer@481c1000 {
316 compatible = "ti,am4372-timer","ti,am335x-timer";
317 reg = <0x481c1000 0x400>;
318 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
319 ti,hwmods = "timer8";
323 timer9: timer@4833d000 {
324 compatible = "ti,am4372-timer","ti,am335x-timer";
325 reg = <0x4833d000 0x400>;
326 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
327 ti,hwmods = "timer9";
331 timer10: timer@4833f000 {
332 compatible = "ti,am4372-timer","ti,am335x-timer";
333 reg = <0x4833f000 0x400>;
334 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
335 ti,hwmods = "timer10";
339 timer11: timer@48341000 {
340 compatible = "ti,am4372-timer","ti,am335x-timer";
341 reg = <0x48341000 0x400>;
342 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
343 ti,hwmods = "timer11";
347 counter32k: counter@44e86000 {
348 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
349 reg = <0x44e86000 0x40>;
350 ti,hwmods = "counter_32k";
354 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
356 reg = <0x44e3e000 0x1000>;
357 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
364 compatible = "ti,am4372-wdt","ti,omap3-wdt";
365 reg = <0x44e35000 0x1000>;
366 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
367 ti,hwmods = "wd_timer2";
370 gpio0: gpio@44e07000 {
371 compatible = "ti,am4372-gpio","ti,omap4-gpio";
372 reg = <0x44e07000 0x1000>;
373 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
376 interrupt-controller;
377 #interrupt-cells = <2>;
382 gpio1: gpio@4804c000 {
383 compatible = "ti,am4372-gpio","ti,omap4-gpio";
384 reg = <0x4804c000 0x1000>;
385 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
388 interrupt-controller;
389 #interrupt-cells = <2>;
394 gpio2: gpio@481ac000 {
395 compatible = "ti,am4372-gpio","ti,omap4-gpio";
396 reg = <0x481ac000 0x1000>;
397 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
400 interrupt-controller;
401 #interrupt-cells = <2>;
406 gpio3: gpio@481ae000 {
407 compatible = "ti,am4372-gpio","ti,omap4-gpio";
408 reg = <0x481ae000 0x1000>;
409 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
412 interrupt-controller;
413 #interrupt-cells = <2>;
418 gpio4: gpio@48320000 {
419 compatible = "ti,am4372-gpio","ti,omap4-gpio";
420 reg = <0x48320000 0x1000>;
421 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
424 interrupt-controller;
425 #interrupt-cells = <2>;
430 gpio5: gpio@48322000 {
431 compatible = "ti,am4372-gpio","ti,omap4-gpio";
432 reg = <0x48322000 0x1000>;
433 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
436 interrupt-controller;
437 #interrupt-cells = <2>;
442 hwspinlock: spinlock@480ca000 {
443 compatible = "ti,omap4-hwspinlock";
444 reg = <0x480ca000 0x1000>;
445 ti,hwmods = "spinlock";
450 compatible = "ti,am4372-i2c","ti,omap4-i2c";
451 reg = <0x44e0b000 0x1000>;
452 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
454 #address-cells = <1>;
460 compatible = "ti,am4372-i2c","ti,omap4-i2c";
461 reg = <0x4802a000 0x1000>;
462 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
464 #address-cells = <1>;
470 compatible = "ti,am4372-i2c","ti,omap4-i2c";
471 reg = <0x4819c000 0x1000>;
472 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
474 #address-cells = <1>;
480 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
481 reg = <0x48030000 0x400>;
482 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
484 #address-cells = <1>;
490 compatible = "ti,omap4-hsmmc";
491 reg = <0x48060000 0x1000>;
494 ti,needs-special-reset;
497 dma-names = "tx", "rx";
498 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
503 compatible = "ti,omap4-hsmmc";
504 reg = <0x481d8000 0x1000>;
506 ti,needs-special-reset;
509 dma-names = "tx", "rx";
510 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
515 compatible = "ti,omap4-hsmmc";
516 reg = <0x47810000 0x1000>;
518 ti,needs-special-reset;
519 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
524 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
525 reg = <0x481a0000 0x400>;
526 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
528 #address-cells = <1>;
534 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
535 reg = <0x481a2000 0x400>;
536 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
538 #address-cells = <1>;
544 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
545 reg = <0x481a4000 0x400>;
546 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
548 #address-cells = <1>;
554 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
555 reg = <0x48345000 0x400>;
556 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
558 #address-cells = <1>;
563 mac: ethernet@4a100000 {
564 compatible = "ti,am4372-cpsw","ti,cpsw";
565 reg = <0x4a100000 0x800
567 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
568 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
569 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
570 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
571 #address-cells = <1>;
573 ti,hwmods = "cpgmac0";
574 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
575 <&dpll_clksel_mac_clk>;
576 clock-names = "fck", "cpts", "50mclk";
577 assigned-clocks = <&dpll_clksel_mac_clk>;
578 assigned-clock-rates = <50000000>;
580 cpdma_channels = <8>;
581 ale_entries = <1024>;
582 bd_ram_size = <0x2000>;
585 mac_control = <0x20>;
588 cpts_clock_mult = <0x80000000>;
589 cpts_clock_shift = <29>;
592 davinci_mdio: mdio@4a101000 {
593 compatible = "ti,am4372-mdio","ti,davinci_mdio";
594 reg = <0x4a101000 0x100>;
595 #address-cells = <1>;
597 ti,hwmods = "davinci_mdio";
598 bus_freq = <1000000>;
602 cpsw_emac0: slave@4a100200 {
603 /* Filled in by U-Boot */
604 mac-address = [ 00 00 00 00 00 00 ];
607 cpsw_emac1: slave@4a100300 {
608 /* Filled in by U-Boot */
609 mac-address = [ 00 00 00 00 00 00 ];
612 phy_sel: cpsw-phy-sel@44e10650 {
613 compatible = "ti,am43xx-cpsw-phy-sel";
614 reg= <0x44e10650 0x4>;
615 reg-names = "gmii-sel";
619 epwmss0: epwmss@48300000 {
620 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
621 reg = <0x48300000 0x10>;
622 #address-cells = <1>;
625 ti,hwmods = "epwmss0";
628 ecap0: ecap@48300100 {
629 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
631 reg = <0x48300100 0x80>;
636 ehrpwm0: ehrpwm@48300200 {
637 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
639 reg = <0x48300200 0x80>;
640 ti,hwmods = "ehrpwm0";
645 epwmss1: epwmss@48302000 {
646 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
647 reg = <0x48302000 0x10>;
648 #address-cells = <1>;
651 ti,hwmods = "epwmss1";
654 ecap1: ecap@48302100 {
655 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
657 reg = <0x48302100 0x80>;
662 ehrpwm1: ehrpwm@48302200 {
663 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
665 reg = <0x48302200 0x80>;
666 ti,hwmods = "ehrpwm1";
671 epwmss2: epwmss@48304000 {
672 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
673 reg = <0x48304000 0x10>;
674 #address-cells = <1>;
677 ti,hwmods = "epwmss2";
680 ecap2: ecap@48304100 {
681 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
683 reg = <0x48304100 0x80>;
688 ehrpwm2: ehrpwm@48304200 {
689 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
691 reg = <0x48304200 0x80>;
692 ti,hwmods = "ehrpwm2";
697 epwmss3: epwmss@48306000 {
698 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
699 reg = <0x48306000 0x10>;
700 #address-cells = <1>;
703 ti,hwmods = "epwmss3";
706 ehrpwm3: ehrpwm@48306200 {
707 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
709 reg = <0x48306200 0x80>;
710 ti,hwmods = "ehrpwm3";
715 epwmss4: epwmss@48308000 {
716 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
717 reg = <0x48308000 0x10>;
718 #address-cells = <1>;
721 ti,hwmods = "epwmss4";
724 ehrpwm4: ehrpwm@48308200 {
725 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
727 reg = <0x48308200 0x80>;
728 ti,hwmods = "ehrpwm4";
733 epwmss5: epwmss@4830a000 {
734 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
735 reg = <0x4830a000 0x10>;
736 #address-cells = <1>;
739 ti,hwmods = "epwmss5";
742 ehrpwm5: ehrpwm@4830a200 {
743 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
745 reg = <0x4830a200 0x80>;
746 ti,hwmods = "ehrpwm5";
751 tscadc: tscadc@44e0d000 {
752 compatible = "ti,am3359-tscadc";
753 reg = <0x44e0d000 0x1000>;
754 ti,hwmods = "adc_tsc";
755 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
756 clocks = <&adc_tsc_fck>;
761 compatible = "ti,am3359-tsc";
765 #io-channel-cells = <1>;
766 compatible = "ti,am3359-adc";
771 sham: sham@53100000 {
772 compatible = "ti,omap5-sham";
774 reg = <0x53100000 0x300>;
777 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
781 compatible = "ti,omap4-aes";
783 reg = <0x53501000 0xa0>;
784 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
787 dma-names = "tx", "rx";
791 compatible = "ti,omap4-des";
793 reg = <0x53701000 0xa0>;
794 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
797 dma-names = "tx", "rx";
800 mcasp0: mcasp@48038000 {
801 compatible = "ti,am33xx-mcasp-audio";
802 ti,hwmods = "mcasp0";
803 reg = <0x48038000 0x2000>,
804 <0x46000000 0x400000>;
805 reg-names = "mpu", "dat";
806 interrupts = <80>, <81>;
807 interrupt-names = "tx", "rx";
811 dma-names = "tx", "rx";
814 mcasp1: mcasp@4803C000 {
815 compatible = "ti,am33xx-mcasp-audio";
816 ti,hwmods = "mcasp1";
817 reg = <0x4803C000 0x2000>,
818 <0x46400000 0x400000>;
819 reg-names = "mpu", "dat";
820 interrupts = <82>, <83>;
821 interrupt-names = "tx", "rx";
825 dma-names = "tx", "rx";
829 compatible = "ti,am3352-elm";
830 reg = <0x48080000 0x2000>;
831 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
833 clocks = <&l4ls_gclk>;
838 gpmc: gpmc@50000000 {
839 compatible = "ti,am3352-gpmc";
841 clocks = <&l3s_gclk>;
843 reg = <0x50000000 0x2000>;
844 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
846 gpmc,num-waitpins = <2>;
847 #address-cells = <2>;
852 am43xx_control_usb2phy1: control-phy@44e10620 {
853 compatible = "ti,control-phy-usb2-am437";
854 reg = <0x44e10620 0x4>;
858 am43xx_control_usb2phy2: control-phy@0x44e10628 {
859 compatible = "ti,control-phy-usb2-am437";
860 reg = <0x44e10628 0x4>;
864 ocp2scp0: ocp2scp@483a8000 {
865 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
866 #address-cells = <1>;
869 ti,hwmods = "ocp2scp0";
871 usb2_phy1: phy@483a8000 {
872 compatible = "ti,am437x-usb2";
873 reg = <0x483a8000 0x8000>;
874 ctrl-module = <&am43xx_control_usb2phy1>;
875 clocks = <&usb_phy0_always_on_clk32k>,
876 <&usb_otg_ss0_refclk960m>;
877 clock-names = "wkupclk", "refclk";
883 ocp2scp1: ocp2scp@483e8000 {
884 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
885 #address-cells = <1>;
888 ti,hwmods = "ocp2scp1";
890 usb2_phy2: phy@483e8000 {
891 compatible = "ti,am437x-usb2";
892 reg = <0x483e8000 0x8000>;
893 ctrl-module = <&am43xx_control_usb2phy2>;
894 clocks = <&usb_phy1_always_on_clk32k>,
895 <&usb_otg_ss1_refclk960m>;
896 clock-names = "wkupclk", "refclk";
902 dwc3_1: omap_dwc3@48380000 {
903 compatible = "ti,am437x-dwc3";
904 ti,hwmods = "usb_otg_ss0";
905 reg = <0x48380000 0x10000>;
906 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
907 #address-cells = <1>;
913 compatible = "synopsys,dwc3";
914 reg = <0x48390000 0x10000>;
915 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
916 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
917 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
918 interrupt-names = "peripheral",
922 phy-names = "usb2-phy";
923 maximum-speed = "high-speed";
926 snps,dis_u3_susphy_quirk;
927 snps,dis_u2_susphy_quirk;
931 dwc3_2: omap_dwc3@483c0000 {
932 compatible = "ti,am437x-dwc3";
933 ti,hwmods = "usb_otg_ss1";
934 reg = <0x483c0000 0x10000>;
935 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
936 #address-cells = <1>;
942 compatible = "synopsys,dwc3";
943 reg = <0x483d0000 0x10000>;
944 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
945 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
946 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
947 interrupt-names = "peripheral",
951 phy-names = "usb2-phy";
952 maximum-speed = "high-speed";
955 snps,dis_u3_susphy_quirk;
956 snps,dis_u2_susphy_quirk;
960 qspi: qspi@47900000 {
961 compatible = "ti,am4372-qspi";
962 reg = <0x47900000 0x100>;
963 #address-cells = <1>;
966 interrupts = <0 138 0x4>;
972 compatible = "ti,am4372-hdq";
973 reg = <0x48347000 0x1000>;
974 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
975 clocks = <&func_12m_clk>;
982 compatible = "ti,omap3-dss";
983 reg = <0x4832a000 0x200>;
985 ti,hwmods = "dss_core";
986 clocks = <&disp_clk>;
988 #address-cells = <1>;
992 dispc: dispc@4832a400 {
993 compatible = "ti,omap3-dispc";
994 reg = <0x4832a400 0x400>;
995 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
996 ti,hwmods = "dss_dispc";
997 clocks = <&disp_clk>;
1001 rfbi: rfbi@4832a800 {
1002 compatible = "ti,omap3-rfbi";
1003 reg = <0x4832a800 0x100>;
1004 ti,hwmods = "dss_rfbi";
1005 clocks = <&disp_clk>;
1006 clock-names = "fck";
1007 status = "disabled";
1011 ocmcram: ocmcram@40300000 {
1012 compatible = "mmio-sram";
1013 reg = <0x40300000 0x40000>; /* 256k */
1016 dcan0: can@481cc000 {
1017 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1018 ti,hwmods = "d_can0";
1019 clocks = <&dcan0_fck>;
1020 clock-names = "fck";
1021 reg = <0x481cc000 0x2000>;
1022 syscon-raminit = <&scm_conf 0x644 0>;
1023 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1024 status = "disabled";
1027 dcan1: can@481d0000 {
1028 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1029 ti,hwmods = "d_can1";
1030 clocks = <&dcan1_fck>;
1031 clock-names = "fck";
1032 reg = <0x481d0000 0x2000>;
1033 syscon-raminit = <&scm_conf 0x644 1>;
1034 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1035 status = "disabled";
1038 vpfe0: vpfe@48326000 {
1039 compatible = "ti,am437x-vpfe";
1040 reg = <0x48326000 0x2000>;
1041 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
1042 ti,hwmods = "vpfe0";
1043 status = "disabled";
1046 vpfe1: vpfe@48328000 {
1047 compatible = "ti,am437x-vpfe";
1048 reg = <0x48328000 0x2000>;
1049 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
1050 ti,hwmods = "vpfe1";
1051 status = "disabled";
1056 /include/ "am43xx-clocks.dtsi"