2 * Device Tree Source for am3517 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
21 /* Based on OMAP3630 variants OPP50 and OPP100 */
22 operating-points-v2 = <&cpu0_opp_table>;
24 clock-latency = <300000>; /* From legacy driver */
28 cpu0_opp_table: opp-table {
29 compatible = "operating-points-v2-ti-cpu";
32 * AM3517 TRM only lists 600MHz @ 1.2V, but omap36xx
33 * appear to operate at 300MHz as well. Since AM3517 only
34 * lists one operating voltage, it will remain fixed at 1.2V
37 opp-hz = /bits/ 64 <300000000>;
38 opp-microvolt = <1200000>;
39 opp-supported-hw = <0xffffffff 0xffffffff>;
44 opp-hz = /bits/ 64 <600000000>;
45 opp-microvolt = <1200000>;
46 opp-supported-hw = <0xffffffff 0xffffffff>;
51 am35x_otg_hs: am35x_otg_hs@5c040000 {
52 compatible = "ti,omap3-musb";
53 ti,hwmods = "am35x_otg_hs";
55 reg = <0x5c040000 0x1000>;
57 interrupt-names = "mc";
60 davinci_emac: ethernet@5c000000 {
61 compatible = "ti,am3517-emac";
62 ti,hwmods = "davinci_emac";
64 reg = <0x5c000000 0x30000>;
65 interrupts = <67 68 69 70>;
67 ti,davinci-ctrl-reg-offset = <0x10000>;
68 ti,davinci-ctrl-mod-reg-offset = <0>;
69 ti,davinci-ctrl-ram-offset = <0x20000>;
70 ti,davinci-ctrl-ram-size = <0x2000>;
71 ti,davinci-rmii-en = /bits/ 8 <1>;
72 local-mac-address = [ 00 00 00 00 00 00 ];
77 davinci_mdio: mdio@5c030000 {
78 compatible = "ti,davinci_mdio";
79 ti,hwmods = "davinci_mdio";
81 reg = <0x5c030000 0x1000>;
89 uart4: serial@4809e000 {
90 compatible = "ti,omap3-uart";
93 reg = <0x4809e000 0x400>;
95 dmas = <&sdma 55 &sdma 54>;
96 dma-names = "tx", "rx";
97 clock-frequency = <48000000>;
100 omap3_pmx_core2: pinmux@480025d8 {
101 compatible = "ti,omap3-padconf", "pinctrl-single";
102 reg = <0x480025d8 0x24>;
103 #address-cells = <1>;
105 #pinctrl-cells = <1>;
106 #interrupt-cells = <1>;
107 interrupt-controller;
108 pinctrl-single,register-width = <16>;
109 pinctrl-single,function-mask = <0xff1f>;
113 compatible = "ti,am3517-hecc";
115 reg = <0x5c050000 0x80>,
118 reg-names = "hecc", "hecc-ram", "mbx";
124 * On am3517 the OCP registers do not seem to be accessible
125 * similar to the omap34xx. Maybe SGX is permanently set to
126 * "OCP bypass mode", or maybe there is OCP_SYSCONFIG that is
127 * write-only at 0x50000e10. We detect SGX based on the SGX
128 * revision register instead of the unreadable OCP revision
131 sgx_module: target-module@50000000 {
132 compatible = "ti,sysc-omap2", "ti,sysc";
133 reg = <0x50000014 0x4>;
135 clocks = <&sgx_fck>, <&sgx_ick>;
136 clock-names = "fck", "ick";
137 #address-cells = <1>;
139 ranges = <0 0x50000000 0x4000>;
142 * Closed source PowerVR driver, no child device
143 * binding or driver in mainline
149 /* Not currently working, probably needs at least different clocks */
152 /delete-property/ clocks;
155 /* Table Table 5-79 of the TRM shows 480ab000 is reserved */
172 /include/ "am35xx-clocks.dtsi"
173 /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"