2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/am33xx.h>
14 #include <dt-bindings/clock/am3.h>
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
39 ethernet0 = &cpsw_emac0;
40 ethernet1 = &cpsw_emac1;
49 compatible = "arm,cortex-a8";
50 enable-method = "ti,am3352";
54 operating-points-v2 = <&cpu0_opp_table>;
56 clocks = <&dpll_mpu_ck>;
59 clock-latency = <300000>; /* From omap-cpufreq driver */
60 cpu-idle-states = <&mpu_gate>;
65 compatible = "arm,idle-state";
66 entry-latency-us = <40>;
67 exit-latency-us = <90>;
68 min-residency-us = <300>;
74 cpu0_opp_table: opp-table {
75 compatible = "operating-points-v2-ti-cpu";
79 * The three following nodes are marked with opp-suspend
80 * because the can not be enabled simultaneously on a
84 opp-hz = /bits/ 64 <300000000>;
85 opp-microvolt = <950000 931000 969000>;
86 opp-supported-hw = <0x06 0x0010>;
91 opp-hz = /bits/ 64 <275000000>;
92 opp-microvolt = <1100000 1078000 1122000>;
93 opp-supported-hw = <0x01 0x00FF>;
98 opp-hz = /bits/ 64 <300000000>;
99 opp-microvolt = <1100000 1078000 1122000>;
100 opp-supported-hw = <0x06 0x0020>;
105 opp-hz = /bits/ 64 <500000000>;
106 opp-microvolt = <1100000 1078000 1122000>;
107 opp-supported-hw = <0x01 0xFFFF>;
111 opp-hz = /bits/ 64 <600000000>;
112 opp-microvolt = <1100000 1078000 1122000>;
113 opp-supported-hw = <0x06 0x0040>;
117 opp-hz = /bits/ 64 <600000000>;
118 opp-microvolt = <1200000 1176000 1224000>;
119 opp-supported-hw = <0x01 0xFFFF>;
123 opp-hz = /bits/ 64 <720000000>;
124 opp-microvolt = <1200000 1176000 1224000>;
125 opp-supported-hw = <0x06 0x0080>;
129 opp-hz = /bits/ 64 <720000000>;
130 opp-microvolt = <1260000 1234800 1285200>;
131 opp-supported-hw = <0x01 0xFFFF>;
135 opp-hz = /bits/ 64 <800000000>;
136 opp-microvolt = <1260000 1234800 1285200>;
137 opp-supported-hw = <0x06 0x0100>;
140 oppnitro-1000000000 {
141 opp-hz = /bits/ 64 <1000000000>;
142 opp-microvolt = <1325000 1298500 1351500>;
143 opp-supported-hw = <0x04 0x0200>;
148 compatible = "arm,cortex-a8-pmu";
150 reg = <0x4b000000 0x1000000>;
151 ti,hwmods = "debugss";
155 * The soc node represents the soc top level view. It is used for IPs
156 * that are not memory mapped in the MPU view or for the MPU itself.
159 compatible = "ti,omap-infra";
161 compatible = "ti,omap3-mpu";
163 pm-sram = <&pm_sram_code
169 * XXX: Use a flat representation of the AM33XX interconnect.
170 * The real AM33XX interconnect network is quite complex. Since
171 * it will not bring real advantage to represent that in DT
172 * for the moment, just use a fake OCP bus entry to represent
173 * the whole bus hierarchy.
176 compatible = "simple-bus";
177 #address-cells = <1>;
180 ti,hwmods = "l3_main";
182 l4_wkup: interconnect@44c00000 {
183 wkup_m3: wkup_m3@100000 {
184 compatible = "ti,am3352-wkup-m3";
185 reg = <0x100000 0x4000>,
187 reg-names = "umem", "dmem";
188 ti,hwmods = "wkup_m3";
189 ti,pm-firmware = "am335x-pm-firmware.elf";
192 l4_per: interconnect@48000000 {
194 l4_fw: interconnect@47c00000 {
196 l4_fast: interconnect@4a000000 {
198 l4_mpuss: interconnect@4b140000 {
201 intc: interrupt-controller@48200000 {
202 compatible = "ti,am33xx-intc";
203 interrupt-controller;
204 #interrupt-cells = <1>;
205 reg = <0x48200000 0x1000>;
208 target-module@49000000 {
209 compatible = "ti,sysc-omap4", "ti,sysc";
210 reg = <0x49000000 0x4>;
212 clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
214 #address-cells = <1>;
216 ranges = <0x0 0x49000000 0x10000>;
219 compatible = "ti,edma3-tpcc";
221 reg-names = "edma3_cc";
222 interrupts = <12 13 14>;
223 interrupt-names = "edma3_ccint", "edma3_mperr",
228 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
231 ti,edma-memcpy-channels = <20 21>;
235 target-module@49800000 {
236 compatible = "ti,sysc-omap4", "ti,sysc";
237 reg = <0x49800000 0x4>,
239 reg-names = "rev", "sysc";
240 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
241 ti,sysc-midle = <SYSC_IDLE_FORCE>;
242 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
244 clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
246 #address-cells = <1>;
248 ranges = <0x0 0x49800000 0x100000>;
251 compatible = "ti,edma3-tptc";
254 interrupt-names = "edma3_tcerrint";
258 target-module@49900000 {
259 compatible = "ti,sysc-omap4", "ti,sysc";
260 reg = <0x49900000 0x4>,
262 reg-names = "rev", "sysc";
263 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
264 ti,sysc-midle = <SYSC_IDLE_FORCE>;
265 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
267 clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
269 #address-cells = <1>;
271 ranges = <0x0 0x49900000 0x100000>;
274 compatible = "ti,edma3-tptc";
277 interrupt-names = "edma3_tcerrint";
281 target-module@49a00000 {
282 compatible = "ti,sysc-omap4", "ti,sysc";
283 reg = <0x49a00000 0x4>,
285 reg-names = "rev", "sysc";
286 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
287 ti,sysc-midle = <SYSC_IDLE_FORCE>;
288 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
290 clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
292 #address-cells = <1>;
294 ranges = <0x0 0x49a00000 0x100000>;
297 compatible = "ti,edma3-tptc";
300 interrupt-names = "edma3_tcerrint";
304 target-module@47810000 {
305 compatible = "ti,sysc-omap2", "ti,sysc";
306 reg = <0x478102fc 0x4>,
309 reg-names = "rev", "sysc", "syss";
310 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
311 SYSC_OMAP2_ENAWAKEUP |
312 SYSC_OMAP2_SOFTRESET |
313 SYSC_OMAP2_AUTOIDLE)>;
314 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
318 clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
320 #address-cells = <1>;
322 ranges = <0x0 0x47810000 0x1000>;
325 compatible = "ti,omap4-hsmmc";
326 ti,needs-special-reset;
332 usb: target-module@47400000 {
333 compatible = "ti,sysc-omap4", "ti,sysc";
334 reg = <0x47400000 0x4>,
336 reg-names = "rev", "sysc";
337 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
338 SYSC_OMAP2_SOFTRESET)>;
339 ti,sysc-midle = <SYSC_IDLE_FORCE>,
342 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
345 <SYSC_IDLE_SMART_WKUP>;
346 clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
348 #address-cells = <1>;
350 ranges = <0x0 0x47400000 0x5000>;
352 usb0_phy: usb-phy@1300 {
353 compatible = "ti,am335x-usb-phy";
354 reg = <0x1300 0x100>;
356 ti,ctrl_mod = <&usb_ctrl_mod>;
361 compatible = "ti,musb-am33xx";
362 reg = <0x1400 0x400>,
364 reg-names = "mc", "control";
367 interrupt-names = "mc";
369 mentor,multipoint = <1>;
370 mentor,num-eps = <16>;
371 mentor,ram-bits = <12>;
372 mentor,power = <500>;
375 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
376 &cppi41dma 2 0 &cppi41dma 3 0
377 &cppi41dma 4 0 &cppi41dma 5 0
378 &cppi41dma 6 0 &cppi41dma 7 0
379 &cppi41dma 8 0 &cppi41dma 9 0
380 &cppi41dma 10 0 &cppi41dma 11 0
381 &cppi41dma 12 0 &cppi41dma 13 0
382 &cppi41dma 14 0 &cppi41dma 0 1
383 &cppi41dma 1 1 &cppi41dma 2 1
384 &cppi41dma 3 1 &cppi41dma 4 1
385 &cppi41dma 5 1 &cppi41dma 6 1
386 &cppi41dma 7 1 &cppi41dma 8 1
387 &cppi41dma 9 1 &cppi41dma 10 1
388 &cppi41dma 11 1 &cppi41dma 12 1
389 &cppi41dma 13 1 &cppi41dma 14 1>;
391 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
392 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
394 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
395 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
399 usb1_phy: usb-phy@1b00 {
400 compatible = "ti,am335x-usb-phy";
401 reg = <0x1b00 0x100>;
403 ti,ctrl_mod = <&usb_ctrl_mod>;
408 compatible = "ti,musb-am33xx";
409 reg = <0x1c00 0x400>,
411 reg-names = "mc", "control";
413 interrupt-names = "mc";
415 mentor,multipoint = <1>;
416 mentor,num-eps = <16>;
417 mentor,ram-bits = <12>;
418 mentor,power = <500>;
421 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
422 &cppi41dma 17 0 &cppi41dma 18 0
423 &cppi41dma 19 0 &cppi41dma 20 0
424 &cppi41dma 21 0 &cppi41dma 22 0
425 &cppi41dma 23 0 &cppi41dma 24 0
426 &cppi41dma 25 0 &cppi41dma 26 0
427 &cppi41dma 27 0 &cppi41dma 28 0
428 &cppi41dma 29 0 &cppi41dma 15 1
429 &cppi41dma 16 1 &cppi41dma 17 1
430 &cppi41dma 18 1 &cppi41dma 19 1
431 &cppi41dma 20 1 &cppi41dma 21 1
432 &cppi41dma 22 1 &cppi41dma 23 1
433 &cppi41dma 24 1 &cppi41dma 25 1
434 &cppi41dma 26 1 &cppi41dma 27 1
435 &cppi41dma 28 1 &cppi41dma 29 1>;
437 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
438 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
440 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
441 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
445 cppi41dma: dma-controller@2000 {
446 compatible = "ti,am3359-cppi41";
447 reg = <0x0000 0x1000>,
451 reg-names = "glue", "controller", "scheduler", "queuemgr";
453 interrupt-names = "glue";
455 #dma-channels = <30>;
456 #dma-requests = <256>;
460 ocmcram: sram@40300000 {
461 compatible = "mmio-sram";
462 reg = <0x40300000 0x10000>; /* 64k */
463 ranges = <0x0 0x40300000 0x10000>;
464 #address-cells = <1>;
467 pm_sram_code: pm-code-sram@0 {
468 compatible = "ti,sram";
473 pm_sram_data: pm-data-sram@1000 {
474 compatible = "ti,sram";
475 reg = <0x1000 0x1000>;
480 emif: emif@4c000000 {
481 compatible = "ti,emif-am3352";
482 reg = <0x4c000000 0x1000000>;
485 sram = <&pm_sram_code
490 gpmc: gpmc@50000000 {
491 compatible = "ti,am3352-gpmc";
494 reg = <0x50000000 0x2000>;
499 gpmc,num-waitpins = <2>;
500 #address-cells = <2>;
502 interrupt-controller;
503 #interrupt-cells = <2>;
509 sham_target: target-module@53100000 {
510 compatible = "ti,sysc-omap3-sham", "ti,sysc";
511 reg = <0x53100100 0x4>,
514 reg-names = "rev", "sysc", "syss";
515 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
516 SYSC_OMAP2_AUTOIDLE)>;
517 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
521 /* Domains (P, C): per_pwrdm, l3_clkdm */
522 clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
524 #address-cells = <1>;
526 ranges = <0x0 0x53100000 0x1000>;
529 compatible = "ti,omap4-sham";
537 aes_target: target-module@53500000 {
538 compatible = "ti,sysc-omap2", "ti,sysc";
539 reg = <0x53500080 0x4>,
542 reg-names = "rev", "sysc", "syss";
543 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
544 SYSC_OMAP2_AUTOIDLE)>;
545 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
548 <SYSC_IDLE_SMART_WKUP>;
550 /* Domains (P, C): per_pwrdm, l3_clkdm */
551 clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
553 #address-cells = <1>;
555 ranges = <0x0 0x53500000 0x1000>;
558 compatible = "ti,omap4-aes";
563 dma-names = "tx", "rx";
567 target-module@56000000 {
568 compatible = "ti,sysc-omap4", "ti,sysc";
569 reg = <0x5600fe00 0x4>,
571 reg-names = "rev", "sysc";
572 ti,sysc-midle = <SYSC_IDLE_FORCE>,
575 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
578 clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
580 resets = <&prm_gfx 0>;
581 reset-names = "rstctrl";
582 #address-cells = <1>;
584 ranges = <0 0x56000000 0x1000000>;
587 * Closed source PowerVR driver, no child device
588 * binding or driver in mainline
594 #include "am33xx-l4.dtsi"
595 #include "am33xx-clocks.dtsi"
599 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
605 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
610 prm_device: prm@f00 {
611 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
617 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
618 reg = <0x1100 0x100>;