arch/arm/boot/dts/am33xx-l4.dtsi

   1 &l4_wkup {                                              /* 0x44c00000 */
   2         compatible = "ti,am33xx-l4-wkup", "simple-bus";
   3         reg = <0x44c00000 0x800>,
   4               <0x44c00800 0x800>,
   5               <0x44c01000 0x400>,
   6               <0x44c01400 0x400>;
   7         reg-names = "ap", "la", "ia0", "ia1";
   8         #address-cells = <1>;
   9         #size-cells = <1>;
  10         ranges = <0x00000000 0x44c00000 0x100000>,      /* segment 0 */
  11                  <0x00100000 0x44d00000 0x100000>,      /* segment 1 */
  12                  <0x00200000 0x44e00000 0x100000>;      /* segment 2 */
  13
  14         segment@0 {                                     /* 0x44c00000 */
  15                 compatible = "simple-bus";
  16                 #address-cells = <1>;
  17                 #size-cells = <1>;
  18                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
  19                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
  20                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
  21                          <0x00001400 0x00001400 0x000400>;      /* ap 3 */
  22         };
  23
  24         segment@100000 {                                        /* 0x44d00000 */
  25                 compatible = "simple-bus";
  26                 #address-cells = <1>;
  27                 #size-cells = <1>;
  28                 ranges = <0x00000000 0x00100000 0x004000>,      /* ap 4 */
  29                          <0x00004000 0x00104000 0x001000>,      /* ap 5 */
  30                          <0x00080000 0x00180000 0x002000>,      /* ap 6 */
  31                          <0x00082000 0x00182000 0x001000>;      /* ap 7 */
  32
  33                 target-module@0 {                       /* 0x44d00000, ap 4 28.0 */
  34                         compatible = "ti,sysc-omap4", "ti,sysc";
  35                         reg = <0x0 0x4>;
  36                         reg-names = "rev";
  37                         #address-cells = <1>;
  38                         #size-cells = <1>;
  39                         ranges = <0x0 0x0 0x4000>;
  40                         status = "disabled";
  41                 };
  42
  43                 target-module@80000 {                   /* 0x44d80000, ap 6 10.0 */
  44                         compatible = "ti,sysc";
  45                         status = "disabled";
  46                         #address-cells = <1>;
  47                         #size-cells = <1>;
  48                         ranges = <0x0 0x80000 0x2000>;
  49                 };
  50         };
  51
  52         segment@200000 {                                        /* 0x44e00000 */
  53                 compatible = "simple-bus";
  54                 #address-cells = <1>;
  55                 #size-cells = <1>;
  56                 ranges = <0x00000000 0x00200000 0x002000>,      /* ap 8 */
  57                          <0x00002000 0x00202000 0x001000>,      /* ap 9 */
  58                          <0x00003000 0x00203000 0x001000>,      /* ap 10 */
  59                          <0x00004000 0x00204000 0x001000>,      /* ap 11 */
  60                          <0x00005000 0x00205000 0x001000>,      /* ap 12 */
  61                          <0x00006000 0x00206000 0x001000>,      /* ap 13 */
  62                          <0x00007000 0x00207000 0x001000>,      /* ap 14 */
  63                          <0x00008000 0x00208000 0x001000>,      /* ap 15 */
  64                          <0x00009000 0x00209000 0x001000>,      /* ap 16 */
  65                          <0x0000a000 0x0020a000 0x001000>,      /* ap 17 */
  66                          <0x0000b000 0x0020b000 0x001000>,      /* ap 18 */
  67                          <0x0000c000 0x0020c000 0x001000>,      /* ap 19 */
  68                          <0x0000d000 0x0020d000 0x001000>,      /* ap 20 */
  69                          <0x0000f000 0x0020f000 0x001000>,      /* ap 21 */
  70                          <0x00010000 0x00210000 0x010000>,      /* ap 22 */
  71                          <0x00020000 0x00220000 0x010000>,      /* ap 23 */
  72                          <0x00030000 0x00230000 0x001000>,      /* ap 24 */
  73                          <0x00031000 0x00231000 0x001000>,      /* ap 25 */
  74                          <0x00032000 0x00232000 0x001000>,      /* ap 26 */
  75                          <0x00033000 0x00233000 0x001000>,      /* ap 27 */
  76                          <0x00034000 0x00234000 0x001000>,      /* ap 28 */
  77                          <0x00035000 0x00235000 0x001000>,      /* ap 29 */
  78                          <0x00036000 0x00236000 0x001000>,      /* ap 30 */
  79                          <0x00037000 0x00237000 0x001000>,      /* ap 31 */
  80                          <0x00038000 0x00238000 0x001000>,      /* ap 32 */
  81                          <0x00039000 0x00239000 0x001000>,      /* ap 33 */
  82                          <0x0003a000 0x0023a000 0x001000>,      /* ap 34 */
  83                          <0x0003e000 0x0023e000 0x001000>,      /* ap 35 */
  84                          <0x0003f000 0x0023f000 0x001000>,      /* ap 36 */
  85                          <0x0000e000 0x0020e000 0x001000>,      /* ap 37 */
  86                          <0x00040000 0x00240000 0x040000>,      /* ap 38 */
  87                          <0x00080000 0x00280000 0x001000>;      /* ap 39 */
  88
  89                 target-module@0 {                       /* 0x44e00000, ap 8 58.0 */
  90                         compatible = "ti,sysc-omap4", "ti,sysc";
  91                         reg = <0 0x4>;
  92                         reg-names = "rev";
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95                         ranges = <0x0 0x0 0x2000>;
  96
  97                         prcm: prcm@0 {
  98                                 compatible = "ti,am3-prcm", "simple-bus";
  99                                 reg = <0 0x2000>;
 100                                 #address-cells = <1>;
 101                                 #size-cells = <1>;
 102                                 ranges = <0 0 0x2000>;
 103
 104                                 prcm_clocks: clocks {
 105                                         #address-cells = <1>;
 106                                         #size-cells = <0>;
 107                                 };
 108
 109                                 prcm_clockdomains: clockdomains {
 110                                 };
 111                         };
 112                 };
 113
 114                 target-module@3000 {                    /* 0x44e03000, ap 10 0a.0 */
 115                         compatible = "ti,sysc";
 116                         status = "disabled";
 117                         #address-cells = <1>;
 118                         #size-cells = <1>;
 119                         ranges = <0x0 0x3000 0x1000>;
 120                 };
 121
 122                 target-module@5000 {                    /* 0x44e05000, ap 12 30.0 */
 123                         compatible = "ti,sysc";
 124                         status = "disabled";
 125                         #address-cells = <1>;
 126                         #size-cells = <1>;
 127                         ranges = <0x0 0x5000 0x1000>;
 128                 };
 129
 130                 gpio0_target: target-module@7000 {      /* 0x44e07000, ap 14 20.0 */
 131                         compatible = "ti,sysc-omap2", "ti,sysc";
 132                         reg = <0x7000 0x4>,
 133                               <0x7010 0x4>,
 134                               <0x7114 0x4>;
 135                         reg-names = "rev", "sysc", "syss";
 136                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 137                                          SYSC_OMAP2_SOFTRESET |
 138                                          SYSC_OMAP2_AUTOIDLE)>;
 139                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 140                                         <SYSC_IDLE_NO>,
 141                                         <SYSC_IDLE_SMART>,
 142                                         <SYSC_IDLE_SMART_WKUP>;
 143                         ti,syss-mask = <1>;
 144                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 145                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 0>,
 146                                  <&l4_wkup_clkctrl AM3_L4_WKUP_GPIO1_CLKCTRL 18>;
 147                         clock-names = "fck", "dbclk";
 148                         #address-cells = <1>;
 149                         #size-cells = <1>;
 150                         ranges = <0x0 0x7000 0x1000>;
 151
 152                         gpio0: gpio@0 {
 153                                 compatible = "ti,omap4-gpio";
 154                                 gpio-controller;
 155                                 #gpio-cells = <2>;
 156                                 interrupt-controller;
 157                                 #interrupt-cells = <2>;
 158                                 reg = <0x0 0x1000>;
 159                                 interrupts = <96>;
 160                         };
 161                 };
 162
 163                 target-module@9000 {                    /* 0x44e09000, ap 16 04.0 */
 164                         compatible = "ti,sysc-omap2", "ti,sysc";
 165                         reg = <0x9050 0x4>,
 166                               <0x9054 0x4>,
 167                               <0x9058 0x4>;
 168                         reg-names = "rev", "sysc", "syss";
 169                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 170                                          SYSC_OMAP2_SOFTRESET |
 171                                          SYSC_OMAP2_AUTOIDLE)>;
 172                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 173                                         <SYSC_IDLE_NO>,
 174                                         <SYSC_IDLE_SMART>,
 175                                         <SYSC_IDLE_SMART_WKUP>;
 176                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 177                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_UART1_CLKCTRL 0>;
 178                         clock-names = "fck";
 179                         #address-cells = <1>;
 180                         #size-cells = <1>;
 181                         ranges = <0x0 0x9000 0x1000>;
 182
 183                         uart0: serial@0 {
 184                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 185                                 clock-frequency = <48000000>;
 186                                 reg = <0x0 0x1000>;
 187                                 interrupts = <72>;
 188                                 status = "disabled";
 189                                 dmas = <&edma 26 0>, <&edma 27 0>;
 190                                 dma-names = "tx", "rx";
 191                         };
 192                 };
 193
 194                 target-module@b000 {                    /* 0x44e0b000, ap 18 48.0 */
 195                         compatible = "ti,sysc-omap2", "ti,sysc";
 196                         reg = <0xb000 0x8>,
 197                               <0xb010 0x8>,
 198                               <0xb090 0x8>;
 199                         reg-names = "rev", "sysc", "syss";
 200                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 201                                          SYSC_OMAP2_ENAWAKEUP |
 202                                          SYSC_OMAP2_SOFTRESET |
 203                                          SYSC_OMAP2_AUTOIDLE)>;
 204                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 205                                         <SYSC_IDLE_NO>,
 206                                         <SYSC_IDLE_SMART>,
 207                                         <SYSC_IDLE_SMART_WKUP>;
 208                         ti,syss-mask = <1>;
 209                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 210                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_I2C1_CLKCTRL 0>;
 211                         clock-names = "fck";
 212                         #address-cells = <1>;
 213                         #size-cells = <1>;
 214                         ranges = <0x0 0xb000 0x1000>;
 215
 216                         i2c0: i2c@0 {
 217                                 compatible = "ti,omap4-i2c";
 218                                 #address-cells = <1>;
 219                                 #size-cells = <0>;
 220                                 reg = <0x0 0x1000>;
 221                                 interrupts = <70>;
 222                                 status = "disabled";
 223                         };
 224                 };
 225
 226                 target-module@d000 {                    /* 0x44e0d000, ap 20 38.0 */
 227                         compatible = "ti,sysc-omap4", "ti,sysc";
 228                         reg = <0xd000 0x4>,
 229                               <0xd010 0x4>;
 230                         reg-names = "rev", "sysc";
 231                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 232                                         <SYSC_IDLE_NO>,
 233                                         <SYSC_IDLE_SMART>,
 234                                         <SYSC_IDLE_SMART_WKUP>;
 235                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 236                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_ADC_TSC_CLKCTRL 0>;
 237                         clock-names = "fck";
 238                         #address-cells = <1>;
 239                         #size-cells = <1>;
 240                         ranges = <0x00000000 0x0000d000 0x00001000>,
 241                                  <0x00001000 0x0000e000 0x00001000>;
 242
 243                                 tscadc: tscadc@0 {
 244                                         compatible = "ti,am3359-tscadc";
 245                                         reg = <0x0 0x1000>;
 246                                         interrupts = <16>;
 247                                         status = "disabled";
 248                                         dmas = <&edma 53 0>, <&edma 57 0>;
 249                                         dma-names = "fifo0", "fifo1";
 250
 251                                         tsc {
 252                                                 compatible = "ti,am3359-tsc";
 253                                         };
 254                                         am335x_adc: adc {
 255                                                 #io-channel-cells = <1>;
 256                                                 compatible = "ti,am3359-adc";
 257                                         };
 258                                 };
 259                 };
 260
 261                 target-module@10000 {                   /* 0x44e10000, ap 22 0c.0 */
 262                         compatible = "ti,sysc-omap4", "ti,sysc";
 263                         reg = <0x10000 0x4>;
 264                         reg-names = "rev";
 265                         #address-cells = <1>;
 266                         #size-cells = <1>;
 267                         ranges = <0x00000000 0x00010000 0x00010000>,
 268                                  <0x00010000 0x00020000 0x00010000>;
 269
 270                         scm: scm@0 {
 271                                 compatible = "ti,am3-scm", "simple-bus";
 272                                 reg = <0x0 0x2000>;
 273                                 #address-cells = <1>;
 274                                 #size-cells = <1>;
 275                                 #pinctrl-cells = <1>;
 276                                 ranges = <0 0 0x2000>;
 277
 278                                 am33xx_pinmux: pinmux@800 {
 279                                         compatible = "pinctrl-single";
 280                                         reg = <0x800 0x238>;
 281                                         #pinctrl-cells = <1>;
 282                                         pinctrl-single,register-width = <32>;
 283                                         pinctrl-single,function-mask = <0x7f>;
 284                                 };
 285
 286                                 scm_conf: scm_conf@0 {
 287                                         compatible = "syscon", "simple-bus";
 288                                         reg = <0x0 0x800>;
 289                                         #address-cells = <1>;
 290                                         #size-cells = <1>;
 291                                         ranges = <0 0 0x800>;
 292
 293                                         phy_gmii_sel: phy-gmii-sel {
 294                                                 compatible = "ti,am3352-phy-gmii-sel";
 295                                                 reg = <0x650 0x4>;
 296                                                 #phy-cells = <2>;
 297                                         };
 298
 299                                         scm_clocks: clocks {
 300                                                 #address-cells = <1>;
 301                                                 #size-cells = <0>;
 302                                         };
 303                                 };
 304
 305                                 usb_ctrl_mod: control@620 {
 306                                         compatible = "ti,am335x-usb-ctrl-module";
 307                                         reg = <0x620 0x10>,
 308                                               <0x648 0x4>;
 309                                         reg-names = "phy_ctrl", "wakeup";
 310                                 };
 311
 312                                 wkup_m3_ipc: wkup_m3_ipc@1324 {
 313                                         compatible = "ti,am3352-wkup-m3-ipc";
 314                                         reg = <0x1324 0x24>;
 315                                         interrupts = <78>;
 316                                         ti,rproc = <&wkup_m3>;
 317                                         mboxes = <&mailbox &mbox_wkupm3>;
 318                                 };
 319
 320                                 edma_xbar: dma-router@f90 {
 321                                         compatible = "ti,am335x-edma-crossbar";
 322                                         reg = <0xf90 0x40>;
 323                                         #dma-cells = <3>;
 324                                         dma-requests = <32>;
 325                                         dma-masters = <&edma>;
 326                                 };
 327
 328                                 scm_clockdomains: clockdomains {
 329                                 };
 330                         };
 331                 };
 332
 333                 target-module@31000 {                   /* 0x44e31000, ap 25 40.0 */
 334                         compatible = "ti,sysc-omap2-timer", "ti,sysc";
 335                         ti,hwmods = "timer1";
 336                         reg = <0x31000 0x4>,
 337                               <0x31010 0x4>,
 338                               <0x31014 0x4>;
 339                         reg-names = "rev", "sysc", "syss";
 340                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 341                                          SYSC_OMAP2_SOFTRESET |
 342                                          SYSC_OMAP2_AUTOIDLE)>;
 343                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 344                                         <SYSC_IDLE_NO>,
 345                                         <SYSC_IDLE_SMART>;
 346                         ti,syss-mask = <1>;
 347                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 348                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_TIMER1_CLKCTRL 0>;
 349                         clock-names = "fck";
 350                         #address-cells = <1>;
 351                         #size-cells = <1>;
 352                         ranges = <0x0 0x31000 0x1000>;
 353
 354                         timer1: timer@0 {
 355                                 compatible = "ti,am335x-timer-1ms";
 356                                 reg = <0x0 0x400>;
 357                                 interrupts = <67>;
 358                                 ti,timer-alwon;
 359                                 clocks = <&timer1_fck>;
 360                                 clock-names = "fck";
 361                         };
 362                 };
 363
 364                 target-module@33000 {                   /* 0x44e33000, ap 27 18.0 */
 365                         compatible = "ti,sysc";
 366                         status = "disabled";
 367                         #address-cells = <1>;
 368                         #size-cells = <1>;
 369                         ranges = <0x0 0x33000 0x1000>;
 370                 };
 371
 372                 target-module@35000 {                   /* 0x44e35000, ap 29 50.0 */
 373                         compatible = "ti,sysc-omap2", "ti,sysc";
 374                         reg = <0x35000 0x4>,
 375                               <0x35010 0x4>,
 376                               <0x35014 0x4>;
 377                         reg-names = "rev", "sysc", "syss";
 378                         ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
 379                                          SYSC_OMAP2_SOFTRESET)>;
 380                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 381                                         <SYSC_IDLE_NO>,
 382                                         <SYSC_IDLE_SMART>,
 383                                         <SYSC_IDLE_SMART_WKUP>;
 384                         ti,syss-mask = <1>;
 385                         /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
 386                         clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
 387                         clock-names = "fck";
 388                         #address-cells = <1>;
 389                         #size-cells = <1>;
 390                         ranges = <0x0 0x35000 0x1000>;
 391
 392                         wdt2: wdt@0 {
 393                                 compatible = "ti,omap3-wdt";
 394                                 reg = <0x0 0x1000>;
 395                                 interrupts = <91>;
 396                         };
 397                 };
 398
 399                 target-module@37000 {                   /* 0x44e37000, ap 31 08.0 */
 400                         compatible = "ti,sysc";
 401                         status = "disabled";
 402                         #address-cells = <1>;
 403                         #size-cells = <1>;
 404                         ranges = <0x0 0x37000 0x1000>;
 405                 };
 406
 407                 target-module@39000 {                   /* 0x44e39000, ap 33 02.0 */
 408                         compatible = "ti,sysc";
 409                         status = "disabled";
 410                         #address-cells = <1>;
 411                         #size-cells = <1>;
 412                         ranges = <0x0 0x39000 0x1000>;
 413                 };
 414
 415                 target-module@3e000 {                   /* 0x44e3e000, ap 35 60.0 */
 416                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 417                         ti,hwmods = "rtc";
 418                         reg = <0x3e074 0x4>,
 419                               <0x3e078 0x4>;
 420                         reg-names = "rev", "sysc";
 421                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 422                                         <SYSC_IDLE_NO>,
 423                                         <SYSC_IDLE_SMART>,
 424                                         <SYSC_IDLE_SMART_WKUP>;
 425                         /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
 426                         clocks = <&l4_rtc_clkctrl AM3_L4_RTC_RTC_CLKCTRL 0>;
 427                         clock-names = "fck";
 428                         #address-cells = <1>;
 429                         #size-cells = <1>;
 430                         ranges = <0x0 0x3e000 0x1000>;
 431
 432                         rtc: rtc@0 {
 433                                 compatible = "ti,am3352-rtc", "ti,da830-rtc";
 434                                 reg = <0x0 0x1000>;
 435                                 interrupts = <75
 436                                               76>;
 437                         };
 438                 };
 439
 440                 target-module@40000 {                   /* 0x44e40000, ap 38 68.0 */
 441                         compatible = "ti,sysc";
 442                         status = "disabled";
 443                         #address-cells = <1>;
 444                         #size-cells = <1>;
 445                         ranges = <0x0 0x40000 0x40000>;
 446                 };
 447         };
 448 };
 449
 450 &l4_fw {                                                /* 0x47c00000 */
 451         compatible = "ti,am33xx-l4-fw", "simple-bus";
 452         reg = <0x47c00000 0x800>,
 453               <0x47c00800 0x800>,
 454               <0x47c01000 0x400>;
 455         reg-names = "ap", "la", "ia0";
 456         #address-cells = <1>;
 457         #size-cells = <1>;
 458         ranges = <0x00000000 0x47c00000 0x1000000>;     /* segment 0 */
 459
 460         segment@0 {                                     /* 0x47c00000 */
 461                 compatible = "simple-bus";
 462                 #address-cells = <1>;
 463                 #size-cells = <1>;
 464                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 465                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 466                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 467                          <0x0000c000 0x0000c000 0x001000>,      /* ap 3 */
 468                          <0x0000d000 0x0000d000 0x001000>,      /* ap 4 */
 469                          <0x0000e000 0x0000e000 0x001000>,      /* ap 5 */
 470                          <0x0000f000 0x0000f000 0x001000>,      /* ap 6 */
 471                          <0x00010000 0x00010000 0x001000>,      /* ap 7 */
 472                          <0x00011000 0x00011000 0x001000>,      /* ap 8 */
 473                          <0x0001a000 0x0001a000 0x001000>,      /* ap 9 */
 474                          <0x0001b000 0x0001b000 0x001000>,      /* ap 10 */
 475                          <0x00024000 0x00024000 0x001000>,      /* ap 11 */
 476                          <0x00025000 0x00025000 0x001000>,      /* ap 12 */
 477                          <0x00026000 0x00026000 0x001000>,      /* ap 13 */
 478                          <0x00027000 0x00027000 0x001000>,      /* ap 14 */
 479                          <0x00030000 0x00030000 0x001000>,      /* ap 15 */
 480                          <0x00031000 0x00031000 0x001000>,      /* ap 16 */
 481                          <0x00038000 0x00038000 0x001000>,      /* ap 17 */
 482                          <0x00039000 0x00039000 0x001000>,      /* ap 18 */
 483                          <0x0003a000 0x0003a000 0x001000>,      /* ap 19 */
 484                          <0x0003b000 0x0003b000 0x001000>,      /* ap 20 */
 485                          <0x0003e000 0x0003e000 0x001000>,      /* ap 21 */
 486                          <0x0003f000 0x0003f000 0x001000>,      /* ap 22 */
 487                          <0x0003c000 0x0003c000 0x001000>,      /* ap 23 */
 488                          <0x00040000 0x00040000 0x001000>,      /* ap 24 */
 489                          <0x00046000 0x00046000 0x001000>,      /* ap 25 */
 490                          <0x00047000 0x00047000 0x001000>,      /* ap 26 */
 491                          <0x00044000 0x00044000 0x001000>,      /* ap 27 */
 492                          <0x00045000 0x00045000 0x001000>,      /* ap 28 */
 493                          <0x00028000 0x00028000 0x001000>,      /* ap 29 */
 494                          <0x00029000 0x00029000 0x001000>,      /* ap 30 */
 495                          <0x00032000 0x00032000 0x001000>,      /* ap 31 */
 496                          <0x00033000 0x00033000 0x001000>,      /* ap 32 */
 497                          <0x0003d000 0x0003d000 0x001000>,      /* ap 33 */
 498                          <0x00041000 0x00041000 0x001000>,      /* ap 34 */
 499                          <0x00042000 0x00042000 0x001000>,      /* ap 35 */
 500                          <0x00043000 0x00043000 0x001000>,      /* ap 36 */
 501                          <0x00014000 0x00014000 0x001000>,      /* ap 37 */
 502                          <0x00015000 0x00015000 0x001000>;      /* ap 38 */
 503
 504                 target-module@c000 {                    /* 0x47c0c000, ap 3 04.0 */
 505                         compatible = "ti,sysc";
 506                         status = "disabled";
 507                         #address-cells = <1>;
 508                         #size-cells = <1>;
 509                         ranges = <0x0 0xc000 0x1000>;
 510                 };
 511
 512                 target-module@e000 {                    /* 0x47c0e000, ap 5 0c.0 */
 513                         compatible = "ti,sysc";
 514                         status = "disabled";
 515                         #address-cells = <1>;
 516                         #size-cells = <1>;
 517                         ranges = <0x0 0xe000 0x1000>;
 518                 };
 519
 520                 target-module@10000 {                   /* 0x47c10000, ap 7 20.0 */
 521                         compatible = "ti,sysc";
 522                         status = "disabled";
 523                         #address-cells = <1>;
 524                         #size-cells = <1>;
 525                         ranges = <0x0 0x10000 0x1000>;
 526                 };
 527
 528                 target-module@14000 {                   /* 0x47c14000, ap 37 3c.0 */
 529                         compatible = "ti,sysc";
 530                         status = "disabled";
 531                         #address-cells = <1>;
 532                         #size-cells = <1>;
 533                         ranges = <0x0 0x14000 0x1000>;
 534                 };
 535
 536                 target-module@1a000 {                   /* 0x47c1a000, ap 9 08.0 */
 537                         compatible = "ti,sysc";
 538                         status = "disabled";
 539                         #address-cells = <1>;
 540                         #size-cells = <1>;
 541                         ranges = <0x0 0x1a000 0x1000>;
 542                 };
 543
 544                 target-module@24000 {                   /* 0x47c24000, ap 11 28.0 */
 545                         compatible = "ti,sysc";
 546                         status = "disabled";
 547                         #address-cells = <1>;
 548                         #size-cells = <1>;
 549                         ranges = <0x0 0x24000 0x1000>;
 550                 };
 551
 552                 target-module@26000 {                   /* 0x47c26000, ap 13 30.0 */
 553                         compatible = "ti,sysc";
 554                         status = "disabled";
 555                         #address-cells = <1>;
 556                         #size-cells = <1>;
 557                         ranges = <0x0 0x26000 0x1000>;
 558                 };
 559
 560                 target-module@28000 {                   /* 0x47c28000, ap 29 40.0 */
 561                         compatible = "ti,sysc";
 562                         status = "disabled";
 563                         #address-cells = <1>;
 564                         #size-cells = <1>;
 565                         ranges = <0x0 0x28000 0x1000>;
 566                 };
 567
 568                 target-module@30000 {                   /* 0x47c30000, ap 15 14.0 */
 569                         compatible = "ti,sysc";
 570                         status = "disabled";
 571                         #address-cells = <1>;
 572                         #size-cells = <1>;
 573                         ranges = <0x0 0x30000 0x1000>;
 574                 };
 575
 576                 target-module@32000 {                   /* 0x47c32000, ap 31 06.0 */
 577                         compatible = "ti,sysc";
 578                         status = "disabled";
 579                         #address-cells = <1>;
 580                         #size-cells = <1>;
 581                         ranges = <0x0 0x32000 0x1000>;
 582                 };
 583
 584                 target-module@38000 {                   /* 0x47c38000, ap 17 18.0 */
 585                         compatible = "ti,sysc";
 586                         status = "disabled";
 587                         #address-cells = <1>;
 588                         #size-cells = <1>;
 589                         ranges = <0x0 0x38000 0x1000>;
 590                 };
 591
 592                 target-module@3a000 {                   /* 0x47c3a000, ap 19 1c.0 */
 593                         compatible = "ti,sysc";
 594                         status = "disabled";
 595                         #address-cells = <1>;
 596                         #size-cells = <1>;
 597                         ranges = <0x0 0x3a000 0x1000>;
 598                 };
 599
 600                 target-module@3c000 {                   /* 0x47c3c000, ap 23 38.0 */
 601                         compatible = "ti,sysc";
 602                         status = "disabled";
 603                         #address-cells = <1>;
 604                         #size-cells = <1>;
 605                         ranges = <0x0 0x3c000 0x1000>;
 606                 };
 607
 608                 target-module@3e000 {                   /* 0x47c3e000, ap 21 10.0 */
 609                         compatible = "ti,sysc";
 610                         status = "disabled";
 611                         #address-cells = <1>;
 612                         #size-cells = <1>;
 613                         ranges = <0x0 0x3e000 0x1000>;
 614                 };
 615
 616                 target-module@40000 {                   /* 0x47c40000, ap 24 02.0 */
 617                         compatible = "ti,sysc";
 618                         status = "disabled";
 619                         #address-cells = <1>;
 620                         #size-cells = <1>;
 621                         ranges = <0x0 0x40000 0x1000>;
 622                 };
 623
 624                 target-module@42000 {                   /* 0x47c42000, ap 35 34.0 */
 625                         compatible = "ti,sysc";
 626                         status = "disabled";
 627                         #address-cells = <1>;
 628                         #size-cells = <1>;
 629                         ranges = <0x0 0x42000 0x1000>;
 630                 };
 631
 632                 target-module@44000 {                   /* 0x47c44000, ap 27 24.0 */
 633                         compatible = "ti,sysc";
 634                         status = "disabled";
 635                         #address-cells = <1>;
 636                         #size-cells = <1>;
 637                         ranges = <0x0 0x44000 0x1000>;
 638                 };
 639
 640                 target-module@46000 {                   /* 0x47c46000, ap 25 2c.0 */
 641                         compatible = "ti,sysc";
 642                         status = "disabled";
 643                         #address-cells = <1>;
 644                         #size-cells = <1>;
 645                         ranges = <0x0 0x46000 0x1000>;
 646                 };
 647         };
 648 };
 649
 650 &l4_fast {                                      /* 0x4a000000 */
 651         compatible = "ti,am33xx-l4-fast", "simple-bus";
 652         reg = <0x4a000000 0x800>,
 653               <0x4a000800 0x800>,
 654               <0x4a001000 0x400>;
 655         reg-names = "ap", "la", "ia0";
 656         #address-cells = <1>;
 657         #size-cells = <1>;
 658         ranges = <0x00000000 0x4a000000 0x1000000>;     /* segment 0 */
 659
 660         segment@0 {                                     /* 0x4a000000 */
 661                 compatible = "simple-bus";
 662                 #address-cells = <1>;
 663                 #size-cells = <1>;
 664                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 665                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 666                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 667                          <0x00100000 0x00100000 0x008000>,      /* ap 3 */
 668                          <0x00108000 0x00108000 0x001000>,      /* ap 4 */
 669                          <0x00180000 0x00180000 0x020000>,      /* ap 5 */
 670                          <0x001a0000 0x001a0000 0x001000>,      /* ap 6 */
 671                          <0x00200000 0x00200000 0x080000>,      /* ap 7 */
 672                          <0x00280000 0x00280000 0x001000>,      /* ap 8 */
 673                          <0x00300000 0x00300000 0x080000>,      /* ap 9 */
 674                          <0x00380000 0x00380000 0x001000>;      /* ap 10 */
 675
 676                 target-module@100000 {                  /* 0x4a100000, ap 3 08.0 */
 677                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
 678                         reg = <0x101200 0x4>,
 679                               <0x101208 0x4>,
 680                               <0x101204 0x4>;
 681                         reg-names = "rev", "sysc", "syss";
 682                         ti,sysc-mask = <0>;
 683                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 684                                         <SYSC_IDLE_NO>;
 685                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 686                                         <SYSC_IDLE_NO>;
 687                         ti,syss-mask = <1>;
 688                         clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
 689                         clock-names = "fck";
 690                         #address-cells = <1>;
 691                         #size-cells = <1>;
 692                         ranges = <0x0 0x100000 0x8000>;
 693
 694                         mac: ethernet@0 {
 695                                 compatible = "ti,am335x-cpsw","ti,cpsw";
 696                                 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
 697                                 clock-names = "fck", "cpts";
 698                                 cpdma_channels = <8>;
 699                                 ale_entries = <1024>;
 700                                 bd_ram_size = <0x2000>;
 701                                 mac_control = <0x20>;
 702                                 slaves = <2>;
 703                                 active_slave = <0>;
 704                                 cpts_clock_mult = <0x80000000>;
 705                                 cpts_clock_shift = <29>;
 706                                 reg = <0x0 0x800
 707                                        0x1200 0x100>;
 708                                 #address-cells = <1>;
 709                                 #size-cells = <1>;
 710                                 /*
 711                                  * c0_rx_thresh_pend
 712                                  * c0_rx_pend
 713                                  * c0_tx_pend
 714                                  * c0_misc_pend
 715                                  */
 716                                 interrupts = <40 41 42 43>;
 717                                 ranges = <0 0 0x8000>;
 718                                 syscon = <&scm_conf>;
 719                                 status = "disabled";
 720
 721                                 davinci_mdio: mdio@1000 {
 722                                         compatible = "ti,cpsw-mdio","ti,davinci_mdio";
 723                                         clocks = <&cpsw_125mhz_clkctrl AM3_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
 724                                         clock-names = "fck";
 725                                         #address-cells = <1>;
 726                                         #size-cells = <0>;
 727                                         bus_freq = <1000000>;
 728                                         reg = <0x1000 0x100>;
 729                                         status = "disabled";
 730                                 };
 731
 732                                 cpsw_emac0: slave@200 {
 733                                         /* Filled in by U-Boot */
 734                                         mac-address = [ 00 00 00 00 00 00 ];
 735                                         phys = <&phy_gmii_sel 1 1>;
 736                                 };
 737
 738                                 cpsw_emac1: slave@300 {
 739                                         /* Filled in by U-Boot */
 740                                         mac-address = [ 00 00 00 00 00 00 ];
 741                                         phys = <&phy_gmii_sel 2 1>;
 742                                 };
 743                         };
 744                 };
 745
 746                 target-module@180000 {                  /* 0x4a180000, ap 5 10.0 */
 747                         compatible = "ti,sysc";
 748                         status = "disabled";
 749                         #address-cells = <1>;
 750                         #size-cells = <1>;
 751                         ranges = <0x0 0x180000 0x20000>;
 752                 };
 753
 754                 target-module@200000 {                  /* 0x4a200000, ap 7 02.0 */
 755                         compatible = "ti,sysc";
 756                         status = "disabled";
 757                         #address-cells = <1>;
 758                         #size-cells = <1>;
 759                         ranges = <0x0 0x200000 0x80000>;
 760                 };
 761
 762                 pruss_tm: target-module@300000 {        /* 0x4a300000, ap 9 04.0 */
 763                         compatible = "ti,sysc-pruss", "ti,sysc";
 764                         reg = <0x326000 0x4>,
 765                               <0x326004 0x4>;
 766                         reg-names = "rev", "sysc";
 767                         ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
 768                                          SYSC_PRUSS_SUB_MWAIT)>;
 769                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
 770                                         <SYSC_IDLE_NO>,
 771                                         <SYSC_IDLE_SMART>;
 772                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 773                                         <SYSC_IDLE_NO>,
 774                                         <SYSC_IDLE_SMART>;
 775                         clocks = <&pruss_ocp_clkctrl AM3_PRUSS_OCP_PRUSS_CLKCTRL 0>;
 776                         clock-names = "fck";
 777                         resets = <&prm_per 1>;
 778                         reset-names = "rstctrl";
 779                         #address-cells = <1>;
 780                         #size-cells = <1>;
 781                         ranges = <0x0 0x300000 0x80000>;
 782                         status = "disabled";
 783                 };
 784         };
 785 };
 786
 787 &l4_mpuss {                                             /* 0x4b140000 */
 788         compatible = "ti,am33xx-l4-mpuss", "simple-bus";
 789         reg = <0x4b144400 0x100>,
 790               <0x4b144800 0x400>;
 791         reg-names = "la", "ap";
 792         #address-cells = <1>;
 793         #size-cells = <1>;
 794         ranges = <0x00000000 0x4b140000 0x008000>;      /* segment 0 */
 795
 796         segment@0 {                                     /* 0x4b140000 */
 797                 compatible = "simple-bus";
 798                 #address-cells = <1>;
 799                 #size-cells = <1>;
 800                 ranges = <0x00004800 0x00004800 0x000400>,      /* ap 0 */
 801                          <0x00001000 0x00001000 0x001000>,      /* ap 1 */
 802                          <0x00002000 0x00002000 0x001000>,      /* ap 2 */
 803                          <0x00004000 0x00004000 0x000400>,      /* ap 3 */
 804                          <0x00005000 0x00005000 0x000400>,      /* ap 4 */
 805                          <0x00000000 0x00000000 0x001000>,      /* ap 5 */
 806                          <0x00003000 0x00003000 0x001000>,      /* ap 6 */
 807                          <0x00000800 0x00000800 0x000800>;      /* ap 7 */
 808
 809                 target-module@0 {                       /* 0x4b140000, ap 5 02.2 */
 810                         compatible = "ti,sysc";
 811                         status = "disabled";
 812                         #address-cells = <1>;
 813                         #size-cells = <1>;
 814                         ranges = <0x00000000 0x00000000 0x00001000>,
 815                                  <0x00001000 0x00001000 0x00001000>,
 816                                  <0x00002000 0x00002000 0x00001000>;
 817                 };
 818
 819                 target-module@3000 {                    /* 0x4b143000, ap 6 04.0 */
 820                         compatible = "ti,sysc";
 821                         status = "disabled";
 822                         #address-cells = <1>;
 823                         #size-cells = <1>;
 824                         ranges = <0x0 0x3000 0x1000>;
 825                 };
 826         };
 827 };
 828
 829 &l4_per {                                               /* 0x48000000 */
 830         compatible = "ti,am33xx-l4-per", "simple-bus";
 831         reg = <0x48000000 0x800>,
 832               <0x48000800 0x800>,
 833               <0x48001000 0x400>,
 834               <0x48001400 0x400>,
 835               <0x48001800 0x400>,
 836               <0x48001c00 0x400>;
 837         reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
 838         #address-cells = <1>;
 839         #size-cells = <1>;
 840         ranges = <0x00000000 0x48000000 0x100000>,      /* segment 0 */
 841                  <0x00100000 0x48100000 0x100000>,      /* segment 1 */
 842                  <0x00200000 0x48200000 0x100000>,      /* segment 2 */
 843                  <0x00300000 0x48300000 0x100000>,      /* segment 3 */
 844                  <0x46000000 0x46000000 0x400000>,      /* l3 data port */
 845                  <0x46400000 0x46400000 0x400000>;      /* l3 data port */
 846
 847         segment@0 {                                     /* 0x48000000 */
 848                 compatible = "simple-bus";
 849                 #address-cells = <1>;
 850                 #size-cells = <1>;
 851                 ranges = <0x00000000 0x00000000 0x000800>,      /* ap 0 */
 852                          <0x00000800 0x00000800 0x000800>,      /* ap 1 */
 853                          <0x00001000 0x00001000 0x000400>,      /* ap 2 */
 854                          <0x00001400 0x00001400 0x000400>,      /* ap 3 */
 855                          <0x00001800 0x00001800 0x000400>,      /* ap 4 */
 856                          <0x00001c00 0x00001c00 0x000400>,      /* ap 5 */
 857                          <0x00008000 0x00008000 0x001000>,      /* ap 6 */
 858                          <0x00009000 0x00009000 0x001000>,      /* ap 7 */
 859                          <0x00016000 0x00016000 0x001000>,      /* ap 8 */
 860                          <0x00017000 0x00017000 0x001000>,      /* ap 9 */
 861                          <0x00022000 0x00022000 0x001000>,      /* ap 10 */
 862                          <0x00023000 0x00023000 0x001000>,      /* ap 11 */
 863                          <0x00024000 0x00024000 0x001000>,      /* ap 12 */
 864                          <0x00025000 0x00025000 0x001000>,      /* ap 13 */
 865                          <0x0002a000 0x0002a000 0x001000>,      /* ap 14 */
 866                          <0x0002b000 0x0002b000 0x001000>,      /* ap 15 */
 867                          <0x00038000 0x00038000 0x002000>,      /* ap 16 */
 868                          <0x0003a000 0x0003a000 0x001000>,      /* ap 17 */
 869                          <0x00014000 0x00014000 0x001000>,      /* ap 18 */
 870                          <0x00015000 0x00015000 0x001000>,      /* ap 19 */
 871                          <0x0003c000 0x0003c000 0x002000>,      /* ap 20 */
 872                          <0x0003e000 0x0003e000 0x001000>,      /* ap 21 */
 873                          <0x00040000 0x00040000 0x001000>,      /* ap 22 */
 874                          <0x00041000 0x00041000 0x001000>,      /* ap 23 */
 875                          <0x00042000 0x00042000 0x001000>,      /* ap 24 */
 876                          <0x00043000 0x00043000 0x001000>,      /* ap 25 */
 877                          <0x00044000 0x00044000 0x001000>,      /* ap 26 */
 878                          <0x00045000 0x00045000 0x001000>,      /* ap 27 */
 879                          <0x00046000 0x00046000 0x001000>,      /* ap 28 */
 880                          <0x00047000 0x00047000 0x001000>,      /* ap 29 */
 881                          <0x00048000 0x00048000 0x001000>,      /* ap 30 */
 882                          <0x00049000 0x00049000 0x001000>,      /* ap 31 */
 883                          <0x0004c000 0x0004c000 0x001000>,      /* ap 32 */
 884                          <0x0004d000 0x0004d000 0x001000>,      /* ap 33 */
 885                          <0x00050000 0x00050000 0x002000>,      /* ap 34 */
 886                          <0x00052000 0x00052000 0x001000>,      /* ap 35 */
 887                          <0x00060000 0x00060000 0x001000>,      /* ap 36 */
 888                          <0x00061000 0x00061000 0x001000>,      /* ap 37 */
 889                          <0x00080000 0x00080000 0x010000>,      /* ap 38 */
 890                          <0x00090000 0x00090000 0x001000>,      /* ap 39 */
 891                          <0x000a0000 0x000a0000 0x010000>,      /* ap 40 */
 892                          <0x000b0000 0x000b0000 0x001000>,      /* ap 41 */
 893                          <0x00030000 0x00030000 0x001000>,      /* ap 77 */
 894                          <0x00031000 0x00031000 0x001000>,      /* ap 78 */
 895                          <0x0004a000 0x0004a000 0x001000>,      /* ap 85 */
 896                          <0x0004b000 0x0004b000 0x001000>,      /* ap 86 */
 897                          <0x000c8000 0x000c8000 0x001000>,      /* ap 87 */
 898                          <0x000c9000 0x000c9000 0x001000>,      /* ap 88 */
 899                          <0x000cc000 0x000cc000 0x001000>,      /* ap 89 */
 900                          <0x000cd000 0x000cd000 0x001000>,      /* ap 90 */
 901                          <0x000ca000 0x000ca000 0x001000>,      /* ap 91 */
 902                          <0x000cb000 0x000cb000 0x001000>,      /* ap 92 */
 903                          <0x46000000 0x46000000 0x400000>,      /* l3 data port */
 904                          <0x46400000 0x46400000 0x400000>;      /* l3 data port */
 905
 906                 target-module@8000 {                    /* 0x48008000, ap 6 10.0 */
 907                         compatible = "ti,sysc";
 908                         status = "disabled";
 909                         #address-cells = <1>;
 910                         #size-cells = <1>;
 911                         ranges = <0x0 0x8000 0x1000>;
 912                 };
 913
 914                 target-module@14000 {                   /* 0x48014000, ap 18 58.0 */
 915                         compatible = "ti,sysc";
 916                         status = "disabled";
 917                         #address-cells = <1>;
 918                         #size-cells = <1>;
 919                         ranges = <0x0 0x14000 0x1000>;
 920                 };
 921
 922                 target-module@16000 {                   /* 0x48016000, ap 8 3c.0 */
 923                         compatible = "ti,sysc";
 924                         status = "disabled";
 925                         #address-cells = <1>;
 926                         #size-cells = <1>;
 927                         ranges = <0x0 0x16000 0x1000>;
 928                 };
 929
 930                 target-module@22000 {                   /* 0x48022000, ap 10 12.0 */
 931                         compatible = "ti,sysc-omap2", "ti,sysc";
 932                         reg = <0x22050 0x4>,
 933                               <0x22054 0x4>,
 934                               <0x22058 0x4>;
 935                         reg-names = "rev", "sysc", "syss";
 936                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 937                                          SYSC_OMAP2_SOFTRESET |
 938                                          SYSC_OMAP2_AUTOIDLE)>;
 939                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 940                                         <SYSC_IDLE_NO>,
 941                                         <SYSC_IDLE_SMART>,
 942                                         <SYSC_IDLE_SMART_WKUP>;
 943                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
 944                         clocks = <&l4ls_clkctrl AM3_L4LS_UART2_CLKCTRL 0>;
 945                         clock-names = "fck";
 946                         #address-cells = <1>;
 947                         #size-cells = <1>;
 948                         ranges = <0x0 0x22000 0x1000>;
 949
 950                         uart1: serial@0 {
 951                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 952                                 clock-frequency = <48000000>;
 953                                 reg = <0x0 0x1000>;
 954                                 interrupts = <73>;
 955                                 status = "disabled";
 956                                 dmas = <&edma 28 0>, <&edma 29 0>;
 957                                 dma-names = "tx", "rx";
 958                         };
 959                 };
 960
 961                 target-module@24000 {                   /* 0x48024000, ap 12 14.0 */
 962                         compatible = "ti,sysc-omap2", "ti,sysc";
 963                         reg = <0x24050 0x4>,
 964                               <0x24054 0x4>,
 965                               <0x24058 0x4>;
 966                         reg-names = "rev", "sysc", "syss";
 967                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
 968                                          SYSC_OMAP2_SOFTRESET |
 969                                          SYSC_OMAP2_AUTOIDLE)>;
 970                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 971                                         <SYSC_IDLE_NO>,
 972                                         <SYSC_IDLE_SMART>,
 973                                         <SYSC_IDLE_SMART_WKUP>;
 974                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
 975                         clocks = <&l4ls_clkctrl AM3_L4LS_UART3_CLKCTRL 0>;
 976                         clock-names = "fck";
 977                         #address-cells = <1>;
 978                         #size-cells = <1>;
 979                         ranges = <0x0 0x24000 0x1000>;
 980
 981                         uart2: serial@0 {
 982                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
 983                                 clock-frequency = <48000000>;
 984                                 reg = <0x0 0x1000>;
 985                                 interrupts = <74>;
 986                                 status = "disabled";
 987                                 dmas = <&edma 30 0>, <&edma 31 0>;
 988                                 dma-names = "tx", "rx";
 989                         };
 990                 };
 991
 992                 target-module@2a000 {                   /* 0x4802a000, ap 14 2a.0 */
 993                         compatible = "ti,sysc-omap2", "ti,sysc";
 994                         reg = <0x2a000 0x8>,
 995                               <0x2a010 0x8>,
 996                               <0x2a090 0x8>;
 997                         reg-names = "rev", "sysc", "syss";
 998                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
 999                                          SYSC_OMAP2_ENAWAKEUP |
1000                                          SYSC_OMAP2_SOFTRESET |
1001                                          SYSC_OMAP2_AUTOIDLE)>;
1002                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1003                                         <SYSC_IDLE_NO>,
1004                                         <SYSC_IDLE_SMART>,
1005                                         <SYSC_IDLE_SMART_WKUP>;
1006                         ti,syss-mask = <1>;
1007                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1008                         clocks = <&l4ls_clkctrl AM3_L4LS_I2C2_CLKCTRL 0>;
1009                         clock-names = "fck";
1010                         #address-cells = <1>;
1011                         #size-cells = <1>;
1012                         ranges = <0x0 0x2a000 0x1000>;
1013
1014                         i2c1: i2c@0 {
1015                                 compatible = "ti,omap4-i2c";
1016                                 #address-cells = <1>;
1017                                 #size-cells = <0>;
1018                                 reg = <0x0 0x1000>;
1019                                 interrupts = <71>;
1020                                 status = "disabled";
1021                         };
1022                 };
1023
1024                 target-module@30000 {                   /* 0x48030000, ap 77 08.0 */
1025                         compatible = "ti,sysc-omap2", "ti,sysc";
1026                         reg = <0x30000 0x4>,
1027                               <0x30110 0x4>,
1028                               <0x30114 0x4>;
1029                         reg-names = "rev", "sysc", "syss";
1030                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1031                                          SYSC_OMAP2_SOFTRESET |
1032                                          SYSC_OMAP2_AUTOIDLE)>;
1033                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1034                                         <SYSC_IDLE_NO>,
1035                                         <SYSC_IDLE_SMART>;
1036                         ti,syss-mask = <1>;
1037                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1038                         clocks = <&l4ls_clkctrl AM3_L4LS_SPI0_CLKCTRL 0>;
1039                         clock-names = "fck";
1040                         #address-cells = <1>;
1041                         #size-cells = <1>;
1042                         ranges = <0x0 0x30000 0x1000>;
1043
1044                         spi0: spi@0 {
1045                                 compatible = "ti,omap4-mcspi";
1046                                 #address-cells = <1>;
1047                                 #size-cells = <0>;
1048                                 reg = <0x0 0x400>;
1049                                 interrupts = <65>;
1050                                 ti,spi-num-cs = <2>;
1051                                 dmas = <&edma 16 0
1052                                         &edma 17 0
1053                                         &edma 18 0
1054                                         &edma 19 0>;
1055                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1056                                 status = "disabled";
1057                         };
1058                 };
1059
1060                 target-module@38000 {                   /* 0x48038000, ap 16 02.0 */
1061                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
1062                         reg = <0x38000 0x4>,
1063                               <0x38004 0x4>;
1064                         reg-names = "rev", "sysc";
1065                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1066                                         <SYSC_IDLE_NO>,
1067                                         <SYSC_IDLE_SMART>;
1068                         /* Domains (P, C): per_pwrdm, l3s_clkdm */
1069                         clocks = <&l3s_clkctrl AM3_L3S_MCASP0_CLKCTRL 0>;
1070                         clock-names = "fck";
1071                         #address-cells = <1>;
1072                         #size-cells = <1>;
1073                         ranges = <0x0 0x38000 0x2000>,
1074                                  <0x46000000 0x46000000 0x400000>;
1075
1076                         mcasp0: mcasp@0 {
1077                                 compatible = "ti,am33xx-mcasp-audio";
1078                                 reg = <0x0 0x2000>,
1079                                       <0x46000000 0x400000>;
1080                                 reg-names = "mpu", "dat";
1081                                 interrupts = <80>, <81>;
1082                                 interrupt-names = "tx", "rx";
1083                                 status = "disabled";
1084                                 dmas = <&edma 8 2>,
1085                                         <&edma 9 2>;
1086                                 dma-names = "tx", "rx";
1087                         };
1088                 };
1089
1090                 target-module@3c000 {                   /* 0x4803c000, ap 20 32.0 */
1091                         compatible = "ti,sysc-omap4-simple", "ti,sysc";
1092                         reg = <0x3c000 0x4>,
1093                               <0x3c004 0x4>;
1094                         reg-names = "rev", "sysc";
1095                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1096                                         <SYSC_IDLE_NO>,
1097                                         <SYSC_IDLE_SMART>;
1098                         /* Domains (P, C): per_pwrdm, l3s_clkdm */
1099                         clocks = <&l3s_clkctrl AM3_L3S_MCASP1_CLKCTRL 0>;
1100                         clock-names = "fck";
1101                         #address-cells = <1>;
1102                         #size-cells = <1>;
1103                         ranges = <0x0 0x3c000 0x2000>,
1104                                  <0x46400000 0x46400000 0x400000>;
1105
1106                         mcasp1: mcasp@0 {
1107                                 compatible = "ti,am33xx-mcasp-audio";
1108                                 reg = <0x0 0x2000>,
1109                                       <0x46400000 0x400000>;
1110                                 reg-names = "mpu", "dat";
1111                                 interrupts = <82>, <83>;
1112                                 interrupt-names = "tx", "rx";
1113                                 status = "disabled";
1114                                 dmas = <&edma 10 2>,
1115                                         <&edma 11 2>;
1116                                 dma-names = "tx", "rx";
1117                         };
1118                 };
1119
1120                 target-module@40000 {                   /* 0x48040000, ap 22 1e.0 */
1121                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1122                         ti,hwmods = "timer2";
1123                         reg = <0x40000 0x4>,
1124                               <0x40010 0x4>,
1125                               <0x40014 0x4>;
1126                         reg-names = "rev", "sysc", "syss";
1127                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1128                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1129                                         <SYSC_IDLE_NO>,
1130                                         <SYSC_IDLE_SMART>,
1131                                         <SYSC_IDLE_SMART_WKUP>;
1132                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1133                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER2_CLKCTRL 0>;
1134                         clock-names = "fck";
1135                         #address-cells = <1>;
1136                         #size-cells = <1>;
1137                         ranges = <0x0 0x40000 0x1000>;
1138
1139                         timer2: timer@0 {
1140                                 compatible = "ti,am335x-timer";
1141                                 reg = <0x0 0x400>;
1142                                 interrupts = <68>;
1143                                 clocks = <&timer2_fck>;
1144                                 clock-names = "fck";
1145                         };
1146                 };
1147
1148                 target-module@42000 {                   /* 0x48042000, ap 24 1c.0 */
1149                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1150                         reg = <0x42000 0x4>,
1151                               <0x42010 0x4>,
1152                               <0x42014 0x4>;
1153                         reg-names = "rev", "sysc", "syss";
1154                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1155                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1156                                         <SYSC_IDLE_NO>,
1157                                         <SYSC_IDLE_SMART>,
1158                                         <SYSC_IDLE_SMART_WKUP>;
1159                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1160                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER3_CLKCTRL 0>;
1161                         clock-names = "fck";
1162                         #address-cells = <1>;
1163                         #size-cells = <1>;
1164                         ranges = <0x0 0x42000 0x1000>;
1165
1166                         timer3: timer@0 {
1167                                 compatible = "ti,am335x-timer";
1168                                 reg = <0x0 0x400>;
1169                                 interrupts = <69>;
1170                         };
1171                 };
1172
1173                 target-module@44000 {                   /* 0x48044000, ap 26 26.0 */
1174                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1175                         reg = <0x44000 0x4>,
1176                               <0x44010 0x4>,
1177                               <0x44014 0x4>;
1178                         reg-names = "rev", "sysc", "syss";
1179                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1180                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1181                                         <SYSC_IDLE_NO>,
1182                                         <SYSC_IDLE_SMART>,
1183                                         <SYSC_IDLE_SMART_WKUP>;
1184                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1185                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER4_CLKCTRL 0>;
1186                         clock-names = "fck";
1187                         #address-cells = <1>;
1188                         #size-cells = <1>;
1189                         ranges = <0x0 0x44000 0x1000>;
1190
1191                         timer4: timer@0 {
1192                                 compatible = "ti,am335x-timer";
1193                                 reg = <0x0 0x400>;
1194                                 interrupts = <92>;
1195                                 ti,timer-pwm;
1196                         };
1197                 };
1198
1199                 target-module@46000 {                   /* 0x48046000, ap 28 28.0 */
1200                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1201                         reg = <0x46000 0x4>,
1202                               <0x46010 0x4>,
1203                               <0x46014 0x4>;
1204                         reg-names = "rev", "sysc", "syss";
1205                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1206                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1207                                         <SYSC_IDLE_NO>,
1208                                         <SYSC_IDLE_SMART>,
1209                                         <SYSC_IDLE_SMART_WKUP>;
1210                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1211                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER5_CLKCTRL 0>;
1212                         clock-names = "fck";
1213                         #address-cells = <1>;
1214                         #size-cells = <1>;
1215                         ranges = <0x0 0x46000 0x1000>;
1216
1217                         timer5: timer@0 {
1218                                 compatible = "ti,am335x-timer";
1219                                 reg = <0x0 0x400>;
1220                                 interrupts = <93>;
1221                                 ti,timer-pwm;
1222                         };
1223                 };
1224
1225                 target-module@48000 {                   /* 0x48048000, ap 30 22.0 */
1226                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1227                         reg = <0x48000 0x4>,
1228                               <0x48010 0x4>,
1229                               <0x48014 0x4>;
1230                         reg-names = "rev", "sysc", "syss";
1231                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1232                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1233                                         <SYSC_IDLE_NO>,
1234                                         <SYSC_IDLE_SMART>,
1235                                         <SYSC_IDLE_SMART_WKUP>;
1236                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1237                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER6_CLKCTRL 0>;
1238                         clock-names = "fck";
1239                         #address-cells = <1>;
1240                         #size-cells = <1>;
1241                         ranges = <0x0 0x48000 0x1000>;
1242
1243                         timer6: timer@0 {
1244                                 compatible = "ti,am335x-timer";
1245                                 reg = <0x0 0x400>;
1246                                 interrupts = <94>;
1247                                 ti,timer-pwm;
1248                         };
1249                 };
1250
1251                 target-module@4a000 {                   /* 0x4804a000, ap 85 60.0 */
1252                         compatible = "ti,sysc-omap4-timer", "ti,sysc";
1253                         reg = <0x4a000 0x4>,
1254                               <0x4a010 0x4>,
1255                               <0x4a014 0x4>;
1256                         reg-names = "rev", "sysc", "syss";
1257                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1258                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1259                                         <SYSC_IDLE_NO>,
1260                                         <SYSC_IDLE_SMART>,
1261                                         <SYSC_IDLE_SMART_WKUP>;
1262                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1263                         clocks = <&l4ls_clkctrl AM3_L4LS_TIMER7_CLKCTRL 0>;
1264                         clock-names = "fck";
1265                         #address-cells = <1>;
1266                         #size-cells = <1>;
1267                         ranges = <0x0 0x4a000 0x1000>;
1268
1269                         timer7: timer@0 {
1270                                 compatible = "ti,am335x-timer";
1271                                 reg = <0x0 0x400>;
1272                                 interrupts = <95>;
1273                                 ti,timer-pwm;
1274                         };
1275                 };
1276
1277                 target-module@4c000 {                   /* 0x4804c000, ap 32 36.0 */
1278                         compatible = "ti,sysc-omap2", "ti,sysc";
1279                         reg = <0x4c000 0x4>,
1280                               <0x4c010 0x4>,
1281                               <0x4c114 0x4>;
1282                         reg-names = "rev", "sysc", "syss";
1283                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1284                                          SYSC_OMAP2_SOFTRESET |
1285                                          SYSC_OMAP2_AUTOIDLE)>;
1286                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1287                                         <SYSC_IDLE_NO>,
1288                                         <SYSC_IDLE_SMART>,
1289                                         <SYSC_IDLE_SMART_WKUP>;
1290                         ti,syss-mask = <1>;
1291                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1292                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 0>,
1293                                  <&l4ls_clkctrl AM3_L4LS_GPIO2_CLKCTRL 18>;
1294                         clock-names = "fck", "dbclk";
1295                         #address-cells = <1>;
1296                         #size-cells = <1>;
1297                         ranges = <0x0 0x4c000 0x1000>;
1298
1299                         gpio1: gpio@0 {
1300                                 compatible = "ti,omap4-gpio";
1301                                 gpio-controller;
1302                                 #gpio-cells = <2>;
1303                                 interrupt-controller;
1304                                 #interrupt-cells = <2>;
1305                                 reg = <0x0 0x1000>;
1306                                 interrupts = <98>;
1307                         };
1308                 };
1309
1310                 target-module@50000 {                   /* 0x48050000, ap 34 2c.0 */
1311                         compatible = "ti,sysc";
1312                         status = "disabled";
1313                         #address-cells = <1>;
1314                         #size-cells = <1>;
1315                         ranges = <0x0 0x50000 0x2000>;
1316                 };
1317
1318                 target-module@60000 {                   /* 0x48060000, ap 36 0c.0 */
1319                         compatible = "ti,sysc-omap2", "ti,sysc";
1320                         reg = <0x602fc 0x4>,
1321                               <0x60110 0x4>,
1322                               <0x60114 0x4>;
1323                         reg-names = "rev", "sysc", "syss";
1324                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1325                                          SYSC_OMAP2_ENAWAKEUP |
1326                                          SYSC_OMAP2_SOFTRESET |
1327                                          SYSC_OMAP2_AUTOIDLE)>;
1328                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1329                                         <SYSC_IDLE_NO>,
1330                                         <SYSC_IDLE_SMART>;
1331                         ti,syss-mask = <1>;
1332                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1333                         clocks = <&l4ls_clkctrl AM3_L4LS_MMC1_CLKCTRL 0>;
1334                         clock-names = "fck";
1335                         #address-cells = <1>;
1336                         #size-cells = <1>;
1337                         ranges = <0x0 0x60000 0x1000>;
1338
1339                         mmc1: mmc@0 {
1340                                 compatible = "ti,omap4-hsmmc";
1341                                 ti,dual-volt;
1342                                 ti,needs-special-reset;
1343                                 ti,needs-special-hs-handling;
1344                                 dmas = <&edma_xbar 24 0 0
1345                                         &edma_xbar 25 0 0>;
1346                                 dma-names = "tx", "rx";
1347                                 interrupts = <64>;
1348                                 reg = <0x0 0x1000>;
1349                                 status = "disabled";
1350                         };
1351                 };
1352
1353                 target-module@80000 {                   /* 0x48080000, ap 38 18.0 */
1354                         compatible = "ti,sysc-omap2", "ti,sysc";
1355                         reg = <0x80000 0x4>,
1356                               <0x80010 0x4>,
1357                               <0x80014 0x4>;
1358                         reg-names = "rev", "sysc", "syss";
1359                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1360                                          SYSC_OMAP2_SOFTRESET |
1361                                          SYSC_OMAP2_AUTOIDLE)>;
1362                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1363                                         <SYSC_IDLE_NO>,
1364                                         <SYSC_IDLE_SMART>;
1365                         ti,syss-mask = <1>;
1366                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1367                         clocks = <&l4ls_clkctrl AM3_L4LS_ELM_CLKCTRL 0>;
1368                         clock-names = "fck";
1369                         #address-cells = <1>;
1370                         #size-cells = <1>;
1371                         ranges = <0x0 0x80000 0x10000>;
1372
1373                         elm: elm@0 {
1374                                 compatible = "ti,am3352-elm";
1375                                 reg = <0x0 0x2000>;
1376                                 interrupts = <4>;
1377                                 status = "disabled";
1378                         };
1379                 };
1380
1381                 target-module@a0000 {                   /* 0x480a0000, ap 40 5e.0 */
1382                         compatible = "ti,sysc";
1383                         status = "disabled";
1384                         #address-cells = <1>;
1385                         #size-cells = <1>;
1386                         ranges = <0x0 0xa0000 0x10000>;
1387                 };
1388
1389                 target-module@c8000 {                   /* 0x480c8000, ap 87 06.0 */
1390                         compatible = "ti,sysc-omap4", "ti,sysc";
1391                         reg = <0xc8000 0x4>,
1392                               <0xc8010 0x4>;
1393                         reg-names = "rev", "sysc";
1394                         ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1395                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1396                                         <SYSC_IDLE_NO>,
1397                                         <SYSC_IDLE_SMART>;
1398                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1399                         clocks = <&l4ls_clkctrl AM3_L4LS_MAILBOX_CLKCTRL 0>;
1400                         clock-names = "fck";
1401                         #address-cells = <1>;
1402                         #size-cells = <1>;
1403                         ranges = <0x0 0xc8000 0x1000>;
1404
1405                         mailbox: mailbox@0 {
1406                                 compatible = "ti,omap4-mailbox";
1407                                 reg = <0x0 0x200>;
1408                                 interrupts = <77>;
1409                                 #mbox-cells = <1>;
1410                                 ti,mbox-num-users = <4>;
1411                                 ti,mbox-num-fifos = <8>;
1412                                 mbox_wkupm3: wkup_m3 {
1413                                         ti,mbox-send-noirq;
1414                                         ti,mbox-tx = <0 0 0>;
1415                                         ti,mbox-rx = <0 0 3>;
1416                                 };
1417                         };
1418                 };
1419
1420                 target-module@ca000 {                   /* 0x480ca000, ap 91 40.0 */
1421                         compatible = "ti,sysc-omap2", "ti,sysc";
1422                         reg = <0xca000 0x4>,
1423                               <0xca010 0x4>,
1424                               <0xca014 0x4>;
1425                         reg-names = "rev", "sysc", "syss";
1426                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1427                                          SYSC_OMAP2_ENAWAKEUP |
1428                                          SYSC_OMAP2_SOFTRESET |
1429                                          SYSC_OMAP2_AUTOIDLE)>;
1430                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1431                                         <SYSC_IDLE_NO>,
1432                                         <SYSC_IDLE_SMART>;
1433                         ti,syss-mask = <1>;
1434                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1435                         clocks = <&l4ls_clkctrl AM3_L4LS_SPINLOCK_CLKCTRL 0>;
1436                         clock-names = "fck";
1437                         #address-cells = <1>;
1438                         #size-cells = <1>;
1439                         ranges = <0x0 0xca000 0x1000>;
1440
1441                         hwspinlock: spinlock@0 {
1442                                 compatible = "ti,omap4-hwspinlock";
1443                                 reg = <0x0 0x1000>;
1444                                 #hwlock-cells = <1>;
1445                         };
1446                 };
1447
1448                 target-module@cc000 {                   /* 0x480cc000, ap 89 0e.0 */
1449                         compatible = "ti,sysc";
1450                         status = "disabled";
1451                         #address-cells = <1>;
1452                         #size-cells = <1>;
1453                         ranges = <0x0 0xcc000 0x1000>;
1454                 };
1455         };
1456
1457         segment@100000 {                                        /* 0x48100000 */
1458                 compatible = "simple-bus";
1459                 #address-cells = <1>;
1460                 #size-cells = <1>;
1461                 ranges = <0x0008c000 0x0018c000 0x001000>,      /* ap 42 */
1462                          <0x0008d000 0x0018d000 0x001000>,      /* ap 43 */
1463                          <0x0008e000 0x0018e000 0x001000>,      /* ap 44 */
1464                          <0x0008f000 0x0018f000 0x001000>,      /* ap 45 */
1465                          <0x0009c000 0x0019c000 0x001000>,      /* ap 46 */
1466                          <0x0009d000 0x0019d000 0x001000>,      /* ap 47 */
1467                          <0x000a6000 0x001a6000 0x001000>,      /* ap 48 */
1468                          <0x000a7000 0x001a7000 0x001000>,      /* ap 49 */
1469                          <0x000a8000 0x001a8000 0x001000>,      /* ap 50 */
1470                          <0x000a9000 0x001a9000 0x001000>,      /* ap 51 */
1471                          <0x000aa000 0x001aa000 0x001000>,      /* ap 52 */
1472                          <0x000ab000 0x001ab000 0x001000>,      /* ap 53 */
1473                          <0x000ac000 0x001ac000 0x001000>,      /* ap 54 */
1474                          <0x000ad000 0x001ad000 0x001000>,      /* ap 55 */
1475                          <0x000ae000 0x001ae000 0x001000>,      /* ap 56 */
1476                          <0x000af000 0x001af000 0x001000>,      /* ap 57 */
1477                          <0x000b0000 0x001b0000 0x010000>,      /* ap 58 */
1478                          <0x000c0000 0x001c0000 0x001000>,      /* ap 59 */
1479                          <0x000cc000 0x001cc000 0x002000>,      /* ap 60 */
1480                          <0x000ce000 0x001ce000 0x002000>,      /* ap 61 */
1481                          <0x000d0000 0x001d0000 0x002000>,      /* ap 62 */
1482                          <0x000d2000 0x001d2000 0x002000>,      /* ap 63 */
1483                          <0x000d8000 0x001d8000 0x001000>,      /* ap 64 */
1484                          <0x000d9000 0x001d9000 0x001000>,      /* ap 65 */
1485                          <0x000a0000 0x001a0000 0x001000>,      /* ap 79 */
1486                          <0x000a1000 0x001a1000 0x001000>,      /* ap 80 */
1487                          <0x000a2000 0x001a2000 0x001000>,      /* ap 81 */
1488                          <0x000a3000 0x001a3000 0x001000>,      /* ap 82 */
1489                          <0x000a4000 0x001a4000 0x001000>,      /* ap 83 */
1490                          <0x000a5000 0x001a5000 0x001000>;      /* ap 84 */
1491
1492                 target-module@8c000 {                   /* 0x4818c000, ap 42 04.0 */
1493                         compatible = "ti,sysc";
1494                         status = "disabled";
1495                         #address-cells = <1>;
1496                         #size-cells = <1>;
1497                         ranges = <0x0 0x8c000 0x1000>;
1498                 };
1499
1500                 target-module@8e000 {                   /* 0x4818e000, ap 44 0a.0 */
1501                         compatible = "ti,sysc";
1502                         status = "disabled";
1503                         #address-cells = <1>;
1504                         #size-cells = <1>;
1505                         ranges = <0x0 0x8e000 0x1000>;
1506                 };
1507
1508                 target-module@9c000 {                   /* 0x4819c000, ap 46 5a.0 */
1509                         compatible = "ti,sysc-omap2", "ti,sysc";
1510                         reg = <0x9c000 0x8>,
1511                               <0x9c010 0x8>,
1512                               <0x9c090 0x8>;
1513                         reg-names = "rev", "sysc", "syss";
1514                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1515                                          SYSC_OMAP2_ENAWAKEUP |
1516                                          SYSC_OMAP2_SOFTRESET |
1517                                          SYSC_OMAP2_AUTOIDLE)>;
1518                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1519                                         <SYSC_IDLE_NO>,
1520                                         <SYSC_IDLE_SMART>,
1521                                         <SYSC_IDLE_SMART_WKUP>;
1522                         ti,syss-mask = <1>;
1523                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1524                         clocks = <&l4ls_clkctrl AM3_L4LS_I2C3_CLKCTRL 0>;
1525                         clock-names = "fck";
1526                         #address-cells = <1>;
1527                         #size-cells = <1>;
1528                         ranges = <0x0 0x9c000 0x1000>;
1529
1530                         i2c2: i2c@0 {
1531                                 compatible = "ti,omap4-i2c";
1532                                 #address-cells = <1>;
1533                                 #size-cells = <0>;
1534                                 reg = <0x0 0x1000>;
1535                                 interrupts = <30>;
1536                                 status = "disabled";
1537                         };
1538                 };
1539
1540                 target-module@a0000 {                   /* 0x481a0000, ap 79 24.0 */
1541                         compatible = "ti,sysc-omap2", "ti,sysc";
1542                         reg = <0xa0000 0x4>,
1543                               <0xa0110 0x4>,
1544                               <0xa0114 0x4>;
1545                         reg-names = "rev", "sysc", "syss";
1546                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1547                                          SYSC_OMAP2_SOFTRESET |
1548                                          SYSC_OMAP2_AUTOIDLE)>;
1549                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1550                                         <SYSC_IDLE_NO>,
1551                                         <SYSC_IDLE_SMART>;
1552                         ti,syss-mask = <1>;
1553                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1554                         clocks = <&l4ls_clkctrl AM3_L4LS_SPI1_CLKCTRL 0>;
1555                         clock-names = "fck";
1556                         #address-cells = <1>;
1557                         #size-cells = <1>;
1558                         ranges = <0x0 0xa0000 0x1000>;
1559
1560                         spi1: spi@0 {
1561                                 compatible = "ti,omap4-mcspi";
1562                                 #address-cells = <1>;
1563                                 #size-cells = <0>;
1564                                 reg = <0x0 0x400>;
1565                                 interrupts = <125>;
1566                                 ti,spi-num-cs = <2>;
1567                                 dmas = <&edma 42 0
1568                                         &edma 43 0
1569                                         &edma 44 0
1570                                         &edma 45 0>;
1571                                 dma-names = "tx0", "rx0", "tx1", "rx1";
1572                                 status = "disabled";
1573                         };
1574                 };
1575
1576                 target-module@a2000 {                   /* 0x481a2000, ap 81 2e.0 */
1577                         compatible = "ti,sysc";
1578                         status = "disabled";
1579                         #address-cells = <1>;
1580                         #size-cells = <1>;
1581                         ranges = <0x0 0xa2000 0x1000>;
1582                 };
1583
1584                 target-module@a4000 {                   /* 0x481a4000, ap 83 30.0 */
1585                         compatible = "ti,sysc";
1586                         status = "disabled";
1587                         #address-cells = <1>;
1588                         #size-cells = <1>;
1589                         ranges = <0x0 0xa4000 0x1000>;
1590                 };
1591
1592                 target-module@a6000 {                   /* 0x481a6000, ap 48 16.0 */
1593                         compatible = "ti,sysc-omap2", "ti,sysc";
1594                         reg = <0xa6050 0x4>,
1595                               <0xa6054 0x4>,
1596                               <0xa6058 0x4>;
1597                         reg-names = "rev", "sysc", "syss";
1598                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1599                                          SYSC_OMAP2_SOFTRESET |
1600                                          SYSC_OMAP2_AUTOIDLE)>;
1601                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1602                                         <SYSC_IDLE_NO>,
1603                                         <SYSC_IDLE_SMART>,
1604                                         <SYSC_IDLE_SMART_WKUP>;
1605                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1606                         clocks = <&l4ls_clkctrl AM3_L4LS_UART4_CLKCTRL 0>;
1607                         clock-names = "fck";
1608                         #address-cells = <1>;
1609                         #size-cells = <1>;
1610                         ranges = <0x0 0xa6000 0x1000>;
1611
1612                         uart3: serial@0 {
1613                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1614                                 clock-frequency = <48000000>;
1615                                 reg = <0x0 0x1000>;
1616                                 interrupts = <44>;
1617                                 status = "disabled";
1618                         };
1619                 };
1620
1621                 target-module@a8000 {                   /* 0x481a8000, ap 50 20.0 */
1622                         compatible = "ti,sysc-omap2", "ti,sysc";
1623                         reg = <0xa8050 0x4>,
1624                               <0xa8054 0x4>,
1625                               <0xa8058 0x4>;
1626                         reg-names = "rev", "sysc", "syss";
1627                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1628                                          SYSC_OMAP2_SOFTRESET |
1629                                          SYSC_OMAP2_AUTOIDLE)>;
1630                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1631                                         <SYSC_IDLE_NO>,
1632                                         <SYSC_IDLE_SMART>,
1633                                         <SYSC_IDLE_SMART_WKUP>;
1634                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1635                         clocks = <&l4ls_clkctrl AM3_L4LS_UART5_CLKCTRL 0>;
1636                         clock-names = "fck";
1637                         #address-cells = <1>;
1638                         #size-cells = <1>;
1639                         ranges = <0x0 0xa8000 0x1000>;
1640
1641                         uart4: serial@0 {
1642                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1643                                 clock-frequency = <48000000>;
1644                                 reg = <0x0 0x1000>;
1645                                 interrupts = <45>;
1646                                 status = "disabled";
1647                         };
1648                 };
1649
1650                 target-module@aa000 {                   /* 0x481aa000, ap 52 1a.0 */
1651                         compatible = "ti,sysc-omap2", "ti,sysc";
1652                         reg = <0xaa050 0x4>,
1653                               <0xaa054 0x4>,
1654                               <0xaa058 0x4>;
1655                         reg-names = "rev", "sysc", "syss";
1656                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1657                                          SYSC_OMAP2_SOFTRESET |
1658                                          SYSC_OMAP2_AUTOIDLE)>;
1659                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1660                                         <SYSC_IDLE_NO>,
1661                                         <SYSC_IDLE_SMART>,
1662                                         <SYSC_IDLE_SMART_WKUP>;
1663                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1664                         clocks = <&l4ls_clkctrl AM3_L4LS_UART6_CLKCTRL 0>;
1665                         clock-names = "fck";
1666                         #address-cells = <1>;
1667                         #size-cells = <1>;
1668                         ranges = <0x0 0xaa000 0x1000>;
1669
1670                         uart5: serial@0 {
1671                                 compatible = "ti,am3352-uart", "ti,omap3-uart";
1672                                 clock-frequency = <48000000>;
1673                                 reg = <0x0 0x1000>;
1674                                 interrupts = <46>;
1675                                 status = "disabled";
1676                         };
1677                 };
1678
1679                 target-module@ac000 {                   /* 0x481ac000, ap 54 38.0 */
1680                         compatible = "ti,sysc-omap2", "ti,sysc";
1681                         reg = <0xac000 0x4>,
1682                               <0xac010 0x4>,
1683                               <0xac114 0x4>;
1684                         reg-names = "rev", "sysc", "syss";
1685                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1686                                          SYSC_OMAP2_SOFTRESET |
1687                                          SYSC_OMAP2_AUTOIDLE)>;
1688                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1689                                         <SYSC_IDLE_NO>,
1690                                         <SYSC_IDLE_SMART>,
1691                                         <SYSC_IDLE_SMART_WKUP>;
1692                         ti,syss-mask = <1>;
1693                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1694                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 0>,
1695                                  <&l4ls_clkctrl AM3_L4LS_GPIO3_CLKCTRL 18>;
1696                         clock-names = "fck", "dbclk";
1697                         #address-cells = <1>;
1698                         #size-cells = <1>;
1699                         ranges = <0x0 0xac000 0x1000>;
1700
1701                         gpio2: gpio@0 {
1702                                 compatible = "ti,omap4-gpio";
1703                                 gpio-controller;
1704                                 #gpio-cells = <2>;
1705                                 interrupt-controller;
1706                                 #interrupt-cells = <2>;
1707                                 reg = <0x0 0x1000>;
1708                                 interrupts = <32>;
1709                         };
1710                 };
1711
1712                 target-module@ae000 {                   /* 0x481ae000, ap 56 3a.0 */
1713                         compatible = "ti,sysc-omap2", "ti,sysc";
1714                         reg = <0xae000 0x4>,
1715                               <0xae010 0x4>,
1716                               <0xae114 0x4>;
1717                         reg-names = "rev", "sysc", "syss";
1718                         ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1719                                          SYSC_OMAP2_SOFTRESET |
1720                                          SYSC_OMAP2_AUTOIDLE)>;
1721                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1722                                         <SYSC_IDLE_NO>,
1723                                         <SYSC_IDLE_SMART>,
1724                                         <SYSC_IDLE_SMART_WKUP>;
1725                         ti,syss-mask = <1>;
1726                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1727                         clocks = <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 0>,
1728                                  <&l4ls_clkctrl AM3_L4LS_GPIO4_CLKCTRL 18>;
1729                         clock-names = "fck", "dbclk";
1730                         #address-cells = <1>;
1731                         #size-cells = <1>;
1732                         ranges = <0x0 0xae000 0x1000>;
1733
1734                         gpio3: gpio@0 {
1735                                 compatible = "ti,omap4-gpio";
1736                                 gpio-controller;
1737                                 #gpio-cells = <2>;
1738                                 interrupt-controller;
1739                                 #interrupt-cells = <2>;
1740                                 reg = <0x0 0x1000>;
1741                                 interrupts = <62>;
1742                         };
1743                 };
1744
1745                 target-module@b0000 {                   /* 0x481b0000, ap 58 50.0 */
1746                         compatible = "ti,sysc";
1747                         status = "disabled";
1748                         #address-cells = <1>;
1749                         #size-cells = <1>;
1750                         ranges = <0x0 0xb0000 0x10000>;
1751                 };
1752
1753                 target-module@cc000 {                   /* 0x481cc000, ap 60 46.0 */
1754                         compatible = "ti,sysc-omap4", "ti,sysc";
1755                         reg = <0xcc020 0x4>;
1756                         reg-names = "rev";
1757                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1758                         clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>,
1759                                  <&dcan0_fck>;
1760                         clock-names = "fck", "osc";
1761                         #address-cells = <1>;
1762                         #size-cells = <1>;
1763                         ranges = <0x0 0xcc000 0x2000>;
1764
1765                         dcan0: can@0 {
1766                                 compatible = "ti,am3352-d_can";
1767                                 reg = <0x0 0x2000>;
1768                                 clocks = <&dcan0_fck>;
1769                                 clock-names = "fck";
1770                                 syscon-raminit = <&scm_conf 0x644 0>;
1771                                 interrupts = <52>;
1772                                 status = "disabled";
1773                         };
1774                 };
1775
1776                 target-module@d0000 {                   /* 0x481d0000, ap 62 42.0 */
1777                         compatible = "ti,sysc-omap4", "ti,sysc";
1778                         reg = <0xd0020 0x4>;
1779                         reg-names = "rev";
1780                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1781                         clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>,
1782                                  <&dcan1_fck>;
1783                         clock-names = "fck", "osc";
1784                         #address-cells = <1>;
1785                         #size-cells = <1>;
1786                         ranges = <0x0 0xd0000 0x2000>;
1787
1788                         dcan1: can@0 {
1789                                 compatible = "ti,am3352-d_can";
1790                                 reg = <0x0 0x2000>;
1791                                 clocks = <&dcan1_fck>;
1792                                 clock-names = "fck";
1793                                 syscon-raminit = <&scm_conf 0x644 1>;
1794                                 interrupts = <55>;
1795                                 status = "disabled";
1796                         };
1797                 };
1798
1799                 target-module@d8000 {                   /* 0x481d8000, ap 64 66.0 */
1800                         compatible = "ti,sysc-omap2", "ti,sysc";
1801                         reg = <0xd82fc 0x4>,
1802                               <0xd8110 0x4>,
1803                               <0xd8114 0x4>;
1804                         reg-names = "rev", "sysc", "syss";
1805                         ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1806                                          SYSC_OMAP2_ENAWAKEUP |
1807                                          SYSC_OMAP2_SOFTRESET |
1808                                          SYSC_OMAP2_AUTOIDLE)>;
1809                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1810                                         <SYSC_IDLE_NO>,
1811                                         <SYSC_IDLE_SMART>;
1812                         ti,syss-mask = <1>;
1813                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1814                         clocks = <&l4ls_clkctrl AM3_L4LS_MMC2_CLKCTRL 0>;
1815                         clock-names = "fck";
1816                         #address-cells = <1>;
1817                         #size-cells = <1>;
1818                         ranges = <0x0 0xd8000 0x1000>;
1819
1820                         mmc2: mmc@0 {
1821                                 compatible = "ti,omap4-hsmmc";
1822                                 ti,needs-special-reset;
1823                                 dmas = <&edma 2 0
1824                                         &edma 3 0>;
1825                                 dma-names = "tx", "rx";
1826                                 interrupts = <28>;
1827                                 reg = <0x0 0x1000>;
1828                                 status = "disabled";
1829                         };
1830                 };
1831         };
1832
1833         segment@200000 {                                        /* 0x48200000 */
1834                 compatible = "simple-bus";
1835                 #address-cells = <1>;
1836                 #size-cells = <1>;
1837         };
1838
1839         segment@300000 {                                        /* 0x48300000 */
1840                 compatible = "simple-bus";
1841                 #address-cells = <1>;
1842                 #size-cells = <1>;
1843                 ranges = <0x00000000 0x00300000 0x001000>,      /* ap 66 */
1844                          <0x00001000 0x00301000 0x001000>,      /* ap 67 */
1845                          <0x00002000 0x00302000 0x001000>,      /* ap 68 */
1846                          <0x00003000 0x00303000 0x001000>,      /* ap 69 */
1847                          <0x00004000 0x00304000 0x001000>,      /* ap 70 */
1848                          <0x00005000 0x00305000 0x001000>,      /* ap 71 */
1849                          <0x0000e000 0x0030e000 0x001000>,      /* ap 72 */
1850                          <0x0000f000 0x0030f000 0x001000>,      /* ap 73 */
1851                          <0x00018000 0x00318000 0x004000>,      /* ap 74 */
1852                          <0x0001c000 0x0031c000 0x001000>,      /* ap 75 */
1853                          <0x00010000 0x00310000 0x002000>,      /* ap 76 */
1854                          <0x00012000 0x00312000 0x001000>,      /* ap 93 */
1855                          <0x00015000 0x00315000 0x001000>,      /* ap 94 */
1856                          <0x00016000 0x00316000 0x001000>,      /* ap 95 */
1857                          <0x00017000 0x00317000 0x001000>,      /* ap 96 */
1858                          <0x00013000 0x00313000 0x001000>,      /* ap 97 */
1859                          <0x00014000 0x00314000 0x001000>,      /* ap 98 */
1860                          <0x00020000 0x00320000 0x001000>,      /* ap 99 */
1861                          <0x00021000 0x00321000 0x001000>,      /* ap 100 */
1862                          <0x00022000 0x00322000 0x001000>,      /* ap 101 */
1863                          <0x00023000 0x00323000 0x001000>,      /* ap 102 */
1864                          <0x00024000 0x00324000 0x001000>,      /* ap 103 */
1865                          <0x00025000 0x00325000 0x001000>;      /* ap 104 */
1866
1867                 target-module@0 {                       /* 0x48300000, ap 66 48.0 */
1868                         compatible = "ti,sysc-omap4", "ti,sysc";
1869                         reg = <0x0 0x4>,
1870                               <0x4 0x4>;
1871                         reg-names = "rev", "sysc";
1872                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1873                                         <SYSC_IDLE_NO>,
1874                                         <SYSC_IDLE_SMART>,
1875                                         <SYSC_IDLE_SMART_WKUP>;
1876                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1877                                         <SYSC_IDLE_NO>,
1878                                         <SYSC_IDLE_SMART>,
1879                                         <SYSC_IDLE_SMART_WKUP>;
1880                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1881                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS0_CLKCTRL 0>;
1882                         clock-names = "fck";
1883                         #address-cells = <1>;
1884                         #size-cells = <1>;
1885                         ranges = <0x0 0x0 0x1000>;
1886
1887                         epwmss0: epwmss@0 {
1888                                 compatible = "ti,am33xx-pwmss";
1889                                 reg = <0x0 0x10>;
1890                                 #address-cells = <1>;
1891                                 #size-cells = <1>;
1892                                 status = "disabled";
1893                                 ranges = <0 0 0x1000>;
1894
1895                                 ecap0: ecap@100 {
1896                                         compatible = "ti,am3352-ecap",
1897                                                      "ti,am33xx-ecap";
1898                                         #pwm-cells = <3>;
1899                                         reg = <0x100 0x80>;
1900                                         clocks = <&l4ls_gclk>;
1901                                         clock-names = "fck";
1902                                         interrupts = <31>;
1903                                         interrupt-names = "ecap0";
1904                                         status = "disabled";
1905                                 };
1906
1907                                 ehrpwm0: pwm@200 {
1908                                         compatible = "ti,am3352-ehrpwm",
1909                                                      "ti,am33xx-ehrpwm";
1910                                         #pwm-cells = <3>;
1911                                         reg = <0x200 0x80>;
1912                                         clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1913                                         clock-names = "tbclk", "fck";
1914                                         status = "disabled";
1915                                 };
1916                         };
1917                 };
1918
1919                 target-module@2000 {                    /* 0x48302000, ap 68 52.0 */
1920                         compatible = "ti,sysc-omap4", "ti,sysc";
1921                         reg = <0x2000 0x4>,
1922                               <0x2004 0x4>;
1923                         reg-names = "rev", "sysc";
1924                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1925                                         <SYSC_IDLE_NO>,
1926                                         <SYSC_IDLE_SMART>,
1927                                         <SYSC_IDLE_SMART_WKUP>;
1928                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1929                                         <SYSC_IDLE_NO>,
1930                                         <SYSC_IDLE_SMART>,
1931                                         <SYSC_IDLE_SMART_WKUP>;
1932                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1933                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS1_CLKCTRL 0>;
1934                         clock-names = "fck";
1935                         #address-cells = <1>;
1936                         #size-cells = <1>;
1937                         ranges = <0x0 0x2000 0x1000>;
1938
1939                         epwmss1: epwmss@0 {
1940                                 compatible = "ti,am33xx-pwmss";
1941                                 reg = <0x0 0x10>;
1942                                 #address-cells = <1>;
1943                                 #size-cells = <1>;
1944                                 status = "disabled";
1945                                 ranges = <0 0 0x1000>;
1946
1947                                 ecap1: ecap@100 {
1948                                         compatible = "ti,am3352-ecap",
1949                                                      "ti,am33xx-ecap";
1950                                         #pwm-cells = <3>;
1951                                         reg = <0x100 0x80>;
1952                                         clocks = <&l4ls_gclk>;
1953                                         clock-names = "fck";
1954                                         interrupts = <47>;
1955                                         interrupt-names = "ecap1";
1956                                         status = "disabled";
1957                                 };
1958
1959                                 ehrpwm1: pwm@200 {
1960                                         compatible = "ti,am3352-ehrpwm",
1961                                                      "ti,am33xx-ehrpwm";
1962                                         #pwm-cells = <3>;
1963                                         reg = <0x200 0x80>;
1964                                         clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1965                                         clock-names = "tbclk", "fck";
1966                                         status = "disabled";
1967                                 };
1968                         };
1969                 };
1970
1971                 target-module@4000 {                    /* 0x48304000, ap 70 44.0 */
1972                         compatible = "ti,sysc-omap4", "ti,sysc";
1973                         reg = <0x4000 0x4>,
1974                               <0x4004 0x4>;
1975                         reg-names = "rev", "sysc";
1976                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
1977                                         <SYSC_IDLE_NO>,
1978                                         <SYSC_IDLE_SMART>,
1979                                         <SYSC_IDLE_SMART_WKUP>;
1980                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1981                                         <SYSC_IDLE_NO>,
1982                                         <SYSC_IDLE_SMART>,
1983                                         <SYSC_IDLE_SMART_WKUP>;
1984                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1985                         clocks = <&l4ls_clkctrl AM3_L4LS_EPWMSS2_CLKCTRL 0>;
1986                         clock-names = "fck";
1987                         #address-cells = <1>;
1988                         #size-cells = <1>;
1989                         ranges = <0x0 0x4000 0x1000>;
1990
1991                         epwmss2: epwmss@0 {
1992                                 compatible = "ti,am33xx-pwmss";
1993                                 reg = <0x0 0x10>;
1994                                 #address-cells = <1>;
1995                                 #size-cells = <1>;
1996                                 status = "disabled";
1997                                 ranges = <0 0 0x1000>;
1998
1999                                 ecap2: ecap@100 {
2000                                         compatible = "ti,am3352-ecap",
2001                                                      "ti,am33xx-ecap";
2002                                         #pwm-cells = <3>;
2003                                         reg = <0x100 0x80>;
2004                                         clocks = <&l4ls_gclk>;
2005                                         clock-names = "fck";
2006                                         interrupts = <61>;
2007                                         interrupt-names = "ecap2";
2008                                         status = "disabled";
2009                                 };
2010
2011                                 ehrpwm2: pwm@200 {
2012                                         compatible = "ti,am3352-ehrpwm",
2013                                                      "ti,am33xx-ehrpwm";
2014                                         #pwm-cells = <3>;
2015                                         reg = <0x200 0x80>;
2016                                         clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
2017                                         clock-names = "tbclk", "fck";
2018                                         status = "disabled";
2019                                 };
2020                         };
2021                 };
2022
2023                 target-module@e000 {                    /* 0x4830e000, ap 72 4a.0 */
2024                         compatible = "ti,sysc-omap4", "ti,sysc";
2025                         reg = <0xe000 0x4>,
2026                               <0xe054 0x4>;
2027                         reg-names = "rev", "sysc";
2028                         ti,sysc-midle = <SYSC_IDLE_FORCE>,
2029                                         <SYSC_IDLE_NO>,
2030                                         <SYSC_IDLE_SMART>;
2031                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2032                                         <SYSC_IDLE_NO>,
2033                                         <SYSC_IDLE_SMART>;
2034                         /* Domains (P, C): per_pwrdm, lcdc_clkdm */
2035                         clocks = <&lcdc_clkctrl AM3_LCDC_LCDC_CLKCTRL 0>;
2036                         clock-names = "fck";
2037                         #address-cells = <1>;
2038                         #size-cells = <1>;
2039                         ranges = <0x0 0xe000 0x1000>;
2040
2041                         lcdc: lcdc@0 {
2042                                 compatible = "ti,am33xx-tilcdc";
2043                                 reg = <0x0 0x1000>;
2044                                 interrupts = <36>;
2045                                 status = "disabled";
2046                         };
2047                 };
2048
2049                 target-module@10000 {                   /* 0x48310000, ap 76 4e.1 */
2050                         compatible = "ti,sysc-omap2", "ti,sysc";
2051                         reg = <0x11fe0 0x4>,
2052                               <0x11fe4 0x4>;
2053                         reg-names = "rev", "sysc";
2054                         ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
2055                         ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2056                                         <SYSC_IDLE_NO>;
2057                         /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2058                         clocks = <&l4ls_clkctrl AM3_L4LS_RNG_CLKCTRL 0>;
2059                         clock-names = "fck";
2060                         #address-cells = <1>;
2061                         #size-cells = <1>;
2062                         ranges = <0x0 0x10000 0x2000>;
2063
2064                         rng: rng@0 {
2065                                 compatible = "ti,omap4-rng";
2066                                 reg = <0x0 0x2000>;
2067                                 interrupts = <111>;
2068                         };
2069                 };
2070
2071                 target-module@13000 {                   /* 0x48313000, ap 97 62.0 */
2072                         compatible = "ti,sysc";
2073                         status = "disabled";
2074                         #address-cells = <1>;
2075                         #size-cells = <1>;
2076                         ranges = <0x0 0x13000 0x1000>;
2077                 };
2078
2079                 target-module@15000 {                   /* 0x48315000, ap 94 56.0 */
2080                         compatible = "ti,sysc";
2081                         status = "disabled";
2082                         #address-cells = <1>;
2083                         #size-cells = <1>;
2084                         ranges = <0x00000000 0x00015000 0x00001000>,
2085                                  <0x00001000 0x00016000 0x00001000>;
2086                 };
2087
2088                 target-module@18000 {                   /* 0x48318000, ap 74 4c.0 */
2089                         compatible = "ti,sysc";
2090                         status = "disabled";
2091                         #address-cells = <1>;
2092                         #size-cells = <1>;
2093                         ranges = <0x0 0x18000 0x4000>;
2094                 };
2095
2096                 target-module@20000 {                   /* 0x48320000, ap 99 34.0 */
2097                         compatible = "ti,sysc";
2098                         status = "disabled";
2099                         #address-cells = <1>;
2100                         #size-cells = <1>;
2101                         ranges = <0x0 0x20000 0x1000>;
2102                 };
2103
2104                 target-module@22000 {                   /* 0x48322000, ap 101 3e.0 */
2105                         compatible = "ti,sysc";
2106                         status = "disabled";
2107                         #address-cells = <1>;
2108                         #size-cells = <1>;
2109                         ranges = <0x0 0x22000 0x1000>;
2110                 };
2111
2112                 target-module@24000 {                   /* 0x48324000, ap 103 68.0 */
2113                         compatible = "ti,sysc";
2114                         status = "disabled";
2115                         #address-cells = <1>;
2116                         #size-cells = <1>;
2117                         ranges = <0x0 0x24000 0x1000>;
2118                 };
2119         };
2120 };
2121