2 * Copyright (C) 2015 Toby Churchill - http://www.toby-churchill.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 #include "am33xx.dtsi"
13 model = "Toby Churchill SL50 Series";
14 compatible = "tcl,am335x-sl50", "ti,am33xx";
18 cpu0-supply = <&dcdc2_reg>;
23 device_type = "memory";
24 reg = <0x80000000 0x20000000>; /* 512 MB */
32 compatible = "gpio-leds";
33 pinctrl-names = "default";
34 pinctrl-0 = <&led_pins>;
37 label = "sl50:green:usr0";
38 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
39 default-state = "off";
43 label = "sl50:red:usr1";
44 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
45 default-state = "off";
49 label = "sl50:green:usr2";
50 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
51 default-state = "off";
55 label = "sl50:red:usr3";
56 gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
57 default-state = "off";
62 compatible = "pwm-backlight";
63 pwms = <&ehrpwm1 0 500000 0>;
64 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
65 default-brightness-level = <6>;
69 compatible = "pwm-backlight";
70 pwms = <&ehrpwm1 1 500000 0>;
71 brightness-levels = <0 10 20 30 40 50 60 70 80 90 99>;
72 default-brightness-level = <6>;
76 compatible = "simple-bus";
80 /* audio external oscillator */
81 tlv320aic3x_mclk: oscillator@0 {
82 compatible = "fixed-clock";
84 clock-frequency = <24576000>; /* 24.576MHz */
89 compatible = "ti,da830-evm-audio";
90 ti,model = "AM335x-SL50";
91 ti,audio-codec = <&audio_codec>;
92 ti,mcasp-controller = <&mcasp0>;
94 clocks = <&tlv320aic3x_mclk>;
98 "Headphone Jack", "HPLOUT",
99 "Headphone Jack", "HPROUT",
104 emmc_pwrseq: pwrseq@0 {
105 compatible = "mmc-pwrseq-emmc";
106 pinctrl-names = "default";
107 pinctrl-0 = <&emmc_pwrseq_pins>;
108 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
111 vmmcsd_fixed: fixedregulator0 {
112 compatible = "regulator-fixed";
113 regulator-name = "vmmcsd_fixed";
114 regulator-min-microvolt = <3300000>;
115 regulator-max-microvolt = <3300000>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&lwb_pins>;
123 led_pins: pinmux_led_pins {
124 pinctrl-single,pins = <
125 AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 */
126 AM33XX_IOPAD(0x858, PIN_OUTPUT | MUX_MODE7) /* gpmc_a6.gpio1_22 */
127 AM33XX_IOPAD(0x85c, PIN_OUTPUT | MUX_MODE7) /* gpmc_a7.gpio1_23 */
128 AM33XX_IOPAD(0x860, PIN_OUTPUT | MUX_MODE7) /* gpmc_a8.gpio1_24 */
132 uart0_pins: pinmux_uart0_pins {
133 pinctrl-single,pins = <
134 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
135 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
139 uart4_pins: pinmux_uart4_pins {
140 pinctrl-single,pins = <
141 AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE6) /* gpmc_wait0.uart4_rxd */
142 AM33XX_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* gpmc_wpn.uart4_txd */
146 i2c0_pins: pinmux_i2c0_pins {
147 pinctrl-single,pins = <
148 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
149 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
153 i2c1_pins: pinmux_i2c1_pins {
154 pinctrl-single,pins = <
155 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
156 AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txdi2c1_scl */
160 i2c2_pins: pinmux_i2c2_pins {
161 pinctrl-single,pins = <
162 AM33XX_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
163 AM33XX_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
167 cpsw_default: cpsw_default {
168 pinctrl-single,pins = <
170 AM33XX_IOPAD(0x910, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
171 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
172 AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
173 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
174 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
175 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
176 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
177 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
178 AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
179 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
180 AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
181 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
182 AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
186 cpsw_sleep: cpsw_sleep {
187 pinctrl-single,pins = <
188 /* Slave 1 reset value */
189 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
190 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
191 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
192 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
193 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
194 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
195 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
196 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
197 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
198 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
199 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
200 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
201 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
205 davinci_mdio_default: davinci_mdio_default {
206 pinctrl-single,pins = <
208 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
209 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
213 davinci_mdio_sleep: davinci_mdio_sleep {
214 pinctrl-single,pins = <
215 /* MDIO reset value */
216 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
217 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
221 mmc1_pins: pinmux_mmc1_pins {
222 pinctrl-single,pins = <
223 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
227 emmc_pwrseq_pins: pinmux_emmc_pwrseq_pins {
228 pinctrl-single,pins = <
229 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a4.gpio1_20 */
233 emmc_pins: pinmux_emmc_pins {
234 pinctrl-single,pins = <
235 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
236 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
237 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
238 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
239 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
240 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
241 AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
242 AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
243 AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
244 AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
248 audio_pins: pinmux_audio_pins {
249 pinctrl-single,pins = <
250 AM33XX_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
251 AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_fsx.mcasp0_fsx */
252 AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_aclkx.mcasp0_aclkx */
253 AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr0.mcasp0_axr0 */
254 AM33XX_IOPAD(0x99c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2 */
258 ehrpwm1_pins: pinmux_ehrpwm1a_pins {
259 pinctrl-single,pins = <
260 AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE6) /* gpmc_a2.ehrpwm1a */
261 AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE6) /* gpmc_a3.ehrpwm1b */
265 lwb_pins: pinmux_lwb_pins {
266 pinctrl-single,pins = <
267 AM33XX_IOPAD(0x9a4, PIN_OUTPUT | MUX_MODE7) /* SoundPA_en - mcasp0_fsr.gpio3_19 */
268 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE7) /* nKbdOnC - gpmc_ad10.gpio0_26 */
269 AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdInt - gpmc_ad12.gpio1_12 */
270 AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE7) /* nKbdReset - gpmc_ad13.gpio1_13 */
271 AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE7) /* nDispReset - gpmc_ad14.gpio1_14 */
272 AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* USB1_enPower - gpmc_a1.gpio1_17 */
273 /* AVR Programming - SPI Bus (bit bang) - Screen and Keyboard */
274 AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMOSI spi0_d0.gpio0_3 */
275 AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattMISO spi0_d1.gpio0_4 */
276 AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE7) /* Kbd/Disp/BattSCLK spi0_clk.gpio0_2 */
277 /* PDI Bus - Battery system */
278 AM33XX_IOPAD(0x840, PIN_INPUT_PULLUP | MUX_MODE7) /* nBattReset gpmc_a0.gpio1_16 */
279 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE7) /* BattPDIData gpmc_ad15.gpio1_15 */
286 pinctrl-names = "default";
287 pinctrl-0 = <&i2c0_pins>;
289 clock-frequency = <400000>;
296 compatible = "at,24c256";
303 pinctrl-names = "default";
304 pinctrl-0 = <&i2c1_pins>;
309 pinctrl-names = "default";
310 pinctrl-0 = <&i2c2_pins>;
312 clock-frequency = <400000>;
314 audio_codec: tlv320aic3106@1b {
316 compatible = "ti,tlv320aic3106";
319 AVDD-supply = <&ldo4_reg>;
320 IOVDD-supply = <&ldo4_reg>;
321 DRVDD-supply = <&ldo4_reg>;
322 DVDD-supply = <&ldo3_reg>;
344 dr_mode = "peripheral";
358 pinctrl-names = "default";
359 pinctrl-0 = <&mmc1_pins>;
361 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
362 vmmc-supply = <&vmmcsd_fixed>;
367 pinctrl-names = "default";
368 pinctrl-0 = <&emmc_pins>;
370 vmmc-supply = <&vmmcsd_fixed>;
371 mmc-pwrseq = <&emmc_pwrseq>;
376 pinctrl-names = "default";
377 pinctrl-0 = <&audio_pins>;
379 op-mode = <0>; /* MCASP_ISS_MODE */
393 pinctrl-names = "default";
394 pinctrl-0 = <&uart0_pins>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&uart4_pins>;
403 #include "tps65217.dtsi"
406 ti,pmic-shutdown-controller;
408 interrupt-parent = <&intc>;
409 interrupts = <7>; /* NNMI */
412 dcdc1_reg: regulator@0 {
414 regulator-min-microvolt = <1500000>;
415 regulator-max-microvolt = <1500000>;
419 dcdc2_reg: regulator@1 {
420 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
421 regulator-name = "vdd_mpu";
422 regulator-min-microvolt = <925000>;
423 regulator-max-microvolt = <1325000>;
428 dcdc3_reg: regulator@2 {
429 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
430 regulator-name = "vdd_core";
431 regulator-min-microvolt = <925000>;
432 regulator-max-microvolt = <1150000>;
437 ldo1_reg: regulator@3 {
438 /* VRTC / VIO / VDDS*/
440 regulator-min-microvolt = <1800000>;
441 regulator-max-microvolt = <1800000>;
444 ldo2_reg: regulator@4 {
447 regulator-min-microvolt = <3300000>;
448 regulator-max-microvolt = <3300000>;
451 ldo3_reg: regulator@5 {
453 regulator-min-microvolt = <1800000>;
454 regulator-max-microvolt = <1800000>;
458 ldo4_reg: regulator@6 {
460 regulator-min-microvolt = <3300000>;
461 regulator-max-microvolt = <3300000>;
468 phy_id = <&davinci_mdio>, <0>;
473 phy_id = <&davinci_mdio>, <1>;
479 pinctrl-names = "default", "sleep";
480 pinctrl-0 = <&cpsw_default>;
481 pinctrl-1 = <&cpsw_sleep>;
486 pinctrl-names = "default", "sleep";
487 pinctrl-0 = <&davinci_mdio_default>;
488 pinctrl-1 = <&davinci_mdio_sleep>;
505 pinctrl-names = "default";
506 pinctrl-0 = <&ehrpwm1_pins>;