arch/arm/boot/dts/am335x-pcm-953.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2014-2017 Phytec Messtechnik GmbH
   4  * Author: Wadim Egorov <w.egorov@phytec.de>
   5  *         Teresa Remmet <t.remmet@phytec.de>
   6  */
   7
   8 #include <dt-bindings/input/input.h>
   9
  10 / {
  11         model = "Phytec AM335x PCM-953";
  12         compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx";
  13
  14         /* Power */
  15         regulators {
  16                 vcc3v3: fixedregulator@1 {
  17                         compatible = "regulator-fixed";
  18                         regulator-name = "vcc3v3";
  19                         regulator-min-microvolt = <3300000>;
  20                         regulator-max-microvolt = <3300000>;
  21                         regulator-boot-on;
  22                 };
  23
  24                 vcc1v8: fixedregulator@2 {
  25                         compatible = "regulator-fixed";
  26                         regulator-name = "vcc1v8";
  27                         regulator-min-microvolt = <1800000>;
  28                         regulator-max-microvolt = <1800000>;
  29                         regulator-boot-on;
  30                 };
  31         };
  32
  33         /* User IO */
  34         user_leds: user_leds {
  35                 compatible = "gpio-leds";
  36                 pinctrl-names = "default";
  37                 pinctrl-0 = <&user_leds_pins>;
  38
  39                 green {
  40                         label = "green:user";
  41                         gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
  42                         linux,default-trigger = "gpio";
  43                         default-state = "on";
  44                 };
  45
  46                 yellow {
  47                         label = "yellow:user";
  48                         gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
  49                         linux,default-trigger = "gpio";
  50                         default-state = "on";
  51                 };
  52         };
  53
  54         user_buttons: user_buttons {
  55                 compatible = "gpio-keys";
  56                 pinctrl-names = "default";
  57                 pinctrl-0 = <&user_buttons_pins>;
  58
  59                 button@0 {
  60                         label = "home";
  61                         linux,code = <KEY_HOME>;
  62                         gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
  63                         wakeup-source;
  64                 };
  65
  66                 button@1 {
  67                         label = "menu";
  68                         linux,code = <KEY_MENU>;
  69                         gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
  70                         wakeup-source;
  71                 };
  72
  73         };
  74 };
  75
  76 &am33xx_pinmux {
  77         user_buttons_pins: pinmux_user_buttons {
  78                 pinctrl-single,pins = <
  79                         AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_INPUT_PULLDOWN, MUX_MODE7)  /* emu0.gpio3_7 */
  80                         AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLDOWN, MUX_MODE7)  /* emu1.gpio3_8 */
  81                 >;
  82         };
  83
  84         user_leds_pins: pinmux_user_leds {
  85                 pinctrl-single,pins = <
  86                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT_PULLDOWN, MUX_MODE7)    /* gpmc_csn1.gpio1_30 */
  87                         AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_OUTPUT_PULLDOWN, MUX_MODE7)    /* gpmc_csn2.gpio1_31 */
  88                 >;
  89         };
  90 };
  91
  92 /* CAN */
  93 &am33xx_pinmux {
  94         dcan1_pins: pinmux_dcan1 {
  95                 pinctrl-single,pins = <
  96                         AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT_PULLUP, MUX_MODE2)      /* uart1_rxd.dcan1_tx_mux2 */
  97                         AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLUP, MUX_MODE2)       /* uart1_txd.dcan1_rx_mux2 */
  98                 >;
  99         };
 100 };
 101
 102 &dcan1 {
 103         pinctrl-names = "default";
 104         pinctrl-0 = <&dcan1_pins>;
 105         status = "okay";
 106 };
 107
 108 /* Ethernet */
 109 &am33xx_pinmux {
 110         ethernet1_pins: pinmux_ethernet1 {
 111                 pinctrl-single,pins = <
 112                         AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* gpmc_a0.rgmii2_tctl */
 113                         AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2)       /* gpmc_a1.rgmii2_rctl */
 114                         AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* gpmc_a2.rgmii2_td3 */
 115                         AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* gpmc_a3.rgmii2_td2 */
 116                         AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* gpmc_a4.rgmii2_td1 */
 117                         AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* gpmc_a5.rgmii2_td0 */
 118                         AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* gpmc_a6.rgmii2_tclk */
 119                         AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2)       /* gpmc_a7.rgmii2_rclk */
 120                         AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2)       /* gpmc_a8.rgmii2_rd3 */
 121                         AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2)       /* gpmc_a9.rgmii2_rd2 */
 122                         AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2)      /* gpmc_a10.rgmii2_rd1 */
 123                         AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2)      /* gpmc_a11.rgmii2_rd0 */
 124                 >;
 125         };
 126 };
 127
 128 &cpsw_emac1 {
 129         phy-handle = <&phy1>;
 130         phy-mode = "rgmii-id";
 131         dual_emac_res_vlan = <2>;
 132         status = "okay";
 133 };
 134
 135 &davinci_mdio {
 136         phy1: ethernet-phy@2 {
 137                 reg = <2>;
 138
 139                 /* Register 260 (104h) – RGMII Clock and Control Pad Skew */
 140                 rxc-skew-ps = <1400>;
 141                 rxdv-skew-ps = <0>;
 142                 txc-skew-ps = <1400>;
 143                 txen-skew-ps = <0>;
 144                 /* Register 261 (105h) – RGMII RX Data Pad Skew */
 145                 rxd3-skew-ps = <0>;
 146                 rxd2-skew-ps = <0>;
 147                 rxd1-skew-ps = <0>;
 148                 rxd0-skew-ps = <0>;
 149                 /* Register 262 (106h) – RGMII TX Data Pad Skew */
 150                 txd3-skew-ps = <0>;
 151                 txd2-skew-ps = <0>;
 152                 txd1-skew-ps = <0>;
 153                 txd0-skew-ps = <0>;
 154         };
 155 };
 156
 157 &mac {
 158         slaves = <2>;
 159         pinctrl-names = "default";
 160         pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
 161         dual_emac;
 162 };
 163
 164 /* Misc */
 165 &am33xx_pinmux {
 166         pinctrl-names = "default";
 167         pinctrl-0 = <&cb_gpio_pins>;
 168
 169         cb_gpio_pins: pinmux_cb_gpio {
 170                 pinctrl-single,pins = <
 171                         AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7)   /* uart0_ctsn.gpio1_8 */
 172                         AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7)   /* uart0_rtsn.gpio1_9 */
 173                 >;
 174         };
 175 };
 176
 177 /* MMC */
 178 &am33xx_pinmux {
 179         mmc1_pins: pinmux_mmc1_pins {
 180                 pinctrl-single,pins = <
 181                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
 182                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
 183                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
 184                         AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
 185                         AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
 186                         AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
 187                         AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7)        /* spi0_cs1.mmc0_sdcd */
 188                 >;
 189         };
 190 };
 191
 192 &mmc1 {
 193         vmmc-supply = <&vcc3v3>;
 194         bus-width = <4>;
 195         pinctrl-names = "default";
 196         pinctrl-0 = <&mmc1_pins>;
 197         cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
 198         status = "okay";
 199 };
 200
 201 /* UARTs */
 202 &am33xx_pinmux {
 203         uart0_pins: pinmux_uart0 {
 204                 pinctrl-single,pins = <
 205                         AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
 206                         AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
 207                 >;
 208         };
 209
 210         uart1_pins: pinmux_uart1 {
 211                 pinctrl-single,pins = <
 212                         AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
 213                         AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
 214                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
 215                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
 216                 >;
 217         };
 218
 219         uart2_pins: pinmux_uart2 {
 220                 pinctrl-single,pins = <
 221                         AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1)     /* mii1_tx_clk.uart2_rxd */
 222                         AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1)  /* mii1_rx_clk.uart2_txd */
 223                 >;
 224         };
 225
 226         uart3_pins: pinmux_uart3 {
 227                 pinctrl-single,pins = <
 228                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1)       /* mii1_rxd3.uart3_rxd */
 229                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1)    /* mii1_rxd2.uart3_txd */
 230                 >;
 231         };
 232 };
 233
 234 &uart0 {
 235         pinctrl-names = "default";
 236         pinctrl-0 = <&uart0_pins>;
 237         status = "okay";
 238 };
 239
 240 &uart1 {
 241         pinctrl-names = "default";
 242         pinctrl-0 = <&uart1_pins>;
 243 };
 244
 245 &uart2 {
 246         pinctrl-names = "default";
 247         pinctrl-0 = <&uart2_pins>;
 248         status = "okay";
 249 };
 250
 251 &uart3 {
 252         pinctrl-names = "default";
 253         pinctrl-0 = <&uart3_pins>;
 254         status = "okay";
 255 };
 256
 257 /* USB */
 258 &cppi41dma {
 259         status = "okay";
 260 };
 261
 262 &usb_ctrl_mod {
 263         status = "okay";
 264 };
 265
 266 &usb {
 267         status = "okay";
 268 };
 269
 270 &usb0 {
 271         status = "okay";
 272 };
 273
 274 &usb0_phy {
 275         status = "okay";
 276 };
 277
 278 &usb1 {
 279         status = "okay";
 280         dr_mode = "host";
 281 };
 282
 283 &usb1_phy {
 284         status = "okay";
 285 };