2 * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x
4 * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
13 #include "am33xx.dtsi"
14 #include <dt-bindings/interrupt-controller/irq.h>
19 cpu0-supply = <&vdd1_reg>;
24 device_type = "memory";
25 reg = <0x80000000 0x10000000>; /* 256 MB */
29 pinctrl-names = "default";
30 pinctrl-0 = <&leds_pins>;
32 compatible = "gpio-leds";
35 label = "com:green:user";
36 gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
41 vbat: fixedregulator0 {
42 compatible = "regulator-fixed";
43 regulator-name = "vbat";
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
49 vmmc: fixedregulator1 {
50 compatible = "regulator-fixed";
51 regulator-name = "vmmc";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
58 i2c0_pins: pinmux_i2c0_pins {
59 pinctrl-single,pins = <
60 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
61 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
65 nandflash_pins: pinmux_nandflash_pins {
66 pinctrl-single,pins = <
67 AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0)
68 AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0)
69 AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0)
70 AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0)
71 AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0)
72 AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0)
73 AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0)
74 AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0)
75 AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0)
76 AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_30 */
77 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0)
78 AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0)
79 AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0)
80 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0)
81 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0)
85 uart0_pins: pinmux_uart0_pins {
86 pinctrl-single,pins = <
87 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
88 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
92 leds_pins: pinmux_leds_pins {
93 pinctrl-single,pins = <
94 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
106 ethphy0: ethernet-phy@0 {
110 ethphy1: ethernet-phy@1 {
116 phy-handle = <ðphy0>;
122 phy-handle = <ðphy1>;
132 pinctrl-names = "default";
133 pinctrl-0 = <&nandflash_pins>;
135 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
138 compatible = "ti,omap2-nand";
139 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
140 interrupt-parent = <&gpmc>;
141 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
142 <1 IRQ_TYPE_NONE>; /* termcount */
143 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
144 nand-bus-width = <8>;
145 ti,nand-ecc-opt = "bch8";
146 gpmc,device-width = <1>;
147 gpmc,sync-clk-ps = <0>;
149 gpmc,cs-rd-off-ns = <44>;
150 gpmc,cs-wr-off-ns = <44>;
151 gpmc,adv-on-ns = <6>;
152 gpmc,adv-rd-off-ns = <34>;
153 gpmc,adv-wr-off-ns = <44>;
155 gpmc,we-off-ns = <40>;
157 gpmc,oe-off-ns = <54>;
158 gpmc,access-ns = <64>;
159 gpmc,rd-cycle-ns = <82>;
160 gpmc,wr-cycle-ns = <82>;
161 gpmc,bus-turnaround-ns = <0>;
162 gpmc,cycle2cycle-delay-ns = <0>;
163 gpmc,clk-activation-ns = <0>;
164 gpmc,wr-access-ns = <40>;
165 gpmc,wr-data-mux-bus-ns = <0>;
167 #address-cells = <1>;
171 /* MTD partition table */
174 reg = <0x00000000 0x000080000>;
179 reg = <0x00080000 0x001e0000>;
183 label = "U-Boot Env";
184 reg = <0x00260000 0x00020000>;
189 reg = <0x00280000 0x00500000>;
193 label = "File System";
194 reg = <0x00780000 0x007880000>;
201 pinctrl-names = "default";
202 pinctrl-0 = <&i2c0_pins>;
204 clock-frequency = <400000>;
213 vmmc-supply = <&vmmc>;
219 pinctrl-names = "default";
220 pinctrl-0 = <&uart0_pins>;
252 #include "tps65910.dtsi"
255 vcc1-supply = <&vbat>;
256 vcc2-supply = <&vbat>;
257 vcc3-supply = <&vbat>;
258 vcc4-supply = <&vbat>;
259 vcc5-supply = <&vbat>;
260 vcc6-supply = <&vbat>;
261 vcc7-supply = <&vbat>;
262 vccio-supply = <&vbat>;
265 vrtc_reg: regulator@0 {
269 vio_reg: regulator@1 {
273 vdd1_reg: regulator@2 {
274 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
275 regulator-name = "vdd_mpu";
276 regulator-min-microvolt = <912500>;
277 regulator-max-microvolt = <1312500>;
282 vdd2_reg: regulator@3 {
283 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
284 regulator-name = "vdd_core";
285 regulator-min-microvolt = <912500>;
286 regulator-max-microvolt = <1150000>;
291 vdd3_reg: regulator@4 {
295 vdig1_reg: regulator@5 {
299 vdig2_reg: regulator@6 {
303 vpll_reg: regulator@7 {
307 vdac_reg: regulator@8 {
311 vaux1_reg: regulator@9 {
315 vaux2_reg: regulator@10 {
319 vaux33_reg: regulator@11 {
323 vmmc_reg: regulator@12 {