2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
11 * http://www.ti.com/tool/tmdssk3358
16 #include "am33xx.dtsi"
17 #include <dt-bindings/pwm/pwm.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
21 model = "TI AM335x EVM-SK";
22 compatible = "ti,am335x-evmsk", "ti,am33xx";
26 cpu0-supply = <&vdd1_reg>;
31 device_type = "memory";
32 reg = <0x80000000 0x10000000>; /* 256 MB */
39 vbat: fixedregulator0 {
40 compatible = "regulator-fixed";
41 regulator-name = "vbat";
42 regulator-min-microvolt = <5000000>;
43 regulator-max-microvolt = <5000000>;
47 lis3_reg: fixedregulator1 {
48 compatible = "regulator-fixed";
49 regulator-name = "lis3_reg";
53 wl12xx_vmmc: fixedregulator2 {
54 pinctrl-names = "default";
55 pinctrl-0 = <&wl12xx_gpio>;
56 compatible = "regulator-fixed";
57 regulator-name = "vwl1271";
58 regulator-min-microvolt = <1800000>;
59 regulator-max-microvolt = <1800000>;
61 startup-delay-us = <70000>;
65 vtt_fixed: fixedregulator3 {
66 compatible = "regulator-fixed";
67 regulator-name = "vtt";
68 regulator-min-microvolt = <1500000>;
69 regulator-max-microvolt = <1500000>;
70 gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
77 pinctrl-names = "default";
78 pinctrl-0 = <&user_leds_s0>;
80 compatible = "gpio-leds";
83 label = "evmsk:green:usr0";
84 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
85 default-state = "off";
89 label = "evmsk:green:usr1";
90 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
91 default-state = "off";
95 label = "evmsk:green:mmc0";
96 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
97 linux,default-trigger = "mmc0";
98 default-state = "off";
102 label = "evmsk:green:heartbeat";
103 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
104 linux,default-trigger = "heartbeat";
105 default-state = "off";
109 gpio_buttons: gpio_buttons0 {
110 compatible = "gpio-keys";
111 #address-cells = <1>;
116 linux,code = <0x100>;
117 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
122 linux,code = <0x101>;
123 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
128 linux,code = <0x102>;
129 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
135 linux,code = <0x103>;
136 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
141 compatible = "pwm-backlight";
142 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
143 brightness-levels = <0 58 61 66 75 90 125 170 255>;
144 default-brightness-level = <8>;
148 compatible = "simple-audio-card";
149 simple-audio-card,name = "AM335x-EVMSK";
150 simple-audio-card,widgets =
151 "Headphone", "Headphone Jack";
152 simple-audio-card,routing =
153 "Headphone Jack", "HPLOUT",
154 "Headphone Jack", "HPROUT";
155 simple-audio-card,format = "dsp_b";
156 simple-audio-card,bitclock-master = <&sound_master>;
157 simple-audio-card,frame-master = <&sound_master>;
158 simple-audio-card,bitclock-inversion;
160 simple-audio-card,cpu {
161 sound-dai = <&mcasp1>;
164 sound_master: simple-audio-card,codec {
165 sound-dai = <&tlv320aic3106>;
166 system-clock-frequency = <24000000>;
171 compatible = "ti,tilcdc,panel";
172 pinctrl-names = "default", "sleep";
173 pinctrl-0 = <&lcd_pins_default>;
174 pinctrl-1 = <&lcd_pins_sleep>;
175 backlight = <&lcd_bl>;
179 ac-bias-intrpt = <0>;
198 clock-frequency = <9000000>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
210 lcd_pins_default: lcd_pins_default {
211 pinctrl-single,pins = <
212 AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */
213 AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */
214 AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */
215 AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */
216 AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */
217 AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */
218 AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */
219 AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */
220 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
221 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
222 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
223 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
224 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
225 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
226 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
227 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
228 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
229 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
230 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
231 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
232 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
233 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
234 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
235 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
236 AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
237 AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
238 AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
239 AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
243 lcd_pins_sleep: lcd_pins_sleep {
244 pinctrl-single,pins = <
245 AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */
246 AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */
247 AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */
248 AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */
249 AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */
250 AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */
251 AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */
252 AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */
253 AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
254 AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
255 AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
256 AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
257 AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
258 AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
259 AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
260 AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
261 AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
262 AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
263 AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
264 AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
265 AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
266 AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
267 AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
268 AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
269 AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */
270 AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */
271 AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */
272 AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */
277 user_leds_s0: user_leds_s0 {
278 pinctrl-single,pins = <
279 AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
280 AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
281 AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
282 AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
286 gpio_keys_s0: gpio_keys_s0 {
287 pinctrl-single,pins = <
288 AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
289 AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
290 AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
291 AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
295 i2c0_pins: pinmux_i2c0_pins {
296 pinctrl-single,pins = <
297 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
298 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
302 uart0_pins: pinmux_uart0_pins {
303 pinctrl-single,pins = <
304 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
305 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
309 clkout2_pin: pinmux_clkout2_pin {
310 pinctrl-single,pins = <
311 AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
315 ecap2_pins: backlight_pins {
316 pinctrl-single,pins = <
317 AM33XX_IOPAD(0x99c, MUX_MODE4) /* mcasp0_ahclkr.ecap2_in_pwm2_out */
321 cpsw_default: cpsw_default {
322 pinctrl-single,pins = <
324 AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
325 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
326 AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
327 AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
328 AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
329 AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
330 AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
331 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
332 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
333 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
334 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
335 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
338 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
339 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
340 AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
341 AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
342 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
343 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
344 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
345 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
346 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
347 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
348 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
349 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
353 cpsw_sleep: cpsw_sleep {
354 pinctrl-single,pins = <
355 /* Slave 1 reset value */
356 AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
357 AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
358 AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
359 AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
360 AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
361 AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
362 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
363 AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
364 AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
365 AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
366 AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
367 AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
369 /* Slave 2 reset value*/
370 AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
371 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
372 AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
373 AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
374 AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
375 AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
376 AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
377 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
378 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
379 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
380 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
381 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
385 davinci_mdio_default: davinci_mdio_default {
386 pinctrl-single,pins = <
388 AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
389 AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
393 davinci_mdio_sleep: davinci_mdio_sleep {
394 pinctrl-single,pins = <
395 /* MDIO reset value */
396 AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
397 AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
401 mmc1_pins: pinmux_mmc1_pins {
402 pinctrl-single,pins = <
403 AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
404 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
405 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
406 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
407 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
408 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
409 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
410 AM33XX_IOPAD(0x9a0, PIN_INPUT | MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
414 mcasp1_pins: mcasp1_pins {
415 pinctrl-single,pins = <
416 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
417 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
418 AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
419 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
423 mcasp1_pins_sleep: mcasp1_pins_sleep {
424 pinctrl-single,pins = <
425 AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
426 AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
427 AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
428 AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
432 mmc2_pins: pinmux_mmc2_pins {
433 pinctrl-single,pins = <
434 AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
435 AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
436 AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
437 AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
438 AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
439 AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
440 AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
444 wl12xx_gpio: pinmux_wl12xx_gpio {
445 pinctrl-single,pins = <
446 AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
452 pinctrl-names = "default";
453 pinctrl-0 = <&uart0_pins>;
459 pinctrl-names = "default";
460 pinctrl-0 = <&i2c0_pins>;
463 clock-frequency = <400000>;
469 lis331dlh: lis331dlh@18 {
470 compatible = "st,lis331dlh", "st,lis3lv02d";
472 Vdd-supply = <&lis3_reg>;
473 Vdd_IO-supply = <&lis3_reg>;
478 st,click-thresh-x = <10>;
479 st,click-thresh-y = <10>;
480 st,click-thresh-z = <10>;
489 st,min-limit-x = <120>;
490 st,min-limit-y = <120>;
491 st,min-limit-z = <140>;
492 st,max-limit-x = <550>;
493 st,max-limit-y = <550>;
494 st,max-limit-z = <750>;
497 tlv320aic3106: tlv320aic3106@1b {
498 #sound-dai-cells = <0>;
499 compatible = "ti,tlv320aic3106";
504 AVDD-supply = <&vaux2_reg>;
505 IOVDD-supply = <&vaux2_reg>;
506 DRVDD-supply = <&vaux2_reg>;
507 DVDD-supply = <&vbat>;
545 pinctrl-names = "default";
546 pinctrl-0 = <&ecap2_pins>;
550 #include "tps65910.dtsi"
553 vcc1-supply = <&vbat>;
554 vcc2-supply = <&vbat>;
555 vcc3-supply = <&vbat>;
556 vcc4-supply = <&vbat>;
557 vcc5-supply = <&vbat>;
558 vcc6-supply = <&vbat>;
559 vcc7-supply = <&vbat>;
560 vccio-supply = <&vbat>;
563 vrtc_reg: regulator@0 {
567 vio_reg: regulator@1 {
571 vdd1_reg: regulator@2 {
572 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
573 regulator-name = "vdd_mpu";
574 regulator-min-microvolt = <912500>;
575 regulator-max-microvolt = <1351500>;
580 vdd2_reg: regulator@3 {
581 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
582 regulator-name = "vdd_core";
583 regulator-min-microvolt = <912500>;
584 regulator-max-microvolt = <1150000>;
589 vdd3_reg: regulator@4 {
593 vdig1_reg: regulator@5 {
597 vdig2_reg: regulator@6 {
601 vpll_reg: regulator@7 {
605 vdac_reg: regulator@8 {
609 vaux1_reg: regulator@9 {
613 vaux2_reg: regulator@10 {
617 vaux33_reg: regulator@11 {
621 vmmc_reg: regulator@12 {
622 regulator-min-microvolt = <1800000>;
623 regulator-max-microvolt = <3300000>;
630 pinctrl-names = "default", "sleep";
631 pinctrl-0 = <&cpsw_default>;
632 pinctrl-1 = <&cpsw_sleep>;
638 pinctrl-names = "default", "sleep";
639 pinctrl-0 = <&davinci_mdio_default>;
640 pinctrl-1 = <&davinci_mdio_sleep>;
643 ethphy0: ethernet-phy@0 {
647 ethphy1: ethernet-phy@1 {
653 phy-handle = <ðphy0>;
654 phy-mode = "rgmii-id";
655 dual_emac_res_vlan = <1>;
659 phy-handle = <ðphy1>;
660 phy-mode = "rgmii-id";
661 dual_emac_res_vlan = <2>;
666 vmmc-supply = <&vmmc_reg>;
668 pinctrl-names = "default";
669 pinctrl-0 = <&mmc1_pins>;
670 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
687 vmmc-supply = <&wl12xx_vmmc>;
691 keep-power-in-suspend;
692 pinctrl-names = "default";
693 pinctrl-0 = <&mmc2_pins>;
695 #address-cells = <1>;
698 compatible = "ti,wl1271";
700 interrupt-parent = <&gpio0>;
701 interrupts = <31 IRQ_TYPE_EDGE_RISING>; /* gpio 31 */
702 ref-clock-frequency = <38400000>;
707 #sound-dai-cells = <0>;
708 pinctrl-names = "default", "sleep";
709 pinctrl-0 = <&mcasp1_pins>;
710 pinctrl-1 = <&mcasp1_pins_sleep>;
714 op-mode = <0>; /* MCASP_IIS_MODE */
717 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
728 ti,x-plate-resistance = <200>;
729 ti,coordinate-readouts = <5>;
730 ti,wire-config = <0x00 0x11 0x22 0x33>;
737 blue-and-red-wiring = "crossed";
741 clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
742 clock-names = "ext-clk", "int-clk";