1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/alpha/kernel/sys_miata.c
5 * Copyright (C) 1995 David A Rusling
6 * Copyright (C) 1996 Jay A Estabrook
7 * Copyright (C) 1998, 1999, 2000 Richard Henderson
9 * Code supporting the MIATA (EV56+PYXIS).
12 #include <linux/kernel.h>
13 #include <linux/types.h>
15 #include <linux/sched.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/reboot.h>
20 #include <asm/ptrace.h>
23 #include <asm/mmu_context.h>
25 #include <asm/pgtable.h>
26 #include <asm/core_cia.h>
27 #include <asm/tlbflush.h>
32 #include "machvec_impl.h"
36 miata_srm_device_interrupt(unsigned long vector)
40 irq = (vector - 0x800) >> 4;
43 * I really hate to do this, but the MIATA SRM console ignores the
44 * low 8 bits in the interrupt summary register, and reports the
45 * vector 0x80 *lower* than I expected from the bit numbering in
47 * This was done because the low 8 summary bits really aren't used
48 * for reporting any interrupts (the PCI-ISA bridge, bit 7, isn't
49 * used for this purpose, as PIC interrupts are delivered as the
50 * vectors 0x800-0x8f0).
51 * But I really don't want to change the fixup code for allocation
52 * of IRQs, nor the alpha_irq_mask maintenance stuff, both of which
53 * look nice and clean now.
54 * So, here's this grotty hack... :-(
66 alpha_mv.device_interrupt = miata_srm_device_interrupt;
69 /* These break on MiataGL so we'll try not to do it at all. */
70 *(vulp)PYXIS_INT_HILO = 0x000000B2UL; mb(); /* ISA/NMI HI */
71 *(vulp)PYXIS_RT_COUNT = 0UL; mb(); /* clear count */
76 /* Not interested in the bogus interrupts (3,10), Fan Fault (0),
79 We also disable the risers (4,5), since we don't know how to
80 route the interrupts behind the bridge. */
81 init_pyxis_irqs(0x63b0000);
83 common_init_isa_dma();
84 if (request_irq(16 + 2, no_action, 0, "halt-switch", NULL))
85 pr_err("Failed to register halt-switch interrupt\n");
86 if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL))
87 pr_err("Failed to register timer-cascade interrupt\n");
92 * PCI Fixup configuration.
94 * Summary @ PYXIS_INT_REQ:
105 * 9 EIDE (deprecated, ISA 14/15 used)
108 *12 Interrupt Line A from slot 4
109 *13 Interrupt Line B from slot 4
110 *14 Interrupt Line C from slot 4
111 *15 Interrupt Line D from slot 4
112 *16 Interrupt Line A from slot 5
113 *17 Interrupt line B from slot 5
114 *18 Interrupt Line C from slot 5
115 *19 Interrupt Line D from slot 5
116 *20 Interrupt Line A from slot 1
117 *21 Interrupt Line B from slot 1
118 *22 Interrupt Line C from slot 1
119 *23 Interrupt Line D from slot 1
120 *24 Interrupt Line A from slot 2
121 *25 Interrupt Line B from slot 2
122 *26 Interrupt Line C from slot 2
123 *27 Interrupt Line D from slot 2
124 *27 Interrupt Line A from slot 3
125 *29 Interrupt Line B from slot 3
126 *30 Interrupt Line C from slot 3
127 *31 Interrupt Line D from slot 3
129 * The device to slot mapping looks like:
137 * 8 PCI-PCI Bridge (SBU Riser)
140 * 11 PCI on board slot 4 (SBU Riser)
141 * 12 PCI on board slot 5 (SBU Riser)
143 * These are behind the bridge, so I'm not sure what to do...
145 * 13 PCI on board slot 1 (SBU Riser)
146 * 14 PCI on board slot 2 (SBU Riser)
147 * 15 PCI on board slot 3 (SBU Riser)
150 * This two layered interrupt approach means that we allocate IRQ 16 and
151 * above for PCI interrupts. The IRQ relates to which bit the interrupt
152 * comes in on. This makes interrupt processing much easier.
156 miata_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
158 static char irq_tab[18][5] = {
159 /*INT INTA INTB INTC INTD */
160 {16+ 8, 16+ 8, 16+ 8, 16+ 8, 16+ 8}, /* IdSel 14, DC21142 */
161 { -1, -1, -1, -1, -1}, /* IdSel 15, EIDE */
162 { -1, -1, -1, -1, -1}, /* IdSel 16, none */
163 { -1, -1, -1, -1, -1}, /* IdSel 17, none */
164 { -1, -1, -1, -1, -1}, /* IdSel 18, PCI-ISA */
165 { -1, -1, -1, -1, -1}, /* IdSel 19, PCI-PCI */
166 { -1, -1, -1, -1, -1}, /* IdSel 20, none */
167 { -1, -1, -1, -1, -1}, /* IdSel 21, none */
168 {16+12, 16+12, 16+13, 16+14, 16+15}, /* IdSel 22, slot 4 */
169 {16+16, 16+16, 16+17, 16+18, 16+19}, /* IdSel 23, slot 5 */
170 /* the next 7 are actually on PCI bus 1, across the bridge */
171 {16+11, 16+11, 16+11, 16+11, 16+11}, /* IdSel 24, QLISP/GL*/
172 { -1, -1, -1, -1, -1}, /* IdSel 25, none */
173 { -1, -1, -1, -1, -1}, /* IdSel 26, none */
174 { -1, -1, -1, -1, -1}, /* IdSel 27, none */
175 {16+20, 16+20, 16+21, 16+22, 16+23}, /* IdSel 28, slot 1 */
176 {16+24, 16+24, 16+25, 16+26, 16+27}, /* IdSel 29, slot 2 */
177 {16+28, 16+28, 16+29, 16+30, 16+31}, /* IdSel 30, slot 3 */
178 /* This bridge is on the main bus of the later orig MIATA */
179 { -1, -1, -1, -1, -1}, /* IdSel 31, PCI-PCI */
181 const long min_idsel = 3, max_idsel = 20, irqs_per_slot = 5;
183 /* the USB function of the 82c693 has it's interrupt connected to
184 the 2nd 8259 controller. So we have to check for it first. */
186 if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) {
188 struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7);
189 if(pdev == NULL || pci_read_config_byte(pdev, 0x40,&irq) != PCIBIOS_SUCCESSFUL) {
199 return COMMON_TABLE_LOOKUP;
203 miata_swizzle(struct pci_dev *dev, u8 *pinp)
205 int slot, pin = *pinp;
207 if (dev->bus->number == 0) {
208 slot = PCI_SLOT(dev->devfn);
210 /* Check for the built-in bridge. */
211 else if ((PCI_SLOT(dev->bus->self->devfn) == 8) ||
212 (PCI_SLOT(dev->bus->self->devfn) == 20)) {
213 slot = PCI_SLOT(dev->devfn) + 9;
217 /* Must be a card-based bridge. */
219 if ((PCI_SLOT(dev->bus->self->devfn) == 8) ||
220 (PCI_SLOT(dev->bus->self->devfn) == 20)) {
221 slot = PCI_SLOT(dev->devfn) + 9;
224 pin = pci_swizzle_interrupt_pin(dev, pin);
226 /* Move up the chain of bridges. */
227 dev = dev->bus->self;
228 /* Slot of the next bridge. */
229 slot = PCI_SLOT(dev->devfn);
230 } while (dev->bus->self);
240 SMC669_Init(0); /* it might be a GL (fails harmlessly if not) */
245 miata_kill_arch(int mode)
249 #ifndef ALPHA_RESTORE_SRM_SETUP
251 case LINUX_REBOOT_CMD_RESTART:
252 /* Who said DEC engineers have no sense of humor? ;-) */
253 if (alpha_using_srm) {
254 *(vuip) PYXIS_RESET = 0x0000dead;
258 case LINUX_REBOOT_CMD_HALT:
260 case LINUX_REBOOT_CMD_POWER_OFF:
273 struct alpha_machine_vector miata_mv __initmv = {
274 .vector_name = "Miata",
278 .machine_check = cia_machine_check,
279 .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
280 .min_io_address = DEFAULT_IO_BASE,
281 .min_mem_address = DEFAULT_MEM_BASE,
282 .pci_dac_offset = PYXIS_DAC_OFFSET,
285 .device_interrupt = pyxis_device_interrupt,
287 .init_arch = pyxis_init_arch,
288 .init_irq = miata_init_irq,
289 .init_rtc = common_init_rtc,
290 .init_pci = miata_init_pci,
291 .kill_arch = miata_kill_arch,
292 .pci_map_irq = miata_map_irq,
293 .pci_swizzle = miata_swizzle,