1 // SPDX-License-Identifier: GPL-2.0
3 /* By Ross Biro 1/23/92 */
4 /* edited by Linus Torvalds */
5 /* mangled further by Bob Manson (manson@santafe.edu) */
6 /* more mutilation by David Mosberger (davidm@azstarnet.com) */
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/sched/task_stack.h>
12 #include <linux/smp.h>
13 #include <linux/errno.h>
14 #include <linux/ptrace.h>
15 #include <linux/user.h>
16 #include <linux/security.h>
17 #include <linux/signal.h>
18 #include <linux/tracehook.h>
19 #include <linux/audit.h>
21 #include <linux/uaccess.h>
35 #define DBG(fac,args) {if ((fac) & DEBUG) printk args;}
40 #define BREAKINST 0x00000080 /* call_pal bpt */
43 * does not yet catch signals sent when the child dies.
44 * in exit.c or in signal.c.
48 * Processes always block with the following stack-layout:
50 * +================================+ <---- task + 2*PAGE_SIZE
51 * | PALcode saved frame (ps, pc, | ^
52 * | gp, a0, a1, a2) | |
53 * +================================+ | struct pt_regs
55 * | frame generated by SAVE_ALL | |
57 * +================================+
59 * | frame saved by do_switch_stack | | struct switch_stack
61 * +================================+
65 * The following table maps a register index into the stack offset at
66 * which the register is saved. Register indices are 0-31 for integer
67 * regs, 32-63 for fp regs, and 64 for the pc. Notice that sp and
68 * zero have no stack-slot and need to be treated specially (see
69 * get_reg/put_reg below).
72 REG_R0 = 0, REG_F0 = 32, REG_FPCR = 63, REG_PC = 64
76 (PAGE_SIZE*2 - sizeof(struct pt_regs) + offsetof(struct pt_regs, reg))
79 (PAGE_SIZE*2 - sizeof(struct pt_regs) - sizeof(struct switch_stack) \
80 + offsetof(struct switch_stack, reg))
82 static int regoff[] = {
83 PT_REG( r0), PT_REG( r1), PT_REG( r2), PT_REG( r3),
84 PT_REG( r4), PT_REG( r5), PT_REG( r6), PT_REG( r7),
85 PT_REG( r8), SW_REG( r9), SW_REG( r10), SW_REG( r11),
86 SW_REG( r12), SW_REG( r13), SW_REG( r14), SW_REG( r15),
87 PT_REG( r16), PT_REG( r17), PT_REG( r18), PT_REG( r19),
88 PT_REG( r20), PT_REG( r21), PT_REG( r22), PT_REG( r23),
89 PT_REG( r24), PT_REG( r25), PT_REG( r26), PT_REG( r27),
90 PT_REG( r28), PT_REG( gp), -1, -1,
91 SW_REG(fp[ 0]), SW_REG(fp[ 1]), SW_REG(fp[ 2]), SW_REG(fp[ 3]),
92 SW_REG(fp[ 4]), SW_REG(fp[ 5]), SW_REG(fp[ 6]), SW_REG(fp[ 7]),
93 SW_REG(fp[ 8]), SW_REG(fp[ 9]), SW_REG(fp[10]), SW_REG(fp[11]),
94 SW_REG(fp[12]), SW_REG(fp[13]), SW_REG(fp[14]), SW_REG(fp[15]),
95 SW_REG(fp[16]), SW_REG(fp[17]), SW_REG(fp[18]), SW_REG(fp[19]),
96 SW_REG(fp[20]), SW_REG(fp[21]), SW_REG(fp[22]), SW_REG(fp[23]),
97 SW_REG(fp[24]), SW_REG(fp[25]), SW_REG(fp[26]), SW_REG(fp[27]),
98 SW_REG(fp[28]), SW_REG(fp[29]), SW_REG(fp[30]), SW_REG(fp[31]),
102 static unsigned long zero;
105 * Get address of register REGNO in task TASK.
107 static unsigned long *
108 get_reg_addr(struct task_struct * task, unsigned long regno)
113 addr = &task_thread_info(task)->pcb.usp;
114 } else if (regno == 65) {
115 addr = &task_thread_info(task)->pcb.unique;
116 } else if (regno == 31 || regno > 65) {
120 addr = task_stack_page(task) + regoff[regno];
126 * Get contents of register REGNO in task TASK.
129 get_reg(struct task_struct * task, unsigned long regno)
131 /* Special hack for fpcr -- combine hardware and software bits. */
133 unsigned long fpcr = *get_reg_addr(task, regno);
135 = task_thread_info(task)->ieee_state & IEEE_SW_MASK;
136 swcr = swcr_update_status(swcr, fpcr);
139 return *get_reg_addr(task, regno);
143 * Write contents of register REGNO in task TASK.
146 put_reg(struct task_struct *task, unsigned long regno, unsigned long data)
149 task_thread_info(task)->ieee_state
150 = ((task_thread_info(task)->ieee_state & ~IEEE_SW_MASK)
151 | (data & IEEE_SW_MASK));
152 data = (data & FPCR_DYN_MASK) | ieee_swcr_to_fpcr(data);
154 *get_reg_addr(task, regno) = data;
159 read_int(struct task_struct *task, unsigned long addr, int * data)
161 int copied = access_process_vm(task, addr, data, sizeof(int),
163 return (copied == sizeof(int)) ? 0 : -EIO;
167 write_int(struct task_struct *task, unsigned long addr, int data)
169 int copied = access_process_vm(task, addr, &data, sizeof(int),
170 FOLL_FORCE | FOLL_WRITE);
171 return (copied == sizeof(int)) ? 0 : -EIO;
178 ptrace_set_bpt(struct task_struct * child)
180 int displ, i, res, reg_b, nsaved = 0;
181 unsigned int insn, op_code;
184 pc = get_reg(child, REG_PC);
185 res = read_int(child, pc, (int *) &insn);
189 op_code = insn >> 26;
190 if (op_code >= 0x30) {
192 * It's a branch: instead of trying to figure out
193 * whether the branch will be taken or not, we'll put
194 * a breakpoint at either location. This is simpler,
195 * more reliable, and probably not a whole lot slower
196 * than the alternative approach of emulating the
197 * branch (emulation can be tricky for fp branches).
199 displ = ((s32)(insn << 11)) >> 9;
200 task_thread_info(child)->bpt_addr[nsaved++] = pc + 4;
201 if (displ) /* guard against unoptimized code */
202 task_thread_info(child)->bpt_addr[nsaved++]
204 DBG(DBG_BPT, ("execing branch\n"));
205 } else if (op_code == 0x1a) {
206 reg_b = (insn >> 16) & 0x1f;
207 task_thread_info(child)->bpt_addr[nsaved++] = get_reg(child, reg_b);
208 DBG(DBG_BPT, ("execing jump\n"));
210 task_thread_info(child)->bpt_addr[nsaved++] = pc + 4;
211 DBG(DBG_BPT, ("execing normal insn\n"));
214 /* install breakpoints: */
215 for (i = 0; i < nsaved; ++i) {
216 res = read_int(child, task_thread_info(child)->bpt_addr[i],
220 task_thread_info(child)->bpt_insn[i] = insn;
221 DBG(DBG_BPT, (" -> next_pc=%lx\n",
222 task_thread_info(child)->bpt_addr[i]));
223 res = write_int(child, task_thread_info(child)->bpt_addr[i],
228 task_thread_info(child)->bpt_nsaved = nsaved;
233 * Ensure no single-step breakpoint is pending. Returns non-zero
234 * value if child was being single-stepped.
237 ptrace_cancel_bpt(struct task_struct * child)
239 int i, nsaved = task_thread_info(child)->bpt_nsaved;
241 task_thread_info(child)->bpt_nsaved = 0;
244 printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
248 for (i = 0; i < nsaved; ++i) {
249 write_int(child, task_thread_info(child)->bpt_addr[i],
250 task_thread_info(child)->bpt_insn[i]);
252 return (nsaved != 0);
255 void user_enable_single_step(struct task_struct *child)
257 /* Mark single stepping. */
258 task_thread_info(child)->bpt_nsaved = -1;
261 void user_disable_single_step(struct task_struct *child)
263 ptrace_cancel_bpt(child);
267 * Called by kernel/ptrace.c when detaching..
269 * Make sure the single step bit is not set.
271 void ptrace_disable(struct task_struct *child)
273 user_disable_single_step(child);
276 long arch_ptrace(struct task_struct *child, long request,
277 unsigned long addr, unsigned long data)
284 /* When I and D space are separate, these will need to be fixed. */
285 case PTRACE_PEEKTEXT: /* read word at location addr. */
286 case PTRACE_PEEKDATA:
287 copied = ptrace_access_vm(child, addr, &tmp, sizeof(tmp),
290 if (copied != sizeof(tmp))
293 force_successful_syscall_return();
297 /* Read register number ADDR. */
299 force_successful_syscall_return();
300 ret = get_reg(child, addr);
301 DBG(DBG_MEM, ("peek $%lu->%#lx\n", addr, ret));
304 /* When I and D space are separate, this will have to be fixed. */
305 case PTRACE_POKETEXT: /* write the word at location addr. */
306 case PTRACE_POKEDATA:
307 ret = generic_ptrace_pokedata(child, addr, data);
310 case PTRACE_POKEUSR: /* write the specified register */
311 DBG(DBG_MEM, ("poke $%lu<-%#lx\n", addr, data));
312 ret = put_reg(child, addr, data);
315 ret = ptrace_request(child, request, addr, data);
321 asmlinkage unsigned long syscall_trace_enter(void)
323 unsigned long ret = 0;
324 struct pt_regs *regs = current_pt_regs();
325 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
326 tracehook_report_syscall_entry(current_pt_regs()))
328 audit_syscall_entry(regs->r0, regs->r16, regs->r17, regs->r18, regs->r19);
329 return ret ?: current_pt_regs()->r0;
333 syscall_trace_leave(void)
335 audit_syscall_exit(current_pt_regs());
336 if (test_thread_flag(TIF_SYSCALL_TRACE))
337 tracehook_report_syscall_exit(current_pt_regs(), 0);