1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
5 $id: http://devicetree.org/schemas/usb/mediatek,musb.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek MUSB DRD/OTG Controller Device Tree Bindings
11 - Min Guo <min.guo@mediatek.com>
15 pattern: '^usb@[0-9a-f]+$'
20 - mediatek,mt8516-musb
21 - mediatek,mt2701-musb
22 - mediatek,mt7623-musb
23 - const: mediatek,mtk-musb
37 - description: The main/core clock
38 - description: The system bus clock
39 - description: The 48Mhz clock
51 $ref: /schemas/types.yaml#/definitions/flag
52 description: Support role switch. See usb/generic.txt
62 description: A phandle to USB power domain node to control USB's MTCMOS
66 $ref: /connector/usb-connector.yaml#
67 description: Connector for dual role switch
71 usb-role-switch: [ 'connector' ]
72 connector: [ 'usb-role-switch' ]
83 additionalProperties: false
87 #include <dt-bindings/clock/mt2701-clk.h>
88 #include <dt-bindings/gpio/gpio.h>
89 #include <dt-bindings/interrupt-controller/arm-gic.h>
90 #include <dt-bindings/interrupt-controller/irq.h>
91 #include <dt-bindings/phy/phy.h>
92 #include <dt-bindings/power/mt2701-power.h>
95 compatible = "mediatek,mt2701-musb", "mediatek,mtk-musb";
96 reg = <0x11200000 0x1000>;
97 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
98 interrupt-names = "mc";
99 phys = <&u2port2 PHY_TYPE_USB2>;
101 clocks = <&pericfg CLK_PERI_USB0>,
102 <&pericfg CLK_PERI_USB0_MCU>,
103 <&pericfg CLK_PERI_USB_SLV>;
104 clock-names = "main","mcu","univpll";
105 power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
109 compatible = "gpio-usb-b-connector", "usb-b-connector";
111 id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
112 vbus-supply = <&usb_vbus>;