1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2020 MediaTek
5 $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek USB3 DRD Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-drd.yaml"
17 The DRD controller has a glue layer IPPC (IP Port Control), and its host is
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8188-mtu3
28 - mediatek,mt8192-mtu3
29 - mediatek,mt8195-mtu3
30 - const: mediatek,mtu3
34 - description: the registers of device MAC
35 - description: the registers of IP Port Control
44 use "interrupts-extended" when the interrupts are connected to the
45 separate interrupt controllers
48 - description: SSUSB device controller interrupt
49 - description: optional, wakeup interrupt used to support runtime PM
57 description: A phandle to USB power domain node to control USB's MTCMOS
63 - description: Controller clock used by normal mode
64 - description: Reference clock used by low power mode etc
65 - description: Mcu bus clock for register access
66 - description: DMA bus clock for data transfer
71 - const: sys_ck # required, others are optional
78 List of all the USB PHYs used, it's better to keep the sequence
79 as the hardware layout.
82 - description: USB2/HS PHY # required, others are optional
83 - description: USB3/SS(P) PHY
84 - description: USB2/HS PHY # the following for backward compatible
85 - description: USB3/SS(P) PHY
86 - description: USB2/HS PHY
87 - description: USB3/SS(P) PHY
88 - description: USB2/HS PHY
89 - description: USB3/SS(P) PHY
90 - description: USB2/HS PHY
93 description: Regulator of USB AVDD3.3v
98 Regulator of USB VBUS5v, needed when supports dual-role mode.
99 Particularly, if use an output GPIO to control a VBUS regulator, should
100 model it as a regulator. See bindings/regulator/fixed-regulator.yaml
101 It's considered valid for compatibility reasons, not allowed for
102 new bindings, and put into a usb-connector node.
105 enum: [host, peripheral, otg]
109 enum: [super-speed-plus, super-speed, high-speed, full-speed]
125 Phandle to the extcon device detecting the IDDIG state, needed
126 when supports dual-role mode.
127 It's considered valid for compatibility reasons, not allowed for
128 new bindings, and use "usb-role-switch" property instead.
131 $ref: /schemas/types.yaml#/definitions/flag
132 description: Support role switch.
135 role-switch-default-mode:
136 enum: [host, peripheral]
140 $ref: /schemas/connector/usb-connector.yaml#
142 Connector for dual role switch, especially for "gpio-usb-b-connector"
147 Any connector to the data bus of this controller should be modelled
148 using the OF graph bindings specified, if the "usb-role-switch"
149 property is used. See graph.txt
150 $ref: /schemas/graph.yaml#/properties/port
153 $ref: /schemas/types.yaml#/definitions/flag
155 supports manual dual-role switch via debugfs; usually used when
156 receptacle is TYPE-A and also wants to support dual-role mode.
160 description: enable USB remote wakeup, see power/wakeup-source.txt
163 mediatek,syscon-wakeup:
164 $ref: /schemas/types.yaml#/definitions/phandle-array
167 A phandle to syscon used to access the register of the USB wakeup glue
168 layer between xHCI and SPM, the field should always be 3 cells long.
172 The first cell represents a phandle to syscon
174 The second cell represents the register base address of the glue
177 The third cell represents the hardware version of the glue layer,
178 1 - used by mt8173 etc, revision 1 without following IPM rule;
179 2 - used by mt2712 etc, revision 2 with following IPM rule;
180 101 - used by mt8183, specific 1.01;
181 102 - used by mt8192, specific 1.02;
182 enum: [1, 2, 101, 102]
184 mediatek,u3p-dis-msk:
185 $ref: /schemas/types.yaml#/definitions/uint32
186 description: The mask to disable u3ports, bit0 for u3port0,
187 bit1 for u3port1, ... etc
189 mediatek,u2p-dis-msk:
190 $ref: /schemas/types.yaml#/definitions/uint32
191 description: The mask to disable u2ports, bit0 for u2port0,
192 bit1 for u2port1, ... etc; but can't disable u2port0 if dual role mode
193 is enabled, so will be skipped in this case.
195 # Required child node when support dual-role
199 $ref: /schemas/usb/mediatek,mtk-xhci.yaml#
201 The xhci should be added as subnode to mtu3 as shown in the following
202 example if the host mode is enabled.
205 connector: [ 'usb-role-switch' ]
206 port: [ 'usb-role-switch' ]
207 role-switch-default-mode: [ 'usb-role-switch' ]
208 wakeup-source: [ 'mediatek,syscon-wakeup' ]
218 additionalProperties: false
221 # Dual role switch by extcon
223 #include <dt-bindings/clock/mt8173-clk.h>
224 #include <dt-bindings/interrupt-controller/arm-gic.h>
225 #include <dt-bindings/interrupt-controller/irq.h>
226 #include <dt-bindings/phy/phy.h>
227 #include <dt-bindings/power/mt8173-power.h>
230 compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
231 reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
232 reg-names = "mac", "ippc";
233 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_LOW>;
234 phys = <&phy_port0 PHY_TYPE_USB3>, <&phy_port1 PHY_TYPE_USB2>;
235 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
236 clocks = <&topckgen CLK_TOP_USB30_SEL>;
237 clock-names = "sys_ck";
238 vusb33-supply = <&mt6397_vusb_reg>;
239 vbus-supply = <&usb_p0_vbus>;
240 extcon = <&extcon_usb>;
243 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
244 #address-cells = <1>;
249 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci";
250 reg = <0x11270000 0x1000>;
252 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
253 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>;
254 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
255 clock-names = "sys_ck", "ref_ck";
256 vusb33-supply = <&mt6397_vusb_reg>;
260 # Dual role switch by gpio-usb-b-connector
262 #include <dt-bindings/gpio/gpio.h>
263 #include <dt-bindings/power/mt2712-power.h>
266 compatible = "mediatek,mt2712-mtu3", "mediatek,mtu3";
267 reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
268 reg-names = "mac", "ippc";
269 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_LOW>;
270 phys = <&u2port2 PHY_TYPE_USB2>;
271 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB2>;
272 clocks = <&topckgen CLK_TOP_USB30_SEL>;
273 clock-names = "sys_ck";
276 #address-cells = <1>;
280 host0: usb@11270000 {
281 compatible = "mediatek,mt2712-xhci", "mediatek,mtk-xhci";
282 reg = <0x11270000 0x1000>;
284 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_LOW>;
285 power-domains = <&scpsys MT2712_POWER_DOMAIN_USB>;
286 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>;
287 clock-names = "sys_ck", "ref_ck";
291 compatible = "gpio-usb-b-connector", "usb-b-connector";
293 id-gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
294 vbus-supply = <&usb_p0_vbus>;
298 # Dual role switch with type-c
301 compatible ="mediatek,mt8183-mtu3", "mediatek,mtu3";
302 reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
303 reg-names = "mac", "ippc";
304 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
305 phys = <&u2port0 PHY_TYPE_USB2>;
307 clock-names = "sys_ck";
308 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
312 role-switch-default-mode = "host";
313 #address-cells = <1>;
318 compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci";
319 reg = <0x11200000 0x1000>;
321 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>;
323 clock-names = "sys_ck";
327 usb_role_sw: endpoint {
328 remote-endpoint = <&hs_ep>;