Documentation/devicetree/bindings/thermal/qcom-tsens.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 # Copyright 2019 Linaro Ltd.
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: QCOM SoC Temperature Sensor (TSENS)
   9
  10 maintainers:
  11   - Amit Kucheria <amitk@kernel.org>
  12
  13 description: |
  14   QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
  15   three distinct major versions of the IP that is supported by a single driver.
  16   The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
  17   everything before v1 when there was no versioning information.
  18
  19 properties:
  20   compatible:
  21     oneOf:
  22       - description: v0.1 of TSENS
  23         items:
  24           - enum:
  25               - qcom,msm8916-tsens
  26               - qcom,msm8939-tsens
  27               - qcom,msm8974-tsens
  28           - const: qcom,tsens-v0_1
  29
  30       - description: v1 of TSENS
  31         items:
  32           - enum:
  33               - qcom,msm8976-tsens
  34               - qcom,qcs404-tsens
  35           - const: qcom,tsens-v1
  36
  37       - description: v2 of TSENS
  38         items:
  39           - enum:
  40               - qcom,msm8996-tsens
  41               - qcom,msm8998-tsens
  42               - qcom,sc7180-tsens
  43               - qcom,sdm845-tsens
  44               - qcom,sm8150-tsens
  45               - qcom,sm8250-tsens
  46           - const: qcom,tsens-v2
  47
  48   reg:
  49     items:
  50       - description: TM registers
  51       - description: SROT registers
  52
  53   interrupts:
  54     minItems: 1
  55     items:
  56       - description: Combined interrupt if upper or lower threshold crossed
  57       - description: Interrupt if critical threshold crossed
  58
  59   interrupt-names:
  60     minItems: 1
  61     items:
  62       - const: uplow
  63       - const: critical
  64
  65   nvmem-cells:
  66     minItems: 1
  67     maxItems: 2
  68     description:
  69       Reference to an nvmem node for the calibration data
  70
  71   nvmem-cell-names:
  72     minItems: 1
  73     maxItems: 2
  74     items:
  75       - const: calib
  76       - const: calib_sel
  77
  78   "#qcom,sensors":
  79     description:
  80       Number of sensors enabled on this platform
  81     $ref: /schemas/types.yaml#/definitions/uint32
  82     minimum: 1
  83     maximum: 16
  84
  85   "#thermal-sensor-cells":
  86     const: 1
  87     description:
  88       Number of cells required to uniquely identify the thermal sensors. Since
  89       we have multiple sensors this is set to 1
  90
  91 allOf:
  92   - if:
  93       properties:
  94         compatible:
  95           contains:
  96             enum:
  97               - qcom,msm8916-tsens
  98               - qcom,msm8974-tsens
  99               - qcom,msm8976-tsens
 100               - qcom,qcs404-tsens
 101               - qcom,tsens-v0_1
 102               - qcom,tsens-v1
 103     then:
 104       properties:
 105         interrupts:
 106           maxItems: 1
 107         interrupt-names:
 108           maxItems: 1
 109
 110     else:
 111       properties:
 112         interrupts:
 113           minItems: 2
 114         interrupt-names:
 115           minItems: 2
 116
 117 required:
 118   - compatible
 119   - reg
 120   - "#qcom,sensors"
 121   - interrupts
 122   - interrupt-names
 123   - "#thermal-sensor-cells"
 124
 125 additionalProperties: false
 126
 127 examples:
 128   - |
 129     #include <dt-bindings/interrupt-controller/arm-gic.h>
 130     // Example 1 (legacy: for pre v1 IP):
 131     tsens1: thermal-sensor@900000 {
 132            compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
 133            reg = <0x4a9000 0x1000>, /* TM */
 134                  <0x4a8000 0x1000>; /* SROT */
 135
 136            nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
 137            nvmem-cell-names = "calib", "calib_sel";
 138
 139            interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 140            interrupt-names = "uplow";
 141
 142            #qcom,sensors = <5>;
 143            #thermal-sensor-cells = <1>;
 144     };
 145
 146   - |
 147     #include <dt-bindings/interrupt-controller/arm-gic.h>
 148     // Example 2 (for any platform containing v1 of the TSENS IP):
 149     tsens2: thermal-sensor@4a9000 {
 150           compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
 151           reg = <0x004a9000 0x1000>, /* TM */
 152                 <0x004a8000 0x1000>; /* SROT */
 153
 154           nvmem-cells = <&tsens_caldata>;
 155           nvmem-cell-names = "calib";
 156
 157           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
 158           interrupt-names = "uplow";
 159
 160           #qcom,sensors = <10>;
 161           #thermal-sensor-cells = <1>;
 162     };
 163
 164   - |
 165     #include <dt-bindings/interrupt-controller/arm-gic.h>
 166     // Example 3 (for any platform containing v2 of the TSENS IP):
 167     tsens3: thermal-sensor@c263000 {
 168            compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
 169            reg = <0xc263000 0x1ff>,
 170                  <0xc222000 0x1ff>;
 171
 172            interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
 173                         <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
 174            interrupt-names = "uplow", "critical";
 175
 176            #qcom,sensors = <13>;
 177            #thermal-sensor-cells = <1>;
 178     };
 179 ...