Documentation/devicetree/bindings/thermal/qcom-tsens.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 # Copyright 2019 Linaro Ltd.
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: QCOM SoC Temperature Sensor (TSENS)
   9
  10 maintainers:
  11   - Amit Kucheria <amitk@kernel.org>
  12
  13 description: |
  14   QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
  15   three distinct major versions of the IP that is supported by a single driver.
  16   The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
  17   everything before v1 when there was no versioning information.
  18
  19 properties:
  20   compatible:
  21     oneOf:
  22       - description: msm8960 TSENS based
  23         items:
  24           - enum:
  25               - qcom,ipq8064-tsens
  26               - qcom,msm8960-tsens
  27
  28       - description: v0.1 of TSENS
  29         items:
  30           - enum:
  31               - qcom,mdm9607-tsens
  32               - qcom,msm8916-tsens
  33               - qcom,msm8939-tsens
  34               - qcom,msm8974-tsens
  35           - const: qcom,tsens-v0_1
  36
  37       - description: v1 of TSENS
  38         items:
  39           - enum:
  40               - qcom,msm8976-tsens
  41               - qcom,qcs404-tsens
  42           - const: qcom,tsens-v1
  43
  44       - description: v2 of TSENS
  45         items:
  46           - enum:
  47               - qcom,msm8953-tsens
  48               - qcom,msm8996-tsens
  49               - qcom,msm8998-tsens
  50               - qcom,sc7180-tsens
  51               - qcom,sc7280-tsens
  52               - qcom,sc8180x-tsens
  53               - qcom,sc8280xp-tsens
  54               - qcom,sdm630-tsens
  55               - qcom,sdm845-tsens
  56               - qcom,sm8150-tsens
  57               - qcom,sm8250-tsens
  58               - qcom,sm8350-tsens
  59           - const: qcom,tsens-v2
  60
  61   reg:
  62     items:
  63       - description: TM registers
  64       - description: SROT registers
  65
  66   interrupts:
  67     minItems: 1
  68     items:
  69       - description: Combined interrupt if upper or lower threshold crossed
  70       - description: Interrupt if critical threshold crossed
  71
  72   interrupt-names:
  73     minItems: 1
  74     items:
  75       - const: uplow
  76       - const: critical
  77
  78   nvmem-cells:
  79     minItems: 1
  80     maxItems: 2
  81     description:
  82       Reference to an nvmem node for the calibration data
  83
  84   nvmem-cell-names:
  85     minItems: 1
  86     items:
  87       - const: calib
  88       - enum:
  89           - calib_backup
  90           - calib_sel
  91
  92   "#qcom,sensors":
  93     description:
  94       Number of sensors enabled on this platform
  95     $ref: /schemas/types.yaml#/definitions/uint32
  96     minimum: 1
  97     maximum: 16
  98
  99   "#thermal-sensor-cells":
 100     const: 1
 101     description:
 102       Number of cells required to uniquely identify the thermal sensors. Since
 103       we have multiple sensors this is set to 1
 104
 105 required:
 106   - compatible
 107   - interrupts
 108   - interrupt-names
 109   - "#thermal-sensor-cells"
 110   - "#qcom,sensors"
 111
 112 allOf:
 113   - if:
 114       properties:
 115         compatible:
 116           contains:
 117             enum:
 118               - qcom,ipq8064-tsens
 119               - qcom,mdm9607-tsens
 120               - qcom,msm8916-tsens
 121               - qcom,msm8960-tsens
 122               - qcom,msm8974-tsens
 123               - qcom,msm8976-tsens
 124               - qcom,qcs404-tsens
 125               - qcom,tsens-v0_1
 126               - qcom,tsens-v1
 127     then:
 128       properties:
 129         interrupts:
 130           maxItems: 1
 131         interrupt-names:
 132           maxItems: 1
 133
 134     else:
 135       properties:
 136         interrupts:
 137           minItems: 2
 138         interrupt-names:
 139           minItems: 2
 140
 141   - if:
 142       properties:
 143         compatible:
 144           contains:
 145             enum:
 146               - qcom,tsens-v0_1
 147               - qcom,tsens-v1
 148               - qcom,tsens-v2
 149
 150     then:
 151       required:
 152         - reg
 153
 154 additionalProperties: false
 155
 156 examples:
 157   - |
 158     #include <dt-bindings/interrupt-controller/arm-gic.h>
 159     // Example msm9860 based SoC (ipq8064):
 160     gcc: clock-controller {
 161
 162            /* ... */
 163
 164            tsens: thermal-sensor {
 165                 compatible = "qcom,ipq8064-tsens";
 166
 167                  nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
 168                  nvmem-cell-names = "calib", "calib_backup";
 169                  interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
 170                  interrupt-names = "uplow";
 171
 172                  #qcom,sensors = <11>;
 173                  #thermal-sensor-cells = <1>;
 174           };
 175     };
 176
 177   - |
 178     #include <dt-bindings/interrupt-controller/arm-gic.h>
 179     // Example 1 (legacy: for pre v1 IP):
 180     tsens1: thermal-sensor@900000 {
 181            compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
 182            reg = <0x4a9000 0x1000>, /* TM */
 183                  <0x4a8000 0x1000>; /* SROT */
 184
 185            nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
 186            nvmem-cell-names = "calib", "calib_sel";
 187
 188            interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 189            interrupt-names = "uplow";
 190
 191            #qcom,sensors = <5>;
 192            #thermal-sensor-cells = <1>;
 193     };
 194
 195   - |
 196     #include <dt-bindings/interrupt-controller/arm-gic.h>
 197     // Example 2 (for any platform containing v1 of the TSENS IP):
 198     tsens2: thermal-sensor@4a9000 {
 199           compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
 200           reg = <0x004a9000 0x1000>, /* TM */
 201                 <0x004a8000 0x1000>; /* SROT */
 202
 203           nvmem-cells = <&tsens_caldata>;
 204           nvmem-cell-names = "calib";
 205
 206           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
 207           interrupt-names = "uplow";
 208
 209           #qcom,sensors = <10>;
 210           #thermal-sensor-cells = <1>;
 211     };
 212
 213   - |
 214     #include <dt-bindings/interrupt-controller/arm-gic.h>
 215     // Example 3 (for any platform containing v2 of the TSENS IP):
 216     tsens3: thermal-sensor@c263000 {
 217            compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
 218            reg = <0xc263000 0x1ff>,
 219                  <0xc222000 0x1ff>;
 220
 221            interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
 222                         <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
 223            interrupt-names = "uplow", "critical";
 224
 225            #qcom,sensors = <13>;
 226            #thermal-sensor-cells = <1>;
 227     };
 228 ...