Documentation/devicetree/bindings/thermal/qcom-tsens.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 # Copyright 2019 Linaro Ltd.
   3 %YAML 1.2
   4 ---
   5 $id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
   6 $schema: http://devicetree.org/meta-schemas/core.yaml#
   7
   8 title: QCOM SoC Temperature Sensor (TSENS)
   9
  10 maintainers:
  11   - Amit Kucheria <amitk@kernel.org>
  12
  13 description: |
  14   QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
  15   three distinct major versions of the IP that is supported by a single driver.
  16   The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
  17   everything before v1 when there was no versioning information.
  18
  19 properties:
  20   compatible:
  21     oneOf:
  22       - description: v0.1 of TSENS
  23         items:
  24           - enum:
  25               - qcom,mdm9607-tsens
  26               - qcom,msm8916-tsens
  27               - qcom,msm8939-tsens
  28               - qcom,msm8974-tsens
  29           - const: qcom,tsens-v0_1
  30
  31       - description: v1 of TSENS
  32         items:
  33           - enum:
  34               - qcom,msm8976-tsens
  35               - qcom,qcs404-tsens
  36           - const: qcom,tsens-v1
  37
  38       - description: v2 of TSENS
  39         items:
  40           - enum:
  41               - qcom,msm8996-tsens
  42               - qcom,msm8998-tsens
  43               - qcom,sc7180-tsens
  44               - qcom,sdm845-tsens
  45               - qcom,sm8150-tsens
  46               - qcom,sm8250-tsens
  47           - const: qcom,tsens-v2
  48
  49   reg:
  50     items:
  51       - description: TM registers
  52       - description: SROT registers
  53
  54   interrupts:
  55     minItems: 1
  56     items:
  57       - description: Combined interrupt if upper or lower threshold crossed
  58       - description: Interrupt if critical threshold crossed
  59
  60   interrupt-names:
  61     minItems: 1
  62     items:
  63       - const: uplow
  64       - const: critical
  65
  66   nvmem-cells:
  67     minItems: 1
  68     maxItems: 2
  69     description:
  70       Reference to an nvmem node for the calibration data
  71
  72   nvmem-cell-names:
  73     minItems: 1
  74     maxItems: 2
  75     items:
  76       - const: calib
  77       - const: calib_sel
  78
  79   "#qcom,sensors":
  80     description:
  81       Number of sensors enabled on this platform
  82     $ref: /schemas/types.yaml#/definitions/uint32
  83     minimum: 1
  84     maximum: 16
  85
  86   "#thermal-sensor-cells":
  87     const: 1
  88     description:
  89       Number of cells required to uniquely identify the thermal sensors. Since
  90       we have multiple sensors this is set to 1
  91
  92 allOf:
  93   - if:
  94       properties:
  95         compatible:
  96           contains:
  97             enum:
  98               - qcom,mdm9607-tsens
  99               - qcom,msm8916-tsens
 100               - qcom,msm8974-tsens
 101               - qcom,msm8976-tsens
 102               - qcom,qcs404-tsens
 103               - qcom,tsens-v0_1
 104               - qcom,tsens-v1
 105     then:
 106       properties:
 107         interrupts:
 108           maxItems: 1
 109         interrupt-names:
 110           maxItems: 1
 111
 112     else:
 113       properties:
 114         interrupts:
 115           minItems: 2
 116         interrupt-names:
 117           minItems: 2
 118
 119 required:
 120   - compatible
 121   - reg
 122   - "#qcom,sensors"
 123   - interrupts
 124   - interrupt-names
 125   - "#thermal-sensor-cells"
 126
 127 additionalProperties: false
 128
 129 examples:
 130   - |
 131     #include <dt-bindings/interrupt-controller/arm-gic.h>
 132     // Example 1 (legacy: for pre v1 IP):
 133     tsens1: thermal-sensor@900000 {
 134            compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
 135            reg = <0x4a9000 0x1000>, /* TM */
 136                  <0x4a8000 0x1000>; /* SROT */
 137
 138            nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
 139            nvmem-cell-names = "calib", "calib_sel";
 140
 141            interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 142            interrupt-names = "uplow";
 143
 144            #qcom,sensors = <5>;
 145            #thermal-sensor-cells = <1>;
 146     };
 147
 148   - |
 149     #include <dt-bindings/interrupt-controller/arm-gic.h>
 150     // Example 2 (for any platform containing v1 of the TSENS IP):
 151     tsens2: thermal-sensor@4a9000 {
 152           compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
 153           reg = <0x004a9000 0x1000>, /* TM */
 154                 <0x004a8000 0x1000>; /* SROT */
 155
 156           nvmem-cells = <&tsens_caldata>;
 157           nvmem-cell-names = "calib";
 158
 159           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
 160           interrupt-names = "uplow";
 161
 162           #qcom,sensors = <10>;
 163           #thermal-sensor-cells = <1>;
 164     };
 165
 166   - |
 167     #include <dt-bindings/interrupt-controller/arm-gic.h>
 168     // Example 3 (for any platform containing v2 of the TSENS IP):
 169     tsens3: thermal-sensor@c263000 {
 170            compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
 171            reg = <0xc263000 0x1ff>,
 172                  <0xc222000 0x1ff>;
 173
 174            interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
 175                         <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
 176            interrupt-names = "uplow", "critical";
 177
 178            #qcom,sensors = <13>;
 179            #thermal-sensor-cells = <1>;
 180     };
 181 ...