Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/spi/xlnx,zynq-qspi.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Xilinx Zynq QSPI controller
   8
   9 description:
  10   The Xilinx Zynq QSPI controller is used to access multi-bit serial flash
  11   memory devices.
  12
  13 allOf:
  14   - $ref: "spi-controller.yaml#"
  15
  16 maintainers:
  17   - Michal Simek <michal.simek@xilinx.com>
  18
  19 # Everything else is described in the common file
  20 properties:
  21   compatible:
  22     const: xlnx,zynq-qspi-1.0
  23
  24   reg:
  25     maxItems: 1
  26
  27   interrupts:
  28     maxItems: 1
  29
  30   clocks:
  31     items:
  32       - description: reference clock
  33       - description: peripheral clock
  34
  35   clock-names:
  36     items:
  37       - const: ref_clk
  38       - const: pclk
  39
  40 required:
  41   - compatible
  42   - reg
  43   - interrupts
  44   - clocks
  45   - clock-names
  46
  47 unevaluatedProperties: false
  48
  49 examples:
  50   - |
  51     spi@e000d000 {
  52         compatible = "xlnx,zynq-qspi-1.0";
  53         reg = <0xe000d000 0x1000>;
  54         interrupt-parent = <&intc>;
  55         interrupts = <0 19 4>;
  56         clock-names = "ref_clk", "pclk";
  57         clocks = <&clkc 10>, <&clkc 43>;
  58         num-cs = <1>;
  59     };