1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
5 $id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm Quad Serial Peripheral Interface (QSPI)
11 - Mukesh Savaliya <msavaliy@codeaurora.org>
12 - Akash Asthana <akashast@codeaurora.org>
14 description: The QSPI controller allows SPI protocol communication in single,
15 dual, or quad wire transmission modes for read/write access to slaves such
19 - $ref: /schemas/spi/spi-controller.yaml#
44 - description: AHB clock
45 - description: QSPI core clock
63 unevaluatedProperties: false
67 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
68 #include <dt-bindings/interrupt-controller/arm-gic.h>
75 compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
76 reg = <0 0x88df000 0 0x600>;
79 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
80 clock-names = "iface", "core";
81 clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
82 <&gcc GCC_QSPI_CORE_CLK>;
85 compatible = "jedec,spi-nor";
87 spi-max-frequency = <25000000>;
88 spi-tx-bus-width = <2>;
89 spi-rx-bus-width = <2>;