Documentation/devicetree/bindings/sound/sun4i-i2s.txt

   1 * Allwinner A10 I2S controller
   2
   3 The I2S bus (Inter-IC sound bus) is a serial link for digital
   4 audio data transfer between devices in the system.
   5
   6 Required properties:
   7
   8 - compatible: should be one of the following:
   9    - "allwinner,sun4i-a10-i2s"
  10    - "allwinner,sun6i-a31-i2s"
  11    - "allwinner,sun8i-a83t-i2s"
  12    - "allwinner,sun8i-h3-i2s"
  13    - "allwinner,sun50i-a64-codec-i2s"
  14 - reg: physical base address of the controller and length of memory mapped
  15   region.
  16 - interrupts: should contain the I2S interrupt.
  17 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
  18         Documentation/devicetree/bindings/dma/dma.txt
  19 - dma-names: should include "tx" and "rx".
  20 - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
  21 - clock-names: should contain the following:
  22    - "apb" : clock for the I2S bus interface
  23    - "mod" : module clock for the I2S controller
  24 - #sound-dai-cells : Must be equal to 0
  25
  26 Required properties for the following compatibles:
  27         - "allwinner,sun6i-a31-i2s"
  28         - "allwinner,sun8i-a83t-i2s"
  29         - "allwinner,sun8i-h3-i2s"
  30         - "allwinner,sun50i-a64-codec-i2s"
  31 - resets: phandle to the reset line for this codec
  32
  33 Example:
  34
  35 i2s0: i2s@1c22400 {
  36         #sound-dai-cells = <0>;
  37         compatible = "allwinner,sun4i-a10-i2s";
  38         reg = <0x01c22400 0x400>;
  39         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
  40         clocks = <&apb0_gates 3>, <&i2s0_clk>;
  41         clock-names = "apb", "mod";
  42         dmas = <&dma SUN4I_DMA_NORMAL 3>,
  43                <&dma SUN4I_DMA_NORMAL 3>;
  44         dma-names = "rx", "tx";
  45 };